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lpddr3

Catalog Datasheet Type PDF Document Tags
Abstract: , AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE Check for , (DDR), 1.8-V (DDR2), Adjustable to 1.5-V (DDR3) or 1.2-V (LPDDR3) or Output Range 0.75-V to 3.0-V ­ , DDR/DDR2/DDR3/LPDDR3 Memory Power Supplies SSTL-2, SSTL-18 SSTL-18, SSTL-15 SSTL-15 and HSTL Termination SUPPORTS , provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18 DDR2/SSTL-18, DDR3/SSTL-15 DDR3/SSTL-15, and LPDDR3 memory systems. It , with DDR/DDR2/DDR3/LPDDR3 memory systems. The switch mode power supply (SMPS) portion employs external ... Original
datasheet

38 pages,
1154.79 Kb

RC VOLTAGE CLAMP snubber circuit lpddr3 controller str 5 q 0765 POWER SUPPLY CIRCUIT LPDDR3 jedec LPDDR3 layout lpddr3 TPS51116-EP SLUSB52A TPS51116-EP abstract
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Abstract: TP S5 17 16 TPS51716 TPS51716 www.ti.com SLUSB94 SLUSB94 ­ OCTOBER 2012 Complete DDR2, DDR3, DDR3L, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 2-A LDO, with Buffered Reference Check , Package DESCRIPTION The TPS51716 TPS51716 provides a complete power supply for DDR2, DDR3, DDR3L, and LPDDR3 , 2 · · · APPLICATIONS · · DDR2/DDR3/DDR3L/LPDDR3 Memory Power Supplies SSTL_18, SSTL_15 , provide complete DDR2/DDR3/DDR3L/LPDDR3 power solutions. The VTTREF has a 10-mA sink/source current ... Original
datasheet

30 pages,
1164.72 Kb

FDMS CSD17309 TPS51716RUK lpddr3 datasheet abstract
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Abstract: PIMB063T-R68MS-63 PIMB063T-R68MS-63 in Design 1: List of Materials table. . 22 Changed text from "LPDDR3" to "DDR3L" in Design 2 ... Original
datasheet

29 pages,
10815.66 Kb

TPS51367 pimb 2TPSF270M6E PIMB063T PIMB063T-R68MS-63 PCME063T LPDDR3 layout lpddr3 PCME063T-1R0MS-63 TPS51367 abstract
datasheet frame
Abstract: PIMB063T-R68MS-63 PIMB063T-R68MS-63 in Design 1: List of Materials table. . 22 Changed text from "LPDDR3" to "DDR3L" in Design 2 ... Original
datasheet

28 pages,
1859.48 Kb

TPS51363RVER PIMB063T-R68MS-63 PCME063T lpddr3 LPDDR3 layout TPS51363 TPS51363 abstract
datasheet frame
Abstract: LPDDR3, VDDQ, application with an output voltage of 1.35 V, maximum processor current (ICC(max) of 8 A ... Original
datasheet

25 pages,
1258.61 Kb

qfn jb PCME0630T LPDDR3 jedec lpddr3 TPS51363 TPS51363 abstract
datasheet frame
Abstract: LPDDR3, VDDQ, application with an output voltage of 1.35 V, maximum processor current (ICC(max) of 8 A ... Original
datasheet

25 pages,
1258.89 Kb

lpddr3 TPS51363 TPS51363 abstract
datasheet frame
Abstract: TPS51363 TPS51363 www.ti.com SLUSBB5 ­ FEBRUARY 2013 Design 2: This design is a LPDDR3, VDDQ, application with ... Original
datasheet

25 pages,
1311.4 Kb

LPDDR3 layout lpddr3 TPS51363 TPS51363 abstract
datasheet frame
Abstract: S51211 HTSSOP PowerPADTM package and 24-pin 4 QFN. APPLICATIONS · · C1 DDR/DDR2/DDR3/LPDDR3 Memory ... Original
datasheet

42 pages,
1278.1 Kb

TPS51116RGER IRF7821 IRF7832 SLUS609 SLUS609H SSTL-18 TPS51116PWP TPS51116PWPR TPS51116RGE 5350 "International Rectifier" TPS51116 str 5 q 0765 POWER SUPPLY CIRCUIT lpddr3 TPS51116 abstract
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Abstract: · · DDR/DDR2/DDR3/LPDDR3 Memory Power Supplies SSTL-2 SSTL-18 SSTL-18 and HSTL Termination M1 IRF7821 IRF7821 L1 1 ... Original
datasheet

42 pages,
1086.7 Kb

lpddr3 controller lpddr3 str 5 q 0765 POWER SUPPLY CIRCUIT TPS51116 SLUS609H TPS51116 abstract
datasheet frame
Abstract: 4mm QFN package. 2 · APPLICATIONS · · DDR/DDR2/DDR3/LPDDR3 Memory Power Supplies in Embedded ... Original
datasheet

36 pages,
832.18 Kb

mobile lpddr3 str 5 q 0765 POWER SUPPLY CIRCUIT lpddr3 controller lpddr3 TPS59116 SLUSA57 TPS59116 abstract
datasheet frame
Abstract: TPS51200 TPS51200 www.ti.com SLUS812 SLUS812 ­ FEBRUARY 2008 SINK/SOURCE DDR TERMINATION REGULATOR 1 FEATURES APPLICATIONS · · · Memory Termination Regulator for DDR, DDR2, DDR3, and Low Power DDR3/DDR4 Notebook/Desktop/Server Telecom/Datacom, GSM Base Station, LCD-TV/PDP-TV, Copier/Printer, Set-Top Box · Input Voltage: Supports 2.5-V Rail and 3.3-V Rail · VLDOIN Voltage Range: 1.1 V to 3.5 V · Sink/Source Termination Regulator Includes Droop Compensation · Requires Minimum Output Capacitance of 2 ... Original
datasheet

35 pages,
1145.6 Kb

UDG-08032 TPS51200DRCTG4 TPS51200DRCT SLUS812 DIMM DDR4 socket DDR4 DIMM SPD JEDEC DDR4 jedec JEDEC DDR4 pcb layout JESD8-15a UDG-08034 UDG-08023 DDR4 spd DDR3 pcb layout motherboard TPS51200 SLUS812 TPS51200 abstract
datasheet frame
Abstract: TPS51200 TPS51200 www.ti.com SLUS812 SLUS812 ­ FEBRUARY 2008 SINK/SOURCE DDR TERMINATION REGULATOR FEATURES APPLICATIONS · Input Voltage: Supports 2.5-V Rail and 3.3-V Rail · VLDOIN Voltage Range: 1.1 V to 3.5 V · Sink/Source Termination Regulator Includes Droop Compensation · Requires Minimum Output Capacitance of 20-µF (typically 3 - 10-µF MLCCs) for Memory Termination Applications (DDR) · PGOOD to Monitor Output Regulation · EN Input · REFIN Input Allows for Flexible Input Tracking Ei ... Original
datasheet

35 pages,
1131.86 Kb

UDG-08034 DDR3 pcb layout motherboard DIMM DDR4 socket SON-10 TPS51100 TPS51200 TPS51200-EVM TPS51200DRCT DDR3 pcb layout guide JESD8-15a DDR4 jedec TPS51200DRCR DDR4 pcb layout guidelines TPS51200 abstract
datasheet frame
Abstract: TPS51200-Q1 TPS51200-Q1 www.ti.com SLUS984 SLUS984 ­ NOVEMBER 2009 SINK/SOURCE DDR TERMINATION REGULATOR Check for Samples: TPS51200-Q1 TPS51200-Q1 FEATURES APPLICATIONS · · · 1 2 · · · · · · · · · · · · Qualified for Automotive Applications Input Voltage: Supports 2.5-V Rail and 3.3-V Rail VLDOIN Voltage Range: 1.1 V to 3.5 V Sink/Source Termination Regulator Includes Droop Compensation Requires Minimum Output Capacitance of 20-F (typically 3 - 10-F MLCCs) for Memory Ter ... Original
datasheet

35 pages,
980.94 Kb

tps51100 marking MURATA MW 20 Top side device marking of TPS51200 SON-10 TPS51100 TPS51200 TPS51200-Q1 tps51200 marking ddr3 termination DDR3 pcb layout motherboard TPS51200-EVM DIMM DDR4 socket DDR4 spd TPS51200-Q1 abstract
datasheet frame
Abstract: TPS51200 TPS51200 www.ti.com SLUS812 SLUS812 ­ FEBRUARY 2008 SINK/SOURCE DDR TERMINATION REGULATOR FEATURES APPLICATIONS · Input Voltage: Supports 2.5-V Rail and 3.3-V Rail · VLDOIN Voltage Range: 1.1 V to 3.5 V · Sink/Source Termination Regulator Includes Droop Compensation · Requires Minimum Output Capacitance of 20-µF (typically 3 - 10-µF MLCCs) for Memory Termination Applications (DDR) · PGOOD to Monitor Output Regulation · EN Input · REFIN Input Allows for Flexible Input Tracking Ei ... Original
datasheet

35 pages,
1248.32 Kb

ddr3 ram DDR3 layout TI DDR3 layout ddr3 Designs guide DDR4 spd GRM21BR60J475KA11L GRM21BR70J106KE76L UDG-08034 SON-10 TPS51100 TPS51200 ddr3 pcb design guide DDR3 pcb layout TPS51200 abstract
datasheet frame
Abstract: TPS51200-Q1 TPS51200-Q1 www.ti.com SLUS984 SLUS984 ­ NOVEMBER 2009 SINK/SOURCE DDR TERMINATION REGULATOR Check for Samples: TPS51200-Q1 TPS51200-Q1 FEATURES APPLICATIONS · · · 1 2 · · · · · · · · · · · · Qualified for Automotive Applications Input Voltage: Supports 2.5-V Rail and 3.3-V Rail VLDOIN Voltage Range: 1.1 V to 3.5 V Sink/Source Termination Regulator Includes Droop Compensation Requires Minimum Output Capacitance of 20-F (typically 3 - 10-F MLCCs) for Memory Ter ... Original
datasheet

35 pages,
987.49 Kb

TPS51200-Q1 DDR3 DIMM SPD JEDEC DDR4 jedec DDR3 "application note" GRM21BR60J475KA11L MURATA MW 20 SON-10 Top side device marking of TPS51200 TPS51100 TPS5120 TPS51200-EVM DDR3 pcb layout guide ddr3 ram TPS51200-Q1 abstract
datasheet frame
Abstract: TPS51200 TPS51200 www.ti.com SLUS812 SLUS812 ­ FEBRUARY 2008 SINK/SOURCE DDR TERMINATION REGULATOR 1 FEATURES APPLICATIONS · · · Memory Termination Regulator for DDR, DDR2, DDR3, and Low Power DDR3/DDR4 Notebook/Desktop/Server Telecom/Datacom, GSM Base Station, LCD-TV/PDP-TV, Copier/Printer, Set-Top Box · Input Voltage: Supports 2.5-V Rail and 3.3-V Rail · VLDOIN Voltage Range: 1.1 V to 3.5 V · Sink/Source Termination Regulator Includes Droop Compensation · Requires Minimum Output Capacitance of 2 ... Original
datasheet

35 pages,
1275.09 Kb

pcb layout design mobile DDR DIMM DDR4 socket DDR4 jedec DDR4 DIMM SPD JEDEC DDR3 pcb layout DDR3 pcb layout motherboard DDR4 pcb layout guidelines TPS51200 SLUS812 TPS51200 abstract
datasheet frame
Abstract: TPS51200 TPS51200 www.ti.com SLUS812 SLUS812 ­ FEBRUARY 2008 SINK/SOURCE DDR TERMINATION REGULATOR FEATURES APPLICATIONS · Input Voltage: Supports 2.5-V Rail and 3.3-V Rail · VLDOIN Voltage Range: 1.1 V to 3.5 V · Sink/Source Termination Regulator Includes Droop Compensation · Requires Minimum Output Capacitance of 20-µF (typically 3 - 10-µF MLCCs) for Memory Termination Applications (DDR) · PGOOD to Monitor Output Regulation · EN Input · REFIN Input Allows for Flexible Input Tracking Ei ... Original
datasheet

35 pages,
1249.11 Kb

TPS51200DRCT DDR3 pcb layout DDR4 DIMM SPD JEDEC JEDEC DDR4 pcb layout SON-10 SON10 TPS51100 TPS51200 TPS51200DRCR DDR3 pcb layout motherboard DDR3 pcb layout guide ddr3 pcb design guide DDR4 pcb layout guidelines TPS51200 abstract
datasheet frame
Abstract: TPS51200-Q1 TPS51200-Q1 www.ti.com SLUS984A SLUS984A ­ NOVEMBER 2009 ­ REVISED APRIL 2012 SINK/SOURCE DDR TERMINATION REGULATOR Check for Samples: TPS51200-Q1 TPS51200-Q1 1 FEATURES Qualified for Automotive Applications Input Voltage: Supports 2.5-V Rail and 3.3-V Rail VLDOIN Voltage Range: 1.1 V to 3.5 V Sink/Source Termination Regulator Includes Droop Compensation Requires Minimum Output Capacitance of 20F (typically 3 - 10-F MLCCs) for Memory Termination Applications (DDR) PGOOD to Monitor Output Regulation EN Inpu ... Original
datasheet

34 pages,
844.94 Kb

SLUS984A DDR3 layout guidelines DDR4 "application note" TPS51200-Q1 DDR4 pcb layout guidelines TPS51200-Q1 abstract
datasheet frame
Abstract: TPS51200-Q1 TPS51200-Q1 www.ti.com SLUS984 SLUS984 ­ NOVEMBER 2009 SINK/SOURCE DDR TERMINATION REGULATOR Check for Samples: TPS51200-Q1 TPS51200-Q1 1 FEATURES Qualified for Automotive Applications Input Voltage: Supports 2.5-V Rail and 3.3-V Rail VLDOIN Voltage Range: 1.1 V to 3.5 V Sink/Source Termination Regulator Includes Droop Compensation Requires Minimum Output Capacitance of 20-F (typically 3 - 10-F MLCCs) for Memory Termination Applications (DDR) PGOOD to Monitor Output Regulation EN Input REFIN Input Allows ... Original
datasheet

35 pages,
888.93 Kb

JEDEC DDR4 pcb layout TPS51200-Q1 SLUS984 TPS51200-Q1 abstract
datasheet frame
Abstract: TPS51200-Q1 TPS51200-Q1 www.ti.com SLUS984A SLUS984A ­ NOVEMBER 2009 ­ REVISED APRIL 2012 SINK/SOURCE DDR TERMINATION REGULATOR Check for Samples: TPS51200-Q1 TPS51200-Q1 1 FEATURES Qualified for Automotive Applications Input Voltage: Supports 2.5-V Rail and 3.3-V Rail VLDOIN Voltage Range: 1.1 V to 3.5 V Sink/Source Termination Regulator Includes Droop Compensation Requires Minimum Output Capacitance of 20F (typically 3 - 10-F MLCCs) for Memory Termination Applications (DDR) PGOOD to Monitor Output Regulation EN Inpu ... Original
datasheet

36 pages,
946.2 Kb

TPS51200-Q1 TPS51200-EVM DDR3 pcb layout guidelines DDR3 pcb layout DDR4 pcb layout guidelines DDR3 pcb layout guide DDR3 pcb layout motherboard SLUS984A TPS51200-Q1 abstract
datasheet frame