Voltage Subscriber Loop Interface Circuit MC33121 designed provid
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Voltage Subscriber Loop Interface Circuit
MC33121 designed provide interface between 4-wire side central office, PBX, 2-wire subscriber line. Interface functions include battery feed, proper loop termination impedance, hookswitch detection, adjustable transmit, receive, transhybrid gains, single/double fault indication. Additionally, MC33121 provides minimum longitudinal balance (4-wire 2-wire).
transmit receive signals referenced analog ground, while digital signals referenced digital ground, easing interface codecs, filters, etc. status outputs (hookswitch faults) Power Down Input TTL/CMOS compatible. Power Down Input permits local shutdown circuit.
Internal drivers allow external loop current pass transistors standard bipolar transistors (non-Darlington).
MC33121 available PLCC surface mount package.
Longitudinal Balance Guaranteed; 4-wire 2-wire
Transmit, Receive, Transhybrid Gains Externally Adjustable
Return Loss Externally Adjustable
Proper Hookswitch Detection With Leakage
Single/Double Fault Indication With Shutdown Thermal Protection
Critical Sense Resistors Included Internally
Standard Power Supplies: 21.6
On-Hook Transmission
Power Down Input (TTL CMOS Compatible)
Operating Ambient Temperature:
Available PLCC Package
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MC33121
VOLTAGE SUBSCRIBER LOOP INTERFACE CIRCUIT (SLIC)
THIN FILM SILICON MONOLITHIC INTEGRATED CIRCUIT
SUFFIX
PLASTIC PACKAGE
CASE
SUFFIX PLCC CASE
ORDERING INFORMATION
Device Temperature Range Package
MC33121P Plastic
MC33121 PLCC
MAXIMUM RATINGS
Characteristic Symbol Value Unit
Supply Voltage (with respect Vcc) (with respect Vqq) -60, +0.5 -0.5, +7.0
Voltage PDI, (with respect Vqq) RSI, -0.5, +7.0 VEE-O.5, 7.0, +0-5 VEE-0.5, Vee- 1.0,
Junction Temperature
Storage Temperature Tstg to+150
Devices should operated these limits. "Recommended Operating Conditions" table provides actual device operation.
RECOMMENDED OPERATING CONDITIONS
Characteristic Symbol Unit
Supply Voltage
(with respect Vcc) -21.6
(with respect Vdg) +4.5 +5.0 +5.5
(with respect Vcc) -3.0
(with respect Vcc) -3.0 +7.0
(with respect Vaq) -3.0
(with respect VEE) 47.5
(with respect Vag)
Loop Current
Input Voltage VpDI
Sink Current
'ST1L
'ST2L
Transmit Signal Level Ring +3.0
Receive Signal Level +3.0
Loop Resistance
External Transistor Beta
Operating Ambient Temperature (See text derating)
limits necessarily functional concurrently.
ELECTRICAL CHARACTERISTICS (VEE= VDD= +5.0 unless otherwise noted. Vcc=VaG=vDG= Figure
Characteristic Symbol Unit
POWER SUPPLIES
Current
Hook (R|_ Mi2, 'een -2.7
Hook (R|_ Ieef
Current
Hook (r|_ +5-5 Iddn
Hook (R|_ +5.5 Iddf
Ripple Rejection PSRR
kHz, @VTX (4-wire)
kHz, Tip/Ring (2-wire)
Ripple Rejection
kHz, (4-wire)
kHz, Tip/Ring (2-wire)
'Includes loop current.
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ELECTRICAL CHARACTERISTICS (VEE= VDD= +5.0 unless otherwise noted. VCc=VaG=vDG= Fi9ure
Characteristic Symbol Unit
LOOP FUNCTIONS
Loop Current Maximum (RRF Nominal (RRF Minimum (RRF 'L(max) 'L(min) 17.5
Battery Feed Resistance (RRF i2)*
Hookswitch Threshold On-to-Off Hook Off-to-On Hook
Fault Detection Threshold Ring-to-Ground Tip-to-Battery 1100 1100
"Calculated from [(24/l[_(mjn)) 796] GAIN LEVELS
Transmit Voltage Gain (CP, TXO) Gtxi 0.328
Transmit Voltage Gain (Vjx/V|_) dBm, dBm, kHz, with respect GjX2 +3.0 dBm, kHz, with respect Gjx2 dBm, kHz, with respect Gjx2 Gtx2 -0.3 -0.1 -0.15 0.15
Transmit Distortion kHz, Vj-R +5.0 dBm) thdt 0.05
Receive Current Gain (Iep^RXI) GRX1 mA/mA
Receive Voltage Gain (V|_/Vrxi) VRX| dBm, Vrxi dBm, kHz, with respect Grx2 Vrxi +3.0 dBm, kHz, with respect Grx2 Vrxi dBm, kHz, with respect Grx2 -0.3 -0.1 -0.15 0.15
Receive Distortion kHz, Vrxi +5.0 dBm) THDr 0.05
Return Loss (Reference resistive, kHz)
Transhybrid Rejection (R|_ resistive, kHz, Figure
LONGITUDINAL SIGNALS (Vcm Vrms, Figures
2-Wire Balance, kHz, Tip/Ring) 4-Wire Balance, kHz, Vjx)
2-Wire Balance, Tip/Ring) 4-Wire Balance, VTX)
2-Wire Balance, kHz, Tip/Ring) 4-Wire Balance, kHz, Vtx)
2-Wire Balance, kHz, Tip/Ring) 4-Wire Balance, kHz, Vjx)
Signal Balance, (Figure
Longitudinal Impedance, 9100 zLong
Maximum Longitudinal Current, side kHz, lLoop l|_(min). 5.12 Vrms 'Long(max)
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ELECTRICAL CHARACTERISTICS (Vee= VDD= +5.0 unless otherwise noted. Vcc=Vag=Vdg= R9ure
Characteristic Symbol Unit
LOGIC INTERFACE
Output Voltage
(IST1 0.17
High (lsT1
Output Voltage
(lsT2 0.17
High (lsT2
Time Delay
Hookswitch Closure Change
Hookswitch Opening Change 1ST12
Hookswitch Closure Loop Current jif)
Taken High-to-Low Loop Current 'ST21
Taken Low-to-High Loop Current <ST22
Input Current
Vpoi 1250 -800 -300
VPD1 -800
Input Voltage
High
MISCELLANEOUS
Voltage <vqb vee) 0.95
Offset Voltage (VTXo Vag) VtXO +400 mVdc
Output Current 'txo +275
Offset Voltage (VrxI vag) VrxOS
Current
Idle Channel Noise (with C-message filter, (Pin Tip/Ring n|c4 N|c2 -5.0 dBrnc
Thermal Resistance Junction Ambient (Either package, still air, soldered board)
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Figure Test Circuit
Components shown system. Three grounds connected directly together.
MC33121
+5.0
pdi/st2
Irxi
20.3
^3(h9k
Receive
Transmit (Vjx) +10.13
jaf)
Figure Longitudinal Balance Test
(Per IEEE-455)
0.01%
-m-Q-
|aF:
-va-r>
0.01%
Vrms
Ring
MC33121 Test Circuit (Figure
Dift. Amplifier
4-Wire Balance (log V^Ncu) 2-Wire Balance (log V2/Vcm)
Figure Signal Balance Test
0.01%
-AA/V-
-AA/V-368
Ring
0.01%
Signal Balance (tog
MC33121 Test Circuit (Figure
MC33121
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Figure Application Circuit
r^ra_o.oi
Component values shown system.
MJD243
MC33121
+5.0
ST2/PDI
Receive (Vrxi)
Transmit Out(Vrx)
FUNCTION DESCRIPTION
Symbol Description
PLCC
Connect noise-free battery ground. Carries loop current some bias currents.
Connect emitter pass transistor.
Connect base pass transistor.
Connect through current limiting protection resistor (Rq)- noninverting input internal transmit amplifier (Figure 28). Input impedance kii.
Sense input. Connect through current limiting protection resistor (Rg) which also sets longitudinal impedance. Input impedance =100 Vqq-
Connect +5.0 supply, referenced digital ground. Powers logic section provides some bias currents loop current drivers.
Digital Ground. Reference ST1, Vdd- Connect system digital ground.
Status Output (TTL/CMOS). Indicates hook switch status high when on-hook, when off-hook, pulse dialing information. Used with indicate fault conditions.
ST2/PDI Status output input (TTL/CMOS). output, indicate hook status when on-hook, high when off-hook. Used with indicate fault conditions. input, taken (when off-hook) deny subscriber loop current.
Transmit voltage output. Amplitude =1/3 that across Nominally capable output current. referenced V/\q.
Receive current input. Current this multiplied generate loop current. virtual ground level. Current flow this pin.
Analog ground, reference RXI. Connect system analog ground. Current flow into this pin.
resistor from this sets maximum loop current feed resistance. Minimum resistor value (see Figures
leakage capacitor between this provides signal separation. series resistor required battery supply turn-on/off transient protection (Figure
Quiet Battery. capacitor between filters noise ripple from Vgg, providing quiet battery source speech amplifiers. series resistor required battery supply turn-on/off transient protection (Figure
Sense input. Connect RING through current limiting protection resistor which also sets longitudinal impedance. Input impedance =100 Vqb-
Connect RING through current limiting protection resistor. inverting input internal transmit amplifier (Figure 28). Input impedance
Connect base pass transistor.
Connect emitter pass transistor.
Connect battery voltage 21.6
(Pins internally connected PLCC package.)
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Figure Loop Current versus Loop Resistance
1200 1600
LOOP RESISTANCE (Li)
2000
Figure Loop Current versus Loop Resistance
5100 4700 6200
8200 7500
R|_, LOOP RESISTANCE
1000
Figure Loop Current versus Loop Resistance
R|_, LOOP RESISTANCE
1000
Figure Off-Hook On-Hook Threshold versus
k<Rs<11 4.5V<VDD<5.i
Figure On-Hook Off-Hook Threshold versus Figure versus Loop Current
SENSE RESISTANCE LOOP CURRENT (mA)
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Figure Fault Threshold (On-Hook) versus
SENSE RESISTANCE (kQ)
Figure Fault Threshold (Off-Hook) versus Loop Resistance
1000 1500
LOOP RESISTANCE
2000
Figure Fault Threshold (Off-Hook) versus Loop Resistance
Ring-to-Ground and/or Tip-to-Vc
R|_, LOOP RESISTANCE
Figure Fault Threshold (Off-Hook) versus Loop Resistance
R|_, LOOP RESISTANCE
Figure Fault Threshold (Off-Hook) versus
Figure Ripple Rejection versus Frequency
SENSE RESISTANCE
FREQUENCY (kHz)
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Figure Ripple ection versus Frequency
CqB=10hF
FREQUENCY (kHz)
Figure Ripple Rejection versus Frequency
20mA<l|_oop<40
Cqb, CAPACITOR (nF)
Figure ST1, versus
Figure ST1, versus
Iql. OUTPUT CURRENT (mA)
-100 -150
iqh, OUTPUT CURRENT (jiA)
-200
Figure ST2, versus
0.25 0.50 0.75
Iql, OUTPUT CURRENT (mA)
Figure ST2, versus
-100 -200 -300 -400 -500
IQH. OUTPUT CURRENT (|iA)
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Figure Power Dissipation versus Loop Resistance
+5.0
S^RRF 3900
LOOP RESISTANCE
Figure Transistor Power Dissipation versus Loop Resistance
R|_, LOOP RESISTANCE
Figure Maximum Longitudinal Current versus Loop Current
-42V<VeeS-24V Cj>0.1 |lxF Cj>10
LOOP CURRENT (mA)
Figure Maximum Longitudinal Current versus Frequency
BTUC
-t-1 9.1k
MC33121
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FUNCTIONAL DESCRIPTION
Introduction
MC33121 solid state SLIC (Subscriber Line Interface Circuit) which provides interface between wire telephone line four wire side Central Office PBX. Most BORSCHT functions provided, specifically:
Battery feed loop current line, with programmable maximum current short lines battery feed resistance long lines.
Overvoltage protection through internal clamp diodes external resistors diodes.
Supervision, that hook status indicated presence leakage, regardless whether circuit powered down intentionally Central Office PBX. Fault conditions detected indicated system. Dialing (pulse DTMF) information passed through MC33121 4-wire side.
Hybrid function, that MC33121 2-to-4 wire converter. Transmit, receive, return loss, transhybrid gains independently adjustable.
MC33121 does provide ring insertion, ring trip, digital coding/decoding speech signals, test functions. These must provided external this device.
MC33121 controls external transistors (one PNP) through which loop current flows. appropriate circuit design, power dissipation (which exceed under certain worst case conditions)
approximately equally distributed among transistors thereby lowering junction temperatures increasing long term reliability. most situations, heatsinks will required.
MC33121 incorporates critical sense resistors internally, which trimmed optimum performance. With this technique, external resistors wire side, which generally must high wattage transient protection reasons, non-precision.
Longitudinal balance tested minimum (refer Electrical Characteristics Figure both two-wire four-wire side, typically measures mid-60s. longitudinal current capability tested minimum mArms side (refer Electrical Characteristics Figure loop current
Following description individual sections. Figure reference schematic.
Loop Current
loop current determined battery voltage (Vee), load resistance across Ring, resistor RFO. Varying resistors will influence loop current small amount (<5%). curves Figures indicate loop current versus loop resistance, different values RRF, various values Vee- graphs represent performance after reached steady state temperature minutes).
Figure Loop Current Path
Analog Ground
lRXI
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Figure representative loop current path (bold lines). long line (R|_ loop current determined from following equation:
(|Vee1-3.6 V).13 {(R|_
short lines (R|_ i2), three diodes across 12.4 resistor clamp voltage RFO, thereby preventing current from increasing load resistance decreased. maximum loop current
temperature dependence diode's forward voltage, maximum loop current will change with temperature
battery feed resistance (AVj|p/AI|_) =400 depends loop current, Vee. RRF, valid parameter only long lines where current limit effect. short lines, feed resistance high since loop current clamped near constant level. impedance (Return Loss) however, determined affected parameters. Applications Section Return Loss information.
Transmit Path
transmit path, shown Figure consists internal amplifier which inputs output TXO. gain internally fixed 0.328 (-9.7 dB). output phase with signal (normally same TIP), phase with signal signal also phase with that Vrx, receive signal input, described another section.
output swing =3.0 Vp-p, with nominal current capability peak minimum). load parallel combination RTX1 network (described later). nominally internally biased level, offset which varies with loop current.
normal applications, signal CP/CN reduced slightly from that Tip/Ring voltage divider composed external resistors, internal resistors.
value resistors depends transient protection needed, described another section, with resistors being suitable most applications. resulting signal needs gained obtain from Tip/Ring (the 4-wire output). common method involves external amp, shown Figure with gain RTX2/RTX1. gain from
RTX2 *31k. 0.328 RTX1
codec/filter used, many which include internal amp, separate needed. primarily blocking offset), usually large (1.0 |iF) affect gain.
Receive Path
receive path, shown Figure consists input RXI, transistor driver amplifiers, external transistors, load Tip/Ring.
virtual ground level Vag) ancl current input. Current flow pin. current mirrored transistor drivers which provide gain 102. external transistors then current sources, series, operating same value. additional internal circuit (not shown) balances current sources maintain operation their linear region.
load current (through R[_) slightly different from transistor current sense resistors sense resistors loop current, subtract from load current.
normal operation, current composed current (from RFO), current (from Vrx) which receive signal, current from TXO, which feedback signal return loss (setting return loss discussed section Terminating Impedance). resulting signal inverted from that Vrx. while signal Ring phase with Vrx-
resistors transient protection, their value (defined another section) depends amount protection required. nominal value suitable most applications.
system receive gain, from Tip/Ring, described this section since normal applications, involves feedback which sets terminating impedance. Applications Section discusses these detail.
Figure Transmit Path
Ring
-AA/V-RC
0.328
MC33121
RTX1
-vTx
RTX2
Note: part codec/filter.
MC33121
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Logic Interface (Hook status, pulse dialing, faults)
logic interface section provides hookswitch status, fault information, pulse dialing information 4-wire side system outputs. Figure representative diagram.
logic outputs operate according truth table Table
Table Status Output Truth Table
Hook Status Fault Detection Outputs Circuit Condition
On-Hook Fault Internally powered down
Off-Hook Fault Powered
On-Hook Fault Internally powered down
Off-Hook Fault Internally powered down
Referring Figure configured active pulldown with pullup resistor.
current source pullup, current source pulldown. Current limiting this output controls discharge from external capacitor when switches low.
condition where both high valid, occur momentarily during off-hook on-hook transition. condition where both occur momentarily during on-hook off-hook transition this should interpreted fault condition. TTL/CMOS compatible powered +5.0 supply (Vdd). Refer Applications Section more details.
Power Supplies, Grounds
mc33121 requires power supplies: battery voltage between 21.6 (Vee). auxiliary voltage between +4.5 +5.5 (Vdd)-
nominally with typical range 21.6 must referenced (battery ground). bypass capacitor should provided between
Figure Receive Path
AAA-^C
irxi
Figure Logic Interface
800nA
ST2/PDI
Bias
Circuit
+5.0
Status
External Power Down Control Input
Status
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Vee- current (Iee) nominally when on-hook, more than loop current when off-hook, =5.0 when off-hook powered down using pin. Ripple noise rejection from minimum (with |o.F capacitor Vqb), dependent size quality capacitor (Cqb) since actual internal supply voltage speech amplifiers. absolute maximum should exceeded combination battery voltage, tolerance, ripple.
normally supplied from line card's digital +5.0 supply, referenced (digital ground). capacitor should provided between vdg- current (Iqd) nominally when on-hook between when off-hook (see Figure 10). When MC33121 intentionally powered down using pin, changes <1.0 from normal off-hook value.
analog ground MC33121, reference speech signals (RXI TXO). Current flow into pin, typically <0.5 |iA.
Normally, Vqc> same level. However, strong transients expected Ring, Central Office application, application where phone line outdoors, should connected directly ancl order prevent possible damage +5.0 system. MC33121 designed tolerate much between ar|d other grounds transient basis only. This feature permits ancl other grounds kept separate basis) line card transient suppressors, connected together farther into system power supplies). Applications Section ground arrangements transient protection further information connecting MC33121 system supplies.
APPLICATIONS INFORMATION
This section contains information following topics:
Design Procedure .pg.
Power Dissipation Calculations
Considerations .pg.22
Selecting Transistors .pg.23
Longitudinal Current Capability .pg.
Board Layout Considerations.pg.23
Alternate Circuit Configurations.pg.26
Design Procedure
This section describes step-by-step sequence designing MC33121 SLIC into typical line card application either Central Office. sequence important that each component value which calculated does affect components previously determined. Figure (Typical Application Circuit) reference circuit most this discussion. recommended sequence (detailed below), consists establishing aspects first, then aspects:
Determine maximum loop current shortest line, select RRF. Power dissipation must considered here.
Select main protection resistors (RP), diodes, based expected transient voltages. Transient protection configuration must also considered here.
Select based expected transient voltages.
Select based desired longitudinal impedance Ring. Transient voltages also factor here.
Calculate based desired terminating impedance (return loss).
Calculate based desired receive gain.
Calculate RTX2 RTX1 based desired transmit gain.
Calculate balance resistor (RB), network, appropriate desired transhybrid rejection.
Logic Interface
Preliminary
There primary feedback loop which main sense points (see Figure 34). loop extends from there TXO, through RXI, through internal amplifiers transistor drivers, through
Ring, through Components within this loop, such transistors, compensation capacitors need tightly matched each other order maintain good longitudinal balance. tolerance requirements these components, others, described subsequent sections. components, however, which placed outside loop additional line card functions, such test relay contacts, fuses, resistors series with Ring, etc. will affect longitudinal balance, signal balance, gains their values mismatch carefully considered. MC33121 cannot compensate mismatch among components outside loop.
compensation capacitors (0.01 (iF) shown transistor collectors (Figure compensate transistor driver amplifiers, providing required loop stability. required tolerance these capacitors determined from following guidelines:
mismatch (+5% tolerance) will degrade longitudinal balance =1.0 device, device.
mismatch tolerance) will degrade longitudinal balance =3.0 device, =6.0 device.
High quality ceramic capacitors recommended since they serve secondary function providing bleedoff path signals picked phone line. These capacitors should connected good quality ground.
capacitors used must leakage obtain proper performance. Leakage capacitor will affect loop current characteristics, while leakage capacitor will affect gain parameters, possibly render inoperative.
Maximum Loop Current Battery Feed Resistance
maximum loop current determined resistor between RXI. current limit accomplished three internal series diodes (see Figure which clamp voltage across loop resistance decreases, thereby limiting current RXI. Since loop current Irxi. loop current therefore clamped. graphs Figures indicate maximum
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loop current ambient temperature after reached thermal equilibrium (approx. minutes).
Although maximum loop current primarily function resistor, also affected ambient temperature, slightly Vee- ambient temperature effects temperature dependence diodes' forward voltage drop, causing maximum loop current change Changing affects maximum current that power dissipation changed, thereby changing temperature, which affects diodes' voltage.
maximum loop current affected slightly (<5%) choice resistors, since sense currents through those resistors current supplied transistors.
battery feed resistance determined RRF, adjustable independently current limit. Defined AVjjp/AlL, =400 valid parameter only long lines where current limit effect. short lines, feed resistance high since loop current clamped near constant level. impedance (Return Loss) however, determined affected these parameters. Return loss discussed another section.
application requires that current limit value have temperature dependence, refer section following this design sequence which describes alternate configuration.
Main Protection Resistors (RP)
Transient Currents
purpose protection resistors (RP), along with clamp diodes shown Figure absorb bulk transient energy when transient voltages come from phone line. resistor value must selected limit transient current value which tolerated diodes, while dissipating energy. recommended value shown (100 will limit current from 1500 transient which carried 1N4002 diodes under surge conditions. resistors must type which tolerate high instantaneous energy associated with transients. Resistor manufacturers should consulted this information.
Referring Figure positive transient either Ring, both, will cause transient current delivered Ground. negative transient will cause transient current come from supply line. Therefore, board track supplying MC33121 must designed carry transient currents well normal operating currents. Additionally, since negative transient will cause current flow power supply's negative output, which opposite normal flow current, provisions must made this reverse current flow. suggested method place zener transient suppressor (1N6287 1N6282 across battery supply pins (Vcc Vee) physically adjacent MC33121. inductance associated with board tracks wiring will result insufficient protection MC33121 suppressor located opposite line card, power supplies.
Transient currents reduced increasing value with upper limit determined conditions longest line (highest loop resistance) minimum supply voltage. These conditions determine minimum voltage across transistors, which must
sufficient handle largest (transmit receive) signals. large value selected signals will clipped. recommended that each transistor have less than volt (DC) across their collector emitter. System specifications require more than this.
Since resistors within loop, their tolerance with substantial degradation longitudinal balance. tolerance (20% mismatch) will degrade balance =4.0 device.
Figure Protection Resistors
Selecting Resistors
primary purpose resistors protect pins from transient voltages destructive currents. Internally, these pins have clamp diodes rated maximum under surge conditions only (Figure 32). resistors shown figures, example, will provide protection against surges Resistor manufacturers must consulted proper type resistor this environment.
resistors series with internal resistors, therefore form voltage divider inputs transmit amplifier-, shown Figure This will affect transmit gain, receive gain, return loss, transhybrid rejection (described subsequent sections). tolerance resistors depends value selected them, since mismatch between them will create differential voltage when longitudinal voltages present Ring. ensure minimum longitudinal balance, resistors' absolute value must differ more than With nominal value their tolerance must less. their nominal value less, their tolerance
Longitudinal Impedance (Z|_ong) Selecting Resistors
longitudinal impedance determined resistors pins according following equation:
^Long:
ZLong defined VLong/'Long shown Figure ZLong calculated value ZLong includes fact that resistors parallel with synthesized impedance. tolerance resistors therefore depends much mismatch tolerated between longitudinal impedances Ring. Calculations indicate resistors have tolerance, still comfortably provide minimum longitudinal balance.
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resistors must able withstand transient voltages expected Ring. pins have internal clamp diodes rated maximum under surge conditions only (Figure 33). Resistor manufacturers must consulted proper type resistor this environment.
Terminating Impedance Source Impedance (Zac) Return Loss
return loss measurement measure closely impedance SLIC circuit matches characteristic impedance phone line, reference impedance.
reference impedance some cases, pure resistance (commonly series resistor capacitor (900 2.16 nF), more complex network. achieve proper return loss with MC33121, impedance shown Figure have same configuration reference impedance, with values scaled according equations mentioned below.
CRO, used primarily blocking, generally large value (1.0 p.F) affect impedance RRO. However, included network complex network required.
Figure Longitudinal Impedance
Figure Terminating Impedance
3060
VA-1 0.328
Irxi
cr0~]~
Irxi
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impedance looking into circuit from Ring (set RRO), defined V|_/l|_. Half from Vcc. other half from Ring ground). Each half made synthesized impedance (Zy/2) parallel with Therefore, equal
[Zj/2 //Rs//(RC
{RS//(RC (Zac/2) {RS//(RC (Zac/2)
synthesized impedance created follows:
incoming signal produces differential voltage therefore equal
VTXO
0.328
signal creates current IrxI through RRO. virtual ground, insignificant first order calculations.
IRXI gained factor produce current through transistors.
therefore V[_/It- relationship between
1.037
While equation gives exact value RRO, first order approximation 33.5.
Resistive Loads (with
resistive system, calculates calculates 20.3
resistive system, calculates calculates 31.14 ki2.
Complex Loads
complex (nonresistive) loads, MC33121 must made look like termination impedance equal that complex load. This accomplished configuring
same complex load, with impedance values increased according scaling factor Equation
[(RC k)//RS] 1.037 [(RC k)//RS (Zac/2)]
computed nominal frequency interest. first order approximation Equation
1.037 106/(RC (9a)
example:
load
2.16
Then should
Ring
From
31.15 (RRO) (CRO)
load
Then should
28.4
Ring
must remain series with network provide blocking. load network does include series capacitor second example above), should large (1.0 impedance does affect network. above procedure will yield return loss measurement which constant with respect frequency. resistor, network, must have tolerance equal better than required system tolerance return loss receive gain.
Receive Gain (Grx)
receive gain involves same circuit Figure with addition resistor network) which sets receive gain. Figure
Figure Receive Gain
Ring
_5S9-1 k_TSI
-AAA/-
MC33121
irxi
-AAA^C
CRO~]~
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receive gain (Grx), defined voltage gain from V|_, calculated follows: virtual ground, impedance load {phone line).
current generated transistors Irxi, which equal ItxO)-Ir Vrx/RRX,
VTXO 0.328
ITXO
(10)
Using equations involving Zac, above equations yields:
Therefore,
(Rac//Zac)
(Rac//Zac)
(11)
(12)
Equation applies only case where have same configuration. they also have same magnitude, then receive gain source impedance above circuit Ring Zac. case where Zac, following equation:
_102_
(13)
1.037
where
//RS//(RC
(14)
Resistive Loads
resistive system, 30.6 kii, resistive system, 45.9 kii.
Complex Loads
complex (nonresistive) loads, resistor needs replaced with network having same configuration complex load, with impedance values scaled factor (for gain). gain other than desired, scaling factor determined from Equation This method applies only network been made complex comparable load according procedure previous section (Equations 5-9a), such that Zac. Using scaling factor previous examples, yields:
load
Then should
L-WV-1
andRm9
load
Then should
0.115
Ring
11.2 41.8
2.25
preceeding procedure will yield receive gain which constant with respect frequency. resistor, network, must have tolerance equal better than required system tolerance receive gain.
Transmit Gain (Gtx)
Setting transmit gain involves selecting RTX1 RTX2 Figure voltage gain from calculated from following:
Gtx:
RTX2 0.328 RTX1
(15)
gain, RTX2 3.15 RTX1 (for actual values RTX2 RTX1 critical only their ratio provide proper gain amp. Once ratio established, resistors selected from standard resistor values. minimum value RTX1 limited drive capability TXO, which nominal peak minimum). general rule, RTX1 should between kii. load parallel combination RTX1 RRO.
blocking, typically large value (1.0 |iF) significant impedance. general, should used frequency rolloff that will affect transhybrid rejection (discussed next section). frequency rolloff should done after amp. High frequency roll-off placing capacitor across RTX2.
complex loads Ring), have been made complex comparable load described previous sections, neither RTX1 RTX2 needs complex since both transmit receive signals which appear will flat with respect frequency.
RTX1 RTX2 must have tolerance equal better than required system tolerance transmit gain.
Balance Network (RB) Transhybrid Rejection
When receive signal applied produce signal Ring, two-to-four wire arrangement hybrid (the MC33121) results reflected signal TXO. Transhybrid rejection involves canceling that reflected signal before appears Vjx- method used insert resistor network) shown Figure current supplied from Vrx, cancels current Ijxi supplied from (Node virtual ground). Good transhybrid cancellation requires that currents equal magnitude phase Node
Using equations transmit receive gains, current Ijxi equal
Itxi
33.5
[Zac Z[_) RTX1
case where comparable configuration Z|_:
Since Vrx/RB, then determined from:
RTX1 33.5 [Zac//Zj_]
(17)
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Figure Balance Resistor
-102
Ring MC33121
0.328
A/W-rrx
rtx1
-AA/V-
lB|| RTX2
itx1
Equation provides value resistor which will provide correct magnitude correct phase relationship provided fact that signal phase with that Vrx- phase relationship will only configuration identical that load. This applies regardless whether load, (and RRX) purely resistive complex nature. Equation reduces non-complex resistance RRX, Zac, comparably complex.
case where Zac, Equation reduces
RTX1 (18)
case where have same
frequency characteristics:
case where, reasons cost and/or simplicity, load (Rl) considered resistive (whereas reality pure resistance) therefore resistors, rather than networks, were selected RRX, using simple resistor provide sufficient transhybrid rejection phase angle difference between TXO. terminating impedance therefore necessarily matched exactly line impedance, resulting circuit still provides sufficiently correct performance receive gain, transmit gain, return loss. rejection improved this case replacing with configuration shown Figure Even very short phone line there reactive component load compensation capacitors (Cc, Figure transistor collectors. capacitors considered series with each other, across load shown Figure
simplify explanation, current source Figure replaced with Thevenin voltage source series Zac. Since matched, there will phase shift from signal across Ring. This phase shift also present TXO. same phase shift generated node network making equal Zac, equal load. then calculated from:
RTX1
-(19)
33.5
example, system where load considered
resistor (RRO 20.3 30.6 ki2, RTX1
kQ), would resistor,
network) would resistor parallel
with 0.005 capacitor, calculates 15.715
resistor, network, must have tolerance
equal better than required system tolerance
transhybrid rejection.
Logic Interface
logic circuit (output ST1, labeled ST2/PDI) depicted Figure functions according Status Output Truth Table (Table
Output Characteristics
traditional pull-down with pull-up resistor. Figures indicate output characteristics.
configured with following items: current source pull-down which active only when internally low; current source pull-up which active only when internally high; positive feedback aspect within this output circuit which
Figure Balance Network
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provides considerable hysteresis stability reasons. output characteristics shown Figures this configuration, external pull-up resistance which applied this must greater than output reliably switch from high low. external pull-down resistance does affect this output's ability switch from low-to-high, does affect maximum longitudinal currents which accepted circuit (see section Longitudinal Current Capability). capacitor (Cj) required provide time delay, stability reasons, during transitions between off-hook on-hook. This capacitor additionally affects maximum longitudinal currents, well stability during pulse dialing (explained below).
Hook Status
MC33121 uses sense currents activate hook status circuit. sensing configured such that circuit monitors impedance across Tip/Ring, which results hookswitch thresholds minimally affected battery voltage. off-hook on-hook threshold affected choice according graph Figure affected value on-hook off-hook threshold affected value according graph Figure affected RRF. Varying resistors does affect thresholds significantly.
When telephone on-hook (ST1 High, Low), mc33121 internally powered down, external transistors shut off, power consumption minimum. Upon closure phone's hookswitch, will switch within will then change state slowly external capacitor |if). There =8.0 delay reach threshold necessary activate internal bias circuit, which turn activates external drive transistors supply loop current. This delay necessary prevent instabilities during transition off-hook.
Upon opening telephone's hookswitch, will switch high within =200 |as. then requires reach threshold switch internal bias circuit, which turn shuts down external drive transistors.
Pulse Dialing
During pulse dialing, will change state concurrent with hookswitch. kept from switching during pulse dialing external capacitor (Cy), which keeps MC33121 powered condition stable. capacitor small, voltage could drop threshold (see section below) during each pulse. This could cause MC33121 create additional noise line would cycle between power-up power-down condition with each dialing pulse.
Fault Detection
Faults defined excessive leakage from and/or ground, from Ring and/or ground. single fault above conditions, while double fault defined excessive leakage from from Ring Vqq, depicted Figure Refer Figures 11-15 resistance, R|_k. which will cause MC33121 switch power-down condition. leakage resistance less than that indicated graphs, MC33121 will power-down itself external transistors, thereby protecting them from overheating. Both status outputs (ST1 ST2) will logic low, indicating fault condition. fault condition detected monitoring imbalance magnitudes currents RSI, and/or polarity reversal Ring.
MC33121 will detect following conditions:
When on-hook (see Figure 11):
<2.6 between Ring (depending Vee). with hysteresis this threshold,
<3.7 between (depending Vee). with hysteresis this threshold,
Both simultaneously.
Leakage from and/or Ring detected faults while MC33121 on-hook.
When off-hook (367 between Ring):
<400 between ki2),
<1800 between Vee.
<400 between Ring kQ).
<1800 between Ring Vqq,
Both simultaneously
Figure Fault Detection
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simultaneous occurrence conditions detected fault. Figures threshold variation with Vee- Resetting fault detection circuit requires that leakage resistance increased value between depending Vee, R|_, Both should monitored hookswitch status preclude detecting fault condition.
Figure indicates variation fault thresholds Tip-to-VQQ Ring-to-Battery faults, valid only loop resistances loops larger than MC33121 does reliably indicate fault condition ST2, indicate on-hook status instead. This does apply Tip-to-Battery Ring-to-VQQ faults which correctly detected lines beyond
Input
output also used input (PDI Input) power down circuit, denying loop current subscriber shutting external pass transistors), regardless hookswitch position. Powering down accomplished pulling logic with open collector output, transistor shown Figure switching threshold =1.5 current PDI, when pulled low, =800 |dA. Releasing allows MC33121 resume normal operation.
external telephone off-hook while MC33121 powered down, sense currents will result some loop current flowing through loop back into RSI. This current generally order determined primarily resistors, loop resistance, Vee- will continue indicate telephone's actual hook status while held low. on-to-off hook threshold same that during normal operation, off-to-on hook threshold >250
When powered down with pin, receive gain (Vrxi Tip/Ring) muted transmit gain (Tip/Ring TXO) muted
Power Dissipation, Calculation Considerations
Reliability
maximum power dissipated MC33121 must considered, managed, exceed junction temperature listed Maximum Ratings Table. Exceeding this temperature recurring basis will reduce long term reliability, possibly degrade performance. junction temperature also affects statistical lifetime device, long term thermal effects within package. Today's plastic integrated circuit packages reliable ceramic packages under most environmental conditions. However, when ultimate system reliability required, thermal managements must considered prime system design goal.
Modern plastic package assembly technology utilizes gold wire bonded aluminum bonding pads throughout electronics industry. When exposed high temperatures protracted periods time intermetallic compound form bond area resulting high impedance contacts degradation device performance. Since formation intermetallic compounds directly related device junction temperature, incumbent designer determine that device junction temperature consistent with system reliability goals.
motorola
Based results almost years operating life testing, Table been derived indicating relationship between junction temperature time 0.1% wire bond failure.
Table Statistical Lifetime
Junction Time Time
Temperature (Hours) (Years)
1,032,200 117.8
419,300 47.9
178,700 20.4
79,600
37,000
17,800
8,900
Motorola MECL Device Data, DL122
"Time" Table refers time device operating that junction temperature. Since MC33121 power condition (nominally when on-hook, duty cycle must considered. example, statistical duty cycle off-hook time used, operation junction temperature (when off-hook) would result statistical lifetime years.
Power Junction Temperature Calculation
power within calculated subtracting power dissipated two-wire side (the transistors load) from power delivered power supplies. Refer Figure
|vdd IddI |VEE IeeI vENl) (20)
terms voltages, with respect ground, pins. These voltages measured, approximated
|VEEl (l|_
Refer Figure junction temperature then calculated from:
eja) (21)
where ambient temperature package, junction-to-ambient thermal resistance shown Figure highest junction temperature will occur maximum Vqd. maximum loop current, maximum ambient temperature.
above calculations indicate junction temperature will exceed maximum specified, then necessary reduce maximum loop current, ambient temperature, and/or supply voltage. flow should restricted near tall components other objects since even small amount flow substantially reduce junction temperature. example, typically flow LFPM (3.5 mph) reduce effective from that which occurs still air. Additionally, providing much copper area possible pins will assist drawing away heat from within package. For,additional information this subject, refer "Thermal Considerations" section Motorola MECL System Design Handbook, "System Design Considerations" section Motorola MECL Device Data.
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Figure Thermal Resistance (Junction-to-Ambient)
C331 sold ered DBos
Selecting Transistors
specifications loop current pass transistors involve their current gain, voltage rating, power dissipation capabilities highest ambient temperatures. Power dissipation during both normal operation faults must considered when determining worst case situations. Generally, more power dissipated during fault condition than during normal operation.
transistors' minimum beta recommended loop currents involved application. lower beta could degrade gain balance performance. Maximum beta should less than prevent possible oscillations. Darlington type transistors should used. voltage rating should consistent with maximum Vee. expected transients, protection scheme used.
Referring Figure during normal operation loop current voltage across transistors both maximum when load impedance (R|_) minimum. loop current determined graphs Figures 5-7. voltage across each transistor determined from following:
IVEEI [(65 R|_)
(22)
power each transistor then l|_). voltage across transistors will always nearly equal during normal operation, resulting equal power dissipation. graph Figure indicates power dissipated each transistor where
During fault condition, depicted Figure leakage resistance from
from Ring less than that shown Figures 12-14 (when off-hook), MC33121 will power down transistors protect them from overheating. Should leakage resistance slightly higher than that shown graphs, however, fault detection been activated, power transistor single fault, both transistors double fault) will higher than normal. power will depend Vee. R|_> leakage resistance. Table guide power transistor dissipating higher power level. power watts) right columns indicates power dissipated that transistor carrying maximum fault current. system designer should attempt predict possible fault conditions system, then
measure conditions transistors during worse case fault(s).
Table Transistor Power During Fault
pPNP pNPN
0.835 0.615
0.257 0.176
0.601 0.185
0.109 0.057
most applications involving maximum loop current 30-40 maximum where faults occur, MJD243 MJD253 DPAK transistors recommended. When mounted described their data sheet, they will handle both normal loop current well most fault conditions. faults expected occur particular application, then smaller package transistors, such MPS6717 MPS6729, used. Each application must evaluated individually when selecting transistors.
Other possible transistors which considered:
MJD253-1
MJE253
MJD32
MJD42
MJD350
TIP30A,B,C
MJD243-1
MJE243
MJD31
MJD41
MJD340
TIP29A,B,C
Longitudinal Current Capability
maximum longitudinal current which handled without distortion function loop current, battery feed resistance, longitudinal impedance, components ST2.
Since pass transistors cannot pass current reverse direction, loop current provides upper boundary peak longitudinal current plus peak speech signal current. battery feed resistance determines, effect, voltage across transistors, which measure headroom available circuit handle peak longitudinal voltage plus peak speech signal voltage. longitudinal impedance, determined resistors (equation determines longitudinal current given longitudinal voltage.
While analysis above items yield value maximum longitudinal current, different limit (which higher lower) imposed capacitor pulldown resistance (ST2). This fact that sense currents will alternately mismatched Ring move down together presence longitudinal signals. When longitudinals strong, internal fault detect circuit activated with each cycle, which attempts switch (see section Fault Detection). speed which switch function both external capacitor, pulldown resistance,
graphs Figures indicate maximum longitudinal current which handled Ring) without distortion causing switch low.
Board Layout Considerations
board considerations include thermal, RFI/EMI, transient conditions, interconnection four wire side codec/filter, others. Wirewrapped boards should
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avoided breadboarding should done least) reasonably neat board.
Thermal
Power dissipated MC33121 transistors must removed prevent excessively high junction temperatures. equations calculating junction temperatures mentioned elsewhere this data sheet. Heat removed both flow copper foil board. Since even small amount flow substantially reduces junction temperatures compared still air, tall components other objects should placed such that they block flow across heat generating devices. Increasing, wherever possible, area copper foil pins will provide additional heat removal capability. ground plane generally help here, while same time helping reduces problems.
RFI/EMI
While MC33121 intended audio frequencies, internal amplifiers have bandwidths excess MHz, therefore respond externally induced EMI. Interference signals come phone line, radiated board from nearby radio stations from high frequency circuitry (digital microprocessor circuitry) vicinity line card.
Usually entering from phone line Ring removed compensation capacitors (Cq) provided they connected good quality ground (generally same ground which connects MC33121). ground track should wide direct possible minimize lead inductance. Generally better results obtained bleedoff earth chassis)
ground provided where twisted pair phone line comes into system.
minimize problems noise radiating directly onto board from nearby high frequency circuitry, components associated with MC33121 should physically close possible most sensitive pins this respect RSI, TSI, pins. Keeping tracks short minimizes their "antenna" effect.
Transient Conditions
When transient voltages come Ring, transient currents, which several amperes, must carried ground line (Vqc) and/or lir|e. These tracks, along with protection clamping devices, must designed these currents frequencies involved. tracks narrow, only they destroyed high currents, their inductance allow voltage other nearby components, rise damaging levels.
protection circuits shown Figure other figures this data sheet, such that bulk transient energy dissipated external components (the protection resistors clamp diodes). MC33121 internal diodes limit voltage excursions pins, pass small amount transient current typically less than peak. arrangement diodes shown Figure
Interconnection four-wire side
connections four-wire side codec other digital circuitry involves keeping digital noise speech paths, also ensuring that potentially destructive transients Ring through +5.0 system.
Figure Protection Diodes
zener diodes except where noted.
MC33121
+5.0
VDG. Digital /-fn Ground
Analog Ground
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Basically, digital connections should referenced ar|d p'ns' while transmit receive analog signals should referenced analog ground (Vag)- should connected clean battery ground, generally should connected directly and/or line card) when strong transients anticipated. Even with good layout, move several volts when transient hits, possibly damaging components +5.0 line their grounds have direct connection line card. MC33121 designed allow move much with respect transient basis only. other grounds should preferably connected together power supply rather than Internally, MC33121 clamp diodes 4-wire side pins indicated Figure
codec single ground pin, Figure will reference both digital analog signals, must connected both ancl MC33121. codec separate digital analog grounds, Figure (the MC145503 internally generates
analog ground), then each ground should connected appropriate ground MC33121.
Other
capacitor should provided across MC33121 help keep idle channel noise minimum.
capacitor pin) forms pole with internal resistor filter noise from pin, providing internal quiet battery supply speech amplifiers. Power supply rejection will depend value quality this capacitor frequencies concern. Tantalum capacitors generally have better high frequency characteristics then electrolytics. Figure ripple rejection characteristics (the four-wire data measured (TXO)). Figure indicates ripple rejection from +5.0 supply (Vqd).
general, board tracks carrying analog signals four-wire side Tip/Ring) should routed through digital section where they could pick digital noise. tracks longer than inches should considered
Figure Connection CODEC With Single Ground
10uf|hhyob_v.eej
Battery Ground Digital Ground
+5.0
-5.0
Digital Interface
Battery Supply
Figure Connection CODEC With Separate Grounds
MC33121
vqb_ _veeJ
^A/W-
Battery Ground Digital Ground +5.0
MC145503
-5.0
Digital Interface
Battery Supply
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antenna should checked potential noise pickup which could affect circuit operation.
Alternate Circuit Configurations
Loop Current Limit
Replacing resistor with circuit Figure will change loop current characteristics ways from graphs Figures 5-7; maximum loop current short line reduced while increasing current long line, temperature dependence maximum current reduced external reference diode.
Figure Alternate Current Limit Circuit
LM385-1.2
LM385-1.2 precision temperature stable zener diode. load impedance Ring reduced, voltage goes increasingly negative. When zener diode turned current into then clamped value determined RRF1 zener diode. calculate resistors, following procedure:
RRF1 must >0.7 (RRF1 RRF2);
Determine RRF1 current limit short line using following equation:
RRF1
1.23
'L(max)
(23)
Then using Equation calculate long line current. RRF2 then determined
RRF2 RRF1
(24)
Figure illustrates example using above circuit. Comparing this graph 5100 curve Figure shows substantial decrease current limit resulting reduced power consumption dissipation. this circuit does affect hookswitch fault thresholds.
Protection Scheme
protection circuit shown Figure advantage drawing =90% transient current from ground (VCC) negative transient, rather than from line circuit Figure does. majority transient current flows through resistors Mosorbs while
small amount (=10%) flows through sense resistors pins. positive transient, current directed ground. diode NPN's collector prevents reverse current through base-collector junction transistor during negative transient.
Figure Loop Current versus Loop Resistance Alternate Loop Current Limit Configuration
RRF2
R|_, LOOP RESISTANCE
Figure Alternate Protection Scheme
1.5KE15
0.01
100V
0.01 100V
MC33121
TipD
Ring
zener diodes except noted.
VeeL.
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MC33121
CIRCUIT PERFORMANCE
following three circuits presented typical application examples, accompanying graphs indicate their measured performance. first circuit (Figure pure resistance load. second circuit (Figures load resistor series with 2.16 capacitor. third circuit (Figure
Figure System
load, complex network composed resistor parallel with 0.115 |iF, those series with resistor. graphs Figures 49-51, Return Loss, Transhybrid Rejection, Transmit Gain, Receive Gain.
MC33121
+5.0
5.0|aF
ST2/PDI
30.6
20.3 15.8k
-wv-10k
Figure 2.16 System
MC33121
+5.0
ST2/PDI
Receive (VRX)
Transmit (Vjx)
Receive (Vrx)
Transmit (VTX)
MC33121
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Figure System
Figure Circuit Performance, System Figure Circuit Performance
2.16 System
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+0.2 -0.2
Figure Circuit Performance Q//0.115 System
GRX,
FREQUENCY (Hz)
Figure Return Loss Test Circuit Figures
Reference Network R/\c Figures Return Loss log|
VA-VB
GLOSSARY
ATTENUATION decrease magnitude communication signal, usually expressed
BALANCE NETWORK That part SLIC circuit which provides transhybrid rejection.
BANDWIDTH range information carrying frequencies communication system.
BATTERY voltage which provides loop current, some cases powers SLIC circuit. name derives from fact that have always used batteries, conjunction with power, provide this voltage.
BATTERY FEED RESISTANCE equivalent Thevenin resistance SLIC circuit supplying loop current. Traditionally
C-MESSAGE FILTER frequency weighting which evaluates effects noise typical subscriber's system.
CENTRAL OFFICE Abbreviated main telephone office, usually within miles subscribers, that houses switching gear interconnection within exchange area, rest telephone system. typical handle 10,000 subscriber numbers.
CODEC Coder/Decoder Interfacing between SLIC digital switch, converts SLIC's transmit signal digital, converts digital receive signal analog.
power voltage measurement unit, referred another power voltage. generally computed power measurements, (V-| voltage measurements.
indication signal power. across 0.775 Vrms, defined dBm. other voltage level converted (Vrms/0.775), (Vrms)] 2.22.
dBmp Indicates measurement using psophometric weighting filter.
dBrn Indicates measurement relative power level into Generally used noise measurements, dBrn dBm.
dBrnC Indicates dBrn measurement using C-message weighting filter.
DTMF Dual Tone Multifrequency. "tone dialing" system based outputting non-harmonic related frequencies simultaneously identify number dialed. Eight frequencies have been assigned four rows four columns keypad.
FAULT incorrect condition where accidentally connected battery voltage, Ring connected ground, both. most common fault Ring ground.
FOUR WIRE CIRCUIT portion telephone, central office, which operates pairs wires. pair transmit path, pair receive path.
FULL DUPLEX transmission system which permits communication both directions simultaneously. standard handset telephone system full duplex.
GAIN change signal amplitude (increase decrease) after passing through amplifier, other circuit stage. Usually expressed increase positive number, decrease negative number.
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HALF DUPLEX transmission system which permits communication direction time. radios, with "push-to-talk" switches, voice activated speakerphones, half duplex.
HOOKSWITCH switch, within telephone, which connects telephone circuit subscriber loop. name derives from telephones where switch activated lifting receiver onto hook side phone.
HYBRID Another name two-to-four wire converter.
IDLE CHANNEL NOISE Residual background noise when transmit receive signals absent.
LINE CARD board circuitry which connects subscriber's phone line. line card hold circuitry subscriber, number subscribers.
LONGITUDINAL BALANCE ability SLIC reject longitudinal signals Ring.
LONGITUDINAL SIGNALS Common mode signals.
LOOP loop formed subscriber wires (Tip Ring) connected telephone end, central office PBX) other end. Generally, floating system referred ground, power.
LOOP CURRENT current which flows through subscriber loop. typically provided central office PBX, ranges from
OFF-HOOK condition when telephone connected phone system, permitting loop current flow. central office detects current indication that phone busy.
ON-HOOK condition when telephone disconnected from phone system, loop current flows. central office regards on-hook phone available ringing.
PABX Private Automatic Branch Exchange. effect, miniature central office, customer owned switching system servicing phones within facility, such office building. portion PABX connects Bell other local) telephone system.
PROTECTION, PRIMARY Usually consisting carbon blocks discharge tubes, absorbs bulk lightning induced transient clamping voltages less than +1500
PROTECTION, SECONDARY Usually located line card, protects SLIC associated circuits from transient surges. Typically, must capable clamping surge duration.
PULSE DIALING dialing system whereby loop current interrupted number times quick succession. number interruptions corresponds number dialed, interruption rate typically second. rotary phones, many pushbutton phones, pulse dialing.
RECEIVE PATH Within speech path from internal switching system towards phone line (Tip Ring).
Ringer Equivalence Number. indication impedance loading factor telephone bell ringer circuit. equals =8.0 Bell system typically permits maximum (1.6 individual subscriber line. minimum required Bell system.
RETURN LOSS Expressed measure well SLIC's impedance matches line's characteristic impedance. With perfect match, there reflected signal, therefore infinite return loss. calculated from:
(zLine ZCKT) (ZLine ZcKT)
RING wires connecting central office telephone. name derives from ring portion plugs used operators older equipment) make connection. Ring traditionally negative with respect Tip.
SLIC Subscriber Line Interface Circuit. circuitry within which connects user's phone line.
SUBSCRIBER customer telephone line.
SUBSCRIBER LINE system consisting user's telephone, interconnecting wires, central office equipment dedicated that subscriber (also referred loop).
wires connecting central office telephone. name derives from plugs used operators older equipment) make connection. traditionally positive with respect Ring.
TRANSHYBRID REJECTION rejection reflected signal transmit path resulting from receive signal applied SLIC.
TRANSMIT PATH Within speech path from phone line (Tip Ring) towards internal switching system.
WIRE CIRCUIT Refers wires connecting central office subscriber's telephone. Commonly referred Ring, wires carry both transmit receive signals differential manner.
TWO-TO-FOUR WIRE CONVERTER circuit which four wires side) (signal ground) outgoing signal, forthe incoming signal. outgoing signal sent differentially wire side (the other side), incoming differential signals received wire side directed four wire side. Additional circuit within cancels reflected outgoing signal keep separate from incoming signal.
VOICEBAND That portion audio frequency range used transmission across telephone system. Typically, 3400
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OUTLINE DIMENSIONS
SUFFIX
PLASTIC PACKAGE CASE 738-03
|-f| 0.25(0.010)
NOTES:
DIMENSIONING TOLERANCING ANSI Y14.5M, 1982.
CONTROLLING DIMENSION: INCH.
DIMENSION CENTER LEAD WHEN FORMED PARALLEL
DIMENSION DOES INCLUDE MOLD FLASH.
MILUMETERS INCHES
25.66 27.17 1.010 1.070
6.10 6.60 0.240 0.260
3.81 4.57 0.150 0.180
0.39 0.55 0.015 0.022
1.27 0.050
1.27 1.77 0.050 0.070
2.54 0.100
0.21 0.38 0.008 0.015
2.80 3.55 0.110 0.140
7.62 0.300
0.51 1.01 0.020 0.040
SUFFIX
PLCC CASE 776-02
|-f| 0.1810.007)
LEADS ACTUAL J-EB
(NOTE EEbJ
|-f| 0.18(0.007)
0.25 (0.010)
0.18 (0.007)
018(0007)
SEATING PUNE
0.18(0.007)
0.18(0.007)
0.18(0.007)
0.18(0.007)
MILUN ETERS INCHES
12.32 12.57 0.485 0.495
12.32 12.57 0.485 0.495
4.20 4.57 0.165 0.180
2.29 2.79 0.090 0.110
0.33 0.48 0.013 0.019
1.27 0.050
0.66 0.81 0.026 0.032
0.51 0.020
0.64 0.025
11.43 11.58 0.450 0.456
11.43 11.58 0.450 0.456
1.07 1.21 0.042 0.048
1.07 1.21 0.042 0.048
1.07 1.42 0.042 0.056
0.50 0.020
10.42 10.92 0.410 0.430
1.02 0.040
NOTES:
SPACE LIMITATION, CASE 776-02 SHALL REPRESENTED GENERAL (SMALLER) CASE OUTLINE DRAWING RATHER THAN SHOWING LEADS.
DATUMS -L-, -M-, -N-, DETERMINED WHERE LEAD SHOULDER EXIT PLASTIC BODY MOLD PARTING UNE.
TRUE POSITION MEASURED DATUM -T-, SEATING PLANE.
RAND INCLUDE MOLD PROTRUSION. ALLOWABLE MOLD PROTRUSION 0.25 (0.010) SIDE.
DIMENSIONING TOLERANCING ANSI Y14.5M. 1982.
CONTROLLING DIMENSION: INCH.
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Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. 'Typical" parameters vary different applications. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
Literature Distribution Centers:
USA: Motorola Literature Distribution; P.O. 20912; Phoenix, Arizona 85036.
EUROPE: Motorola Ltd.; European Literature Centre; Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan.
ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, King Street, Industrial Estate,
N.T., Hong Kong.
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