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case outlines radiation requirements. -tmh option throughout document. dose rate note paragraph 1.5. dose rate requirement paragraph 3.3. appendix requirements case outline -tmh case outline Update boileplate. -phn Correct footnote 1.2.2 Device type. footnote Absolute maximum ratings. Remove buffer test table -phn Schmitt trigger test, table Update boilerplate. -phn VDDC Cold spare inputs-"On" table Correct labels case figure
00-02-08 00-03-30 00-06-13 01-02-02 01-05-03 02-05-22 05-03-03 05-04-04 05-11-01
Monica Poelking Monica Poelking Monica Poelking Thomas Hess Thomas Hess Thomas Hess Thomas Hess Thomas Hess Thomas Hess
SHEET SHEET STATUS SHEETS PMIC
SHEET
PREPARED Thomas Hess
DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 http://www.dscc.dla.mil
STANDARD MICROCIRCUIT DRAWING
THIS DRAWING AVAILABLE DEPARTMENTS AGENCIES DEPARTMENT DEFENSE
CHECKED Thomas Hess APPROVED Monica Poelking DRAWING APPROVAL DATE 99-06-22
MICROCIRCUIT, DIGITAL, GATE ARRAY, MONOLITHIC SILICON
AMSC
REVISION LEVEL
SIZE
CAGE CODE
67268
5962-99B01
DSCC FORM 2233
SHEET
5962-E518-05
SCOPE Scope. This drawing documents product assurance class levels consisting high reliability (device classes space application (device class choice case outlines lead finishes available reflected Part Identifying Number (PIN). When available, choice Radiation Hardness Assurance (RHA) levels reflected PIN. PIN. shown following example: 5962 Federal stock class designator designator (see 1.2.1) Drawing number 1.2.1 designator. Device classes marked devices meet MIL-PRF-38535 specified levels marked with appropriate designator. Device class marked devices meet MIL-PRF-38535, appendix specified levels marked with appropriate designator. dash indicates non-RHA device. 1.2.2 Device type(s). device type(s) identify circuit function follows: Device type Generic number 06MRA010 06MRA025 06MRA050 06MRA075 06MRA100 06MRA150 06MRA200 06MRA250 06MRA300 06MRA350 06MRA400 06MRA450 06MRA500 06MRA550 06MRA600 Circuit function 10,000 gates available 25,000 gates available 50,000 gates available 75,000 gates available 100,000 gates available 150,000 gates available 200,000 gates available 250,000 gates available 300,000 gates available 350,000 gates available 400,000 gates available 450,000 gates available 500,000 gates available 550,000 gates available 600,000 gates available Signal Power Ground Pads 99B01 Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5)
1.2.3 Device class designator. device class designator single letter identifying product assurance level follows: Device class Device requirements documentation Vendor self-certification requirements MIL-STD-883 compliant, non-JAN class level microcircuits accordance with MIL-PRF-38535, appendix Certification qualification MIL-PRF-38535
These devices capable being configured support dual voltage: core bus, core and/or bus, core/5 bus. supply voltage range shall specified AID. Includes pins that reserved JTAG boundary scan. Reserved dedicated VDD/VSS VDDQ/VSSQ.
STANDARD MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
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1.2.4 Case outline(s). case outline(s) designated MIL-STD-1835 follows: Outline letter Descriptive designator CQCC2-F172 CQCC2-F196 CQCC1-F132 figure figure CQCC1-F172 CQCC1-F84 figure figure Terminals Package style Quad leaded chip carrier Quad leaded chip carrier Unformed-lead chip carrier Non-conductive tiebar Ceramic flatpack Ceramic flatpack Unformed leaded chip carrier Ceramic Flatpack Ceramic Flatpack Ceramic Flatpack
1.2.5 Lead finish. lead finish specified MIL-PRF-38535 device classes MIL-PRF-38535, appendix device class Absolute maximum ratings. supply voltage (VDD) Volt configuration Volt configuration Voltage (VI/O) Volt configuration Volt configuration Storage temperature (TSTG) Maximum junction temperature (TJ). Latchup immunity (ILU) input current (II) Lead Temperature (soldering sec) Recommended operating conditions. Positive supply voltage (VDD) Volt configuration Volt configuration Case temperature range (TC). input voltage (VIN) Radiation features. Total dose (Dose rate Rad(Si)/s) Single event phenomenon (SEP) effective LET, upset LET, latchup Dose rate upset pulse) Dose rate latchup Dose rate survivability Neutron irradiated
-0.3 -0.3 -0.3 -0.3 -65°C +150°C +175°C ±150 +300°C
-55°C +125°C Rads (Si) MeV-cm Rad(Si)/s 1011 Rad(Si)/s 1011 Rad(Si)/s 1014 n/sq
Digital logic testing device classes Fault coverage measurement manufacturing logic tests (MIL-STD-883, test method 5012) specified
Stresses above absolute maximum rating cause permanent damage device. Extended operation maximum levels degrade performance affect reliability. dose rate shall Rad(Si)/s unless otherwise specified AID. When characterized result procuring activities request, condition will specified. cold spare mode (VDD VSS), VI/O would maximum recommended operating condition.
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APPLICABLE DOCUMENTS Government specification, standards, handbooks. following specification, standards, handbooks form part this drawing extent specified herein. Unless otherwise specified, issues these documents those cited solicitation contract. DEPARTMENT DEFENSE SPECIFICATION MIL-PRF-38535 Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines.
DEPARTMENT DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 List Standard Microcircuit Drawings. Standard Microcircuit Drawings.
(Copies these documents available online www.dodssp.daps.mil from Standardization Document Order Desk, Robbins Avenue, Building Philadelphia, 19111-5094.) Government publications. following document(s) part this document extent specified herein. Unless otherwise specified, issues documents which adopted those listed issue DODISS cited solicitation. Unless otherwise specified, issues documents listed DODISS issues documents cited solicitation. INSTITUTE ELECTRICAL ELECTRONICS ENGINEERS (IEEE) IEEE Standard 1149.1 IEEE Standard Test Access Port Boundary Scan Architecture. (Applications copies should addressed Institute Electrical Electronics Engineers, Hoes Lane, Piscataway, 08854-4150.) (Non-Government standards other publications normally available from organizations that prepare distribute documents. These documents also available through libraries other informational services.) Order precedence. event conflict between text this drawing references cited herein, text this drawing takes precedence. Nothing this document, however, supersedes applicable laws regulations unless specific exemption been obtained. REQUIREMENTS Item requirements. individual item requirements device classes shall accordance with MIL-PRF-38535 specified herein modified device manufacturer's Quality Management (QM) plan. modification plan shall affect form, fit, function described herein. individual item requirements device class shall accordance with MIL-PRF-38535, appendix non-JAN class level devices specified herein. 3.1.1 Microcircuit die. requirements microcircuit die, appendix this document.
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Design, construction, physical dimensions. design, construction, physical dimensions shall specified MIL-PRF-38535 herein device classes MIL-PRF-38535, appendix herein device class 3.2.1 Case outlines. case outlines shall accordance with 1.2.4 herein specified figure 3.2.2 Radiation exposure circuit. radiation exposure circuit shall specified figure requirements. AIDs written against this shall sent DSCC-VA. following items shall provided device manufacturer customer part AID. 3.3.1 Terminal connections assignments. 3.3.2 Package type (see 1.2.4). 3.3.3 Functional block diagram equivalent behavioral description). 3.3.4 Functional description terms symbols. 3.3.5 Logic diagram equivalent structural description mutually agreed list). 3.3.6 function description. 3.3.7 Design tape Design document name (i.e., list). 3.3.8 Design functional tape name. 3.3.9 Test functional tape name. 3.3.10 Timing diagram(s). 3.3.11 Fault coverage measurement manufacturing logic tests. 3.3.12 Burn-in circuit. 3.3.13 class voltage. 3.3.14 Device electrical performance characteristics (additions Table Device electrical performance characteristics shall include parametric, functional, parameters other data which would considered required design engineer. electrical performance characteristics apply over full recommended ambient operating temperature range specified test load conditions. 3.3.15 Maximum power dissipation. Maximum power dissipation shall accordance with application specific design. 3.3.16 Supply voltage range. supply voltage range shall specified AID. 3.3.17 Dose rate. dose rate shall Rad(Si)/s unless otherwise specified AID. Electrical performance characteristics postirradiation parameter limits. Unless otherwise specified herein, electrical performance characteristics postirradiation parameter limits specified table shall apply over full case operating temperature range. Electrical test requirements. electrical test requirements shall subgroups specified table electrical tests each subgroup defined table
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Marking. part shall marked with listed herein. addition, manufacturer's also marked listed MIL-HDBK-103. packages where marking entire number feasible space limitations, manufacturer option marking "5962-" device. product using this option, designator shall still marked. Marking device classes shall accordance with MIL-PRF-38535. Marking device class shall accordance with MIL-PRF-38535, appendix number shall added marking manufacturer. 3.6.1 Certification/compliance mark. certification mark device classes shall "QML" required MIL-PRF-38535. compliance mark device class shall required MIL-PRF-38535, appendix Certificate compliance. device classes certificate compliance shall required from QML-38535 listed manufacturer order supply requirements this drawing (see 6.6.1 herein). device class certificate compliance shall required from manufacturer order listed approved source supply MIL-HDBK-103 (see 6.6.2 herein). certificate compliance submitted DSCC-VA prior listing approved source supply this drawing shall affirm that manufacturer's product meets, device classes requirements MIL-PRF-38535 herein device class requirements MIL-PRF-38535, appendix herein. Certificate conformance. certificate conformance required device classes MIL-PRF-38535 device class MIL-PRF-38535, appendix shall provided with each microcircuits delivered this drawing. Notification change device class device class notification DSCC-VA change product (see herein) involving devices acquired this drawing required change defined MIL-PRF-38535, appendix 3.10 Verification review device class device class DSCC, DSCC's agent, acquiring activity retain option review manufacturer's facility applicable required documentation. Offshore documentation shall made available onshore option reviewer. 3.11 Microcircuit group assignment device class Device class devices covered this drawing shall microcircuit group number (see MIL-PRF-38535, appendix
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TABLE Electrical performance characteristics. Conditions -55°C +125°C Symbol unless otherwise specified
Test Low-level input voltage inputs CMOS inputs High-level input voltage inputs CMOS inputs Schmitt Trigger, positive going threshold CMOS Schmitt Trigger, negative going threshold CMOS Schmitt Trigger, typical range hysterisis CMOS Input leakage current TTL, CMOS Schmitt inputs Inputs with pull-down resistors Inputs with pull-down resistors Inputs with pull-up resistors Inputs with pull-up resistors Cold spare inputs "Off" Cold spare inputs "On" Low-level output voltage buffer buffer buffer TTL12.0 buffer CMOS outputs CMOS outputs (Optional) CMOS outputs (Cold spare) High-level output voltage buffer buffer buffer TTL12.0 buffer CMOS outputs CMOS outputs (Optional) CMOS outputs (Cold spare) footnotes table.
Group subgroups
Device type
Limits 0.3VDD 0.7VDD
Unit
0.7VDD VTVDD 0.3VDD VDDC 12.0 100.0 100.0 -2.0 -4.0 -8.0 -12.0 -1.0 -100.0 -100.0 -225 0.05 0.25 0.25
0.05 0.35 0.35
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TABLE Electrical performance characteristics. Conditions -55°C +125°C unless otherwise specified Three-state output leakage current buffer buffer buffer TTL12.0 buffer Cold spare inputs "Off" Cold spare inputs "On" Short-circuit output current buffer buffer buffer TTL12.0 buffer Quiescent supply current
Test
Symbol
Group subgroups
Device type
Limits
Unit
VDDC
-100 -200 -300
IDDQ
200K gates 400K gates 600K gates 200K gates 400K gates 600K gates 200K gates 400K gates 600K gates
Input capacitance Output capacitance buffer buffer buffer TTL12.0 buffer Bidirect capacitance buffer buffer TTL12.0 buffer notes table.
COUT
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TABLE Electrical performance characteristics. Conditions -55°C +125°C unless otherwise specified Low-level input voltage CMOS inputs High-level input voltage CMOS inputs Schmitt Trigger, positive going threshold Schmitt Trigger, negative going threshold Schmitt Trigger, typical range hysterisis Input leakage current CMOS Schmitt inputs Inputs with pull-down resistors Inputs with pull-down resistors Inputs with pull-up resistors Inputs with pull-up resistors Cold spare inputs "Off" Cold spare inputs "On" Low-level output voltage CMOS outputs CMOS outputs (Optional) CMOS outputs (cold spare) High-level output voltage CMOS outputs CMOS outputs (Optional) CMOS outputs(cold spare) footnotes table. -1.0 -100.0 -100.0 100.0 100.0 0.05 0.35 0.35 VTVH VDDC 0.05 0.25 0.25 -225 0.3VDD 0.7VDD 0.7VDD
Test
Symbol
Group subgroups
Device type
Limits 0.3VDD
Unit
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TABLE Electrical performance characteristics. Conditions -55°C +125°C unless otherwise specified Three-state output leakage current CMOS Cold spare inputs "Off" Cold spare inputs "On" Short-circuit output current CMOS Quiescent supply current IDDQ 200K gates 400K gates 600K gates 200K gates 400K gates 600K gates 200K gates 400K gates 600K gates Input capacitance Output capacitance CMOS Bidirect capacitance CMOS Notes: These devices capable being configured support dual voltage: core/3.3 core/5 bus. supply voltage range shall specified AID. Devices supplied this drawing will meet levels irradiation. However, this device only tested level. Post irradiation values identical unless otherwise specified Table When performing post irradiation electrical measurements level, Functional tests conducted accordance with MIL-STD-883 with following input conditions: VIH(min) 20%, VIL(max) +0%, -50%, specified herein TTL, CMOS, Schmitt compatible inputs. Devices tested using input voltage within above specified range, guaranteed VIH(min) VIL(max). Supplied design limit guaranteed tested. more than output shorted time maximum duration second. inputs with internal pull-ups should left floating. other inputs should tied high low. Capacitance measured initial qualification when design changes affect value. Capacitance measured between designated terminal frequency signal amplitude RMS. COUT -200 VDDC
Test
Symbol
Group subgroups
Device type
Limits
Unit
STANDARD MICROCIRCUIT DRAWING
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Case
Figure Case outline.
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Case
Symbol D1/E1 D2/E2
Millimeters 3.76 3.25 0.152 0.102 0.254 0.203 77.22 33.68 34.34 29.5 0.50 14.96 1.326 0.006 0.004
Inches 0.148 0.128 0.010 0.008 3.040 1.352
1.1614 0.020 0.589
Figure Case outline Continued.
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Case
VDDQ VSSQ
VDDQ VSSQ
Figure Case outline Continued.
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Case Continued
Figure Case outline Continued.
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Case Continued Symbol D1/E1 D2/E2 Notes: exposed metalized areas gold plated over nickel plating. Capacitor mounting pads dimensioned AVX/MIL-C-55681, CDR05, chip capacitor. Capacitor mounting pads labeled VSS, VDD, VSSQ, VDDQ connected their respective internal ground power planes. electrically connected VSS. These areas have notches tabs different than shown. 75.946 0.762 0.051 0.152 0.127 41.529 Millimeters 3.302 2.667 0.356 0.254 0.203 42.291 0.002 0.006 0.005 1.635 1.500 0.020 5.080 1.016 77.978 76.454 51.308 2.990 0.030 0.200 0.040 3.070 3.010 2.020 Inches 0.130 0.105 0.014 0.010 0.008 1.665
34.925 0.508
Figure Case outline Continued.
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Case
Figure Case outline Continued.
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Symbol D1/E1 D2/E2
Millimeters 3.302 2.667 0.356 0.152 0.127 36.703 0.254 0.203 37.465 0.006 0.005 1.445
Inches 0.130 0.105 0.014 0.010 0.008 1.475
32.004 0.508 5.080 0.762 1.016 72.898 69.850 70.358 45.212
1.260 0.020 0.200 0.030 0.040 2.870 2.750 2.770 1.780
VDDQ VSSQ
VDDQ VSSQ
Notes: exposed metalized areas gold plated over nickel plating. Capacitor mounting pads dimensioned AVX/MIL-C-55681, CDR05, chip capacitor. Capacitor mounting pads labeled VSS, VDD, VSSQ, VDDQ connected their respective internal ground power planes. electrically connected VSS. These areas have notches tabs different than shown.
Figure Case outline Continued.
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Case
Figure Case outline Continued.
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Symbol D1/E1 D2/E2 VDD1 VDD2 VSSQ VDDNCQ VSSQ VDDCQ
Millimeters 3.327 3.251 0.889 0.152 0.102 47.676 0.254 0.203 48.336 0.006 0.004 1.877
Inches 0.131 0.128 0.035 0.010 0.008 1.903
43.510 0.483 5.740 0.762 1.016 77.216 75.387 74.625 55.677 75.387 56.947 70.002 VDD1 VDD2 VSSQ VDDNCQ VSSQ VDDCQ CP12 CP11 CP10
1.713 0.019 0.226 0.030 0.040 3.040 2.968 2.938 2.192 2.968 2.242 2.756 VDD1 VDD2 VSSQ VDDNCQ VSSQ VDDCQ CP16 CP15 CP14 VDD1 VDD2 VSSQ VDDNCQ VSSQ VDDCQ
CP13
Notes: exposed metalized areas gold plated over nickel plating. Capacitor mounting pads dimensioned AVX/MIL-C-55681, CDR05, chip capacitor. Capacitor mounting pads labeled VSS, VDD, VSSQ, VDDQ connected their respective internal ground power planes. electrically connected VSS. These areas have notches tabs different than shown.
Figure Case outline Continued.
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OPEN A14, A15, A16, A17, B14, B15, B16, B18, C14, C15, D13, D14, D18, E12, E13, F17, G19, H19, J17, J18, J19, K17, K18, L16, L17, L18, L19, M16, M17, M18, M19, N16, N17, N18, N19, N20, P16, P17, P18, P19, P20, R16, R17, R18, R19, R20, T10, T11, T12, T13, T14, T15, T16, T17, T18, T19, T20, U10, U11, U13, U14, U15, U16, U17, U18, U19, U20, V10, V11, V12, V14, V15, V16, V17, V18, V19, W10, W11, W12, W14, W15, W16, W17, W18, W19, ,X7, X13, X14, X15,
A11, A13, A18, A20, B10, B13, C10, C13, C17, C19, C20, D15, D16, D17, D20, E10, E11, E15, E17, E20, F16, F19, G16, G18, H17, J16, J20,, K19, L20, U12, V20, X10, X12, X18,
GROUND A10, A12, A19, B11, B12, B17, B19, B20, C11, C12, C16, C18, D10, D11, D12, D19, E14, E16, E18, E19, F18, F20, G17, G20, H16, H18, H20, K16, K20, M20, V13, W13, W20, X11, X17,
device manufacturer performs radiation testing using grid array standard evaluation circuit.
Figure Radiation exposure circuit.
TABLE test limits Device Type Temperature ±10°C
Bias latch-up test latch-up
BIAS, Effective upsets
Maximum device cross section (LET 120)
mg/cm2
NOTE: Devices that contain cross coupled resistance must tested maximum rated test conditions, 4.4.4.4 herein. Technology characterization model verification supplemented in-line data used lieu end-of-line testing. Test plan must approved qualifying activity. Worst case temperature +125°C. When characterized result procuring activities request, this parameter will specified.
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QUALITY ASSURANCE PROVISIONS Sampling inspection. device classes sampling inspection procedures shall accordance with MIL-PRF-38535 modified device manufacturer's Quality Management (QM) plan. modification plan shall affect form, fit, function described herein. device class sampling inspection procedures shall accordance with MIL-PRF-38535, appendix Screening. device classes screening shall accordance with MIL-PRF-38535, shall conducted devices prior qualification technology conformance inspection. device class screening shall accordance with method 5004 MIL-STD-883, shall conducted devices prior quality conformance inspection. 4.2.1 Additional criteria device class Burn-in test, method 1015 MIL-STD-883. Test condition test circuit shall maintained manufacturer under document revision level control shall made available preparing acquiring activity upon request. test circuit shall specify inputs, outputs, biases, power dissipation, applicable, accordance with intent specified test method 1015. +125°C, minimum. Interim final electrical test parameters shall specified table herein.
4.2.2 Additional criteria device classes burn-in test duration, test condition test temperature, approved alternatives shall specified device manufacturer's plan accordance with MIL-PRF-38535. burn-in test circuit shall maintained under document revision level control device manufacturer's Technology Review Board (TRB) accordance with MIL-PRF-38535 shall made available acquiring preparing activity upon request. test circuit shall specify inputs, outputs, biases, power dissipation, applicable, accordance with intent specified test method 1015 MIL-STD-883. Interim final electrical test parameters shall specified table herein. Additional screening device class beyond requirements device class shall specified MIL-PRF-38535, appendix
Qualification inspection device classes Qualification inspection device classes shall accordance with MIL-PRF-38535. Inspections performed shall those specified MIL-PRF-38535 herein groups inspections (see 4.4.1 through 4.4.4). Conformance inspection. Technology conformance inspection classes shall accordance with MIL-PRF-38535 including groups inspections specified herein. Quality conformance inspection device class shall accordance with MIL-PRF-38535, appendix specified herein. Inspections performed device class shall those specified method 5005 MIL-STD-883 herein groups inspections (see 4.4.1 through 4.4.4).
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4.4.1 Group inspection. Tests shall specified table herein. device class subgroups tests shall sufficient verify functionality device described AID. Subgroup (CIN, COUT, CI/O measurements) shall measured only initial qualification after process design changes which affect capacitance. Capacitance shall measured between designated terminal GND. Capacitance testing shall performed three devices Method 3012. minimum four pins device shall tested. Tested pins shall selected based engineering analysis package interconnect drawing determine which pins will have highest capacitance. sample sizes increased based engineering judgement, shall decreased. TABLE Electrical test requirements. Test requirements Subgroups accordance with MIL-STD-883, method 5005, table Device class Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Group test requirements (see 4.4) Group end-point electrical parameters (see 4.4) Group end-point electrical parameters (see 4.4) Group end-point electrical parameters (see 4.4) Subgroups accordance with MIL-PRF-38535, table III) Device class Device class
applies subgroup applies subgroups
4.4.2 Group inspection. group inspection end-point electrical parameters shall specified table herein. 4.4.2.1 Additional criteria device class Steady-state life test conditions, method 1005 MIL-STD-883: Test condition test circuit shall maintained manufacturer under document revision level control shall made available preparing acquiring activity upon request. test circuit shall specify inputs, outputs, biases, power dissipation, applicable, accordance with intent specified test method 1005 MIL-STD-883. +125°C, minimum. Test duration: 1,000 hours, except permitted method 1005 MIL-STD-883.
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4.4.2.2 Additional criteria device classes steady-state life test duration, test condition test temperature, approved alternatives shall specified device manufacturer's plan accordance with MIL-PRF-38535. test circuit shall maintained under document revision level control device manufacturer's accordance with MIL-PRF-38535 shall made available acquiring preparing activity upon request. test circuit shall specify inputs, outputs, biases, power dissipation, applicable, accordance with intent specified test method 1005 MILSTD-883. 4.4.3 Group inspection. group inspection end-point electrical parameters shall specified table herein. 4.4.4 Group inspection. Group inspection required only parts intended marked radiation hardness assured (see herein). levels device classes shall specified MIL-PRF-38535. End-point electrical parameters shall specified table herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall performed accordance with MIL-STD-883 method 1019, condition specified herein. 4.4.4.1.1 Accelerated aging test. Accelerated aging tests shall performed devices requiring level greater than rads(Si). post-anneal end-point electrical parameter limits shall specified table herein shall preirradiation end-point electrical parameter limit ±5°C. Testing shall performed initial qualification after design process changes which affect response device. 4.4.4.2 Neutron testing. Neutron testing shall performed accordance with test method 1017 MIL-STD-883 herein (See 1.4). device classes must meet post irradiation end-point electrical parameter limits defined table subgroups specified Table herein +25°C after exposure neutrons/cm (minimum). 4.4.4.3 Dose rate induced latchup testing. Dose rate induced latchup testing shall performed accordance with test method 1020 MIL-STD-883 specified herein (See 1.5). Tests shall performed devices, SEC, approved test structures technology qualification after design process changes which effect capability process. 4.4.4.4 Dose rate upset testing. Dose rate upset testing shall performed accordance with test method 1021 MIL-STD883 herein (See 1.4). Transient dose rate upset testing shall performed initial qualification after design process changes which effect performance devices. Test devices with defects unless otherwise specified. Transient dose rate upset testing class devices shall performed specified approved radiation hardness assurance plan MIL-PRF-38535. 4.4.4.5 Single event phenomena (SEP). testing shall required class devices (See 1.5). testing shall performed Standard Evaluation Circuit (SEC) alternate test vehicle approved qualifying activity initial qualification after design process changes which affect upset latchup characteristics. recommended test conditions follows: beam angle incidence shall between normal surface normal, inclusive (i.e. angle shadowing beam fixturing package related effects allowed. fluence shall errors ions/cm2. flux shall between ions/cm2/s. cross-section shall verified flux independent measuring cross-section flux rates which differ least order magnitude. particle range shall microns silicon. test temperature shall specified Table test limits. Bias conditions shall defined manufacturer latchup measurements. Test four devices with zero failures.
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PACKAGING Packaging requirements. requirements packaging shall accordance with MIL-PRF-38535 device classes MIL-PRF-38535, appendix device class NOTES Intended use. Microcircuits conforming this drawing intended Government microcircuit applications (original equipment), design applications, logistics purposes. 6.1.1 Replaceability. Microcircuits covered this drawing will replace same generic device covered contractor prepared specification drawing. 6.1.2 Substitutability. Device class devices will replace device class devices. Configuration control SMD's. proposed changes existing SMD's will coordinated with users record individual documents. This coordination will accomplished using Form 1692, Engineering Change Proposal. Record users. Military industrial users should inform Defense Supply Center Columbus when system application requires configuration control which SMD's applicable that system. DSCC will maintain record users this list will used coordination distribution changes drawings. Users drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. Comments. Comments this drawing should directed DSCC-VA Columbus, Ohio 43216-5000, telephone (614) 692-0547. Abbreviations, symbols, definitions. abbreviations, symbols, definitions used herein defined MIL-PRF-38535 MIL-HDBK-1331. Sources supply. 6.6.1 Sources supply device classes Sources supply device classes listed QML-38535. vendors listed QML-38535 have submitted certificate compliance (see herein) DSCC-VA have agreed this drawing. 6.6.2 Approved sources supply device class Approved sources supply class listed MIL-HDBK-103. vendors listed MIL-HDBK-103 have agreed this drawing certificate compliance (see herein) been submitted accepted DSCC-VA. Additional information. manufacturer: upset levels. Test conditions (SEP). Number upsets (SEP). Number transients (SEP). Occurrence latchup (SEP). copy following additional data shall maintained available from device
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SCOPE 10.1 Scope. This appendix establishes minimum requirements microcircuit supplied under Qualified Manufacturers List (QML) Program. microcircuit meeting requirements MIL-PRF-38535 manufacturers approved plan monolithic microcircuits, multichip modules (MCMs), hybrids, electronic modules, devices using chip wire designs accordance with MIL-PRF-38534 specified herein. product assurance classes consisting military high reliability (device class space application (device Class reflected Part Identification Number (PIN). When available choice Radiation Hardiness Assurance (RHA) levels reflected PIN. 10.2 PIN. shown following example: 5962 Federal stock class designator designator (see 10.2.1) Drawing number 99B01 Device type (see 10.2.2) Device class designator (see 10.2.3) code Details (see 10.2.4)
10.2.1 designator. Device classes identified shall meet MIL-PRF-38535 specified levels. dash indicates non-RHA die. 10.2.2 Device type(s). device type(s) shall identify circuit function follows: Device type 10.2.3 Device class designator. Device class Device requirements documentation Certification qualification requirements MIL-PRF-38535 Generic number 06MRA010 Circuit function Gate Array 10,000 gates available
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10.2.4. Details. details designation shall unique letter which designates die's physical dimensions, bonding location(s) related electrical function(s), interface materials, other assembly related information, each product variant supplied this appendix. 10.2.4.1 physical dimensions. type Figure number
10.2.4.2. bonding locations electrical functions. type 10.2.4.3. Interface materials. type 10.2.4.4. Assembly related information. type Figure number Figure number Figure number
10.3. Absolute maximum ratings. paragraph within body this drawing details. 10.4 Recommended operating conditions. paragraph within body this drawing details.
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APPENDIX APPENDIX FORMS PART 5962-99B01 APPLICABLE DOCUMENTS. 20.1 Government specifications, standards, handbooks. Unless otherwise specified, following specification, standard, handbook issue listed that issue Department Defense Index Specifications Standards specified solicitation, form part this drawing extent specified herein. DEPARTMENT DEFENSE SPECIFICATION MIL-PRF-38535 Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines.
DEPARTMENT DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 List Standard Microcircuit Drawings. Standard Microcircuit Drawings.
(Copies these documents available online www.dodssp.daps.mil from Standardization Document Order Desk, Robbins Avenue, Building Philadelphia, 19111-5094.) 20.2. Order precedence. event conflict between text this drawing references cited herein, text this drawing shall take precedence. REQUIREMENTS 30.1 Item requirements. individual item requirements device classes shall accordance with MIL-PRF-38535 specified herein modified device manufacture's Quality Management (QM) plan. modification plan shall effect form, function described herein. 30.2 Design, construction physical dimensions. design, construction physical dimensions shall specified MIL-PRF-38535 manufacturer's plan, device classes herein. 30.2.1 physical dimensions. physical dimensions shall specified 10.2.4.1 figure A-1. 30.2.2 bonding locations electrical functions. bonding locations electrical functions shall specified 10.2.4.2 figure A-1. 30.2.3 Interface materials. interface materials shall specified 10.2.4.3 figure A-1. 30.2.4 Assembly related information. assembly related information shall specified 10.2.4.4 figure A-1. 30.2.5 Truth table(s). truth table(s) shall defined within paragraph 3.2.3. body this document. 30.2.6 Radiation exposure circuit. radiation exposure circuit shall defined within paragraph 3.2.4. body this document.
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APPENDIX APPENDIX FORMS PART 5962-99B01 30.3 Electrical performance characteristics post-irradiation parameter limits. Unless otherwise specified herein, electrical performance characteristics post-irradiation parameter limits specified table body this document. 30.4 Electrical test requirements. wafer probe test requirements shall include functional parametric testing sufficient make packaged capable meeting electrical performance requirements table 30.5 Marking. minimum, each unique die, loaded single multiple stack carriers, shipment customer, shall identified with wafer number, certification mark, manufacturer's identification listed 10.2 herein. certification mark shall "QML" required MIL-PRF-38535. 30.6 Certification compliance. device classes certificate compliance shall required from QML38535 listed manufacturer order supply requirements this drawing (see 60.4 herein). certificate compliance submitted DSCC-VA prior listing approved source supply this appendix shall affirm that manufacturer's product meets, device classes requirements MIL-PRF-38535 requirements herein. 30.7 Certificate conformance. certificate conformance required device classes MIL-PRF-38535 shall provided with each microcircuit delivered this drawing. QUALITY ASSURANCE PROVISIONS 40.1 Sampling inspection. device classes sampling inspection procedures shall accordance with MIL-PRF-38535 modified device manufacturer's Quality Management (QM) plan. modifications plan shall effect form, function described herein. 40.2 Screening. device classes screening shall accordance with MIL-PRF-38535, defined manufacturer's plan. minimum shall consist Wafer acceptance Class product using criteria defined within H.3.2.3 approved manufacturers Qualifying activity. 100% wafer probe (see paragraph 30.4). 100% internal visual inspection applicable class criteria defined within MIL-STD-883 test method 2010 alternate procedures allowed within MIL-STD-883 test method 5004.
40.3 Conformance inspection. 40.3.1 Group inspection. Group inspection required only parts intended identified radiation assured (see 30.5 herein). levels device classes shall specified MIL-PRF-38535. point electrical testing packaged shall specified table herein. Group tests conditions specified within paragraphs 4.4.4.1, 4.4.4.1.1., 4.4.4.2, 4.4.4.3, 4.4.4.4 4.4.4.5. CARRIER 50.1 carrier requirements. requirements carrier shall accordance with manufacturer's plan specified purchase order acquiring activity. carrier shall provide adequate physical, mechanical electrostatic protection.
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APPENDIX APPENDIX FORMS PART 5962-99B01 NOTES 60.1 Intended use. Microcircuit conforming this drawing intended microcircuits built accordance with MIL-PRF-38535 MIL-PRF-38534 government microcircuit applications (original equipment), design applications logistics purposes. 60.2 Comments. Comments this appendix should directed DSCC-VA, Columbus, Ohio, 43216-5000 telephone (614)-692-0536. 60.3 Abbreviations, symbols definitions. abbreviations, symbols, definitions used herein defined within MILPRF-38535 MIL-STD-1331. 60.4 Sources supply device classes Sources supply device classes listed QML-38535. vendors listed within QML-38535 have submitted certificate compliance (see 30.6 herein) DSCC-VA have agreed this drawing.
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FIGURE A-1. bonding locations electrical functions.
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Notes: dimensions inches basic. Backside bias VSS. backside lapped. center coordinate origin (0,0). Diepad reserved with QIDD test. bonding locations electrical functions physical dimensions. size: 0.29753 0.2811 thickness: 0.0175 0.001 Interface materials. metallization: Backside metallization: None Glassivation. Type: Oxide/Nitride Thickness: Substrate: Epitaxial layer Single crystal silicon Assembly related information. Substrate potential: Tied Special assembly instructions: None FIGURE A-1. bonding locations electrical functions.
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STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 05-11-01 Approved sources supply 5962-99B01 listed below immediate acquisition information only shall added MIL-HDBK-103 QML-38535 during next revision. MIL-HDBK-103 QML-38535 will revised include addition deletion sources. vendors listed below have agreed this drawing certificate compliance been submitted accepted DSCC-VA. This bulletin superseded next dated revision MIL-HDBK-103 QML-38535. Standard microcircuit drawing 5962-99B0101Q_C 5962R99B0101V_C 5962R99B0101Q9A 5962R99B0101V9A 5962-99B0102Q_C 5962R99B0102V_C 5962-99B0103Q_C 5962R99B0103V_C 5962-99B0104Q_C 5962R99B0104V_C 5962-99B0105Q_C 5962R99B0105V_C 5962-99B0106Q_C 5962R99B0106V_C 5962-99B0107Q_C 5962R99B0107V_C 5962-99B0108Q_C 5962R99B0108V_C 5962-99B0109Q_C 5962R99B0109V_C 5962-99B0110Q_C 5962R99B0110V_C 5962-99B0111Q_C 5962R99B0111V_C 5962-99B0112Q_C 5962R99B0112V_C 5962-99B0113Q_C 5962R99B0113V_C 5962-99B0114Q_C 5962R99B0114V_C 5962-99B0115Q_C 5962R99B0115V_C Vendor CAGE number 65342 65342 65342 65342 65342 65342 65342 65342 65342 65342 65342 65342 65342 65342 65342 65342 Vendor similar UT06MRA010 UT06MRA010_QDIE UT06MRA010_VDIE UT06MRA025 UT06MRA050 UT06MRA075 UT06MRA100 UT06MRA150 UT06MRA200 UT06MRA250 UT06MRA300 UT06MRA350 UT06MRA400 UT06MRA450 UT06MRA500 UT06MRA550 UT06MRA600
lead finish shown each representing hermetic package most readily available from manufacturer listed that part. desired lead finish listed contact vendor determine availability. nature this SMD, standard microcircuit drawing corresponding vendor similar shall specified AID. vendor similar will based UT06MRA gate array family. Contact listed approved source supply availability case outlines (defined 1.2.4) each device. Caution. this number item acquisition. Items acquired this number satisfy performance requirements this drawing. Vendor CAGE number 65342 Vendor name address UTMC Microelectronic Systems 4350 Centennial Boulevard Colorado Springs, 80907
information contained herein disseminated convenience only Government assumes liability whatsoever inaccuracies information bulletin.
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