Introduction SPM-Inverter System Overview Introduction Line Filte
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Application Note 9018 Smart Power Module User's Guide
Introduction SPM-Inverter System Overview
Introduction Line Filter Initial Charging Circuit. Dynamic Brake (DB) Circuit SMPS (Switching Mode Power Supply).
Product Guide.12
Product Line-Up. Ordering Information.
Outline Description.14
Outline Drawing Description input output pins
Internal Circuit Features Interface Circuit
Control Input Fault Output Signal Temperature Monitoring.
Function Protection Circuit
Under-Voltage Protection (Low-Side) Under-Voltage Protection (High-Side) Short-Circuit Protection.
Bootstrap Circuit.31
Operation Bootstrap Circuit Initial Charging Bootstrap Capacitor Selection Bootstrap Capacitor Selection Bootstrap Diode Selection Series Resistance Charging Discharging Bootstrap Capacitor during PWM-Inverter Operation.
Rev.C3, 2002
Safe Operating Area.37 Design.39
10.1 Double-Layer PCB. 10.2 Single-Layer 10.3 Remarks
Overall Application Circuit Thermal Resistances Applicable Power.45
12.1 12.2 12.3 12.4 12.5 12.6 Overview. Measurement Method. Measurement Procedures Measurement Data Junction Temperature Prediction Method Heat Sink Design Guide
Power Loss Dissipation
13.1 13.2 13.3 13.4 Calculation Method Conduction Loss Calculation Method Switching Loss Power Losses Power Dissipation Design.
Packaging Installation Guide.76
14.1 Heat Sink Mounting 14.2 Handling Precaution 14.3 Packaging Guide
Appendix
15.1 Detailed Schematics Inverter System 15.1.1 Input Power. 15.1.2 Part. 15.1.3 Part 15.1.4 Keypad Part 15.2 Resistance Temperature Built-in Thermistor 15.3 Socket Boards. 15.4 Interface Methods
Note) AN9018-1: Contents AN9018-2: Contents 8~14 AN9018-3: Content
Rev. 2002
Introduction
terms "energy-saving" "quiet-running" becoming very important world variable speed motor drives. Inverter technology being accepted wide range users design these products, their increasing. low-power motor control, there increasing demands compactness, built-in control, lower overall-cost. important consideration, justifying inverters these applications, optimize total-cost-performance ratio overall drive system. other words, systems have less noisy, more efficient, smaller lighter, more advanced function more accurate control with very cost. order meet these needs, Fairchild developed series compact, high-functionality, high efficiency power semiconductor devices called "SPM (Smart Power Module)". SPM-based inverters considered attractive alternative conventional discretebased inverters low-power motor drives, specifically appliances such washing machines, air-conditioners etc. combines optimized circuit protection drive matched IGBT's switching characteristics. Highly effective short-circuit current detection/protection achieved through advanced current sensing IGBT chips that allow continuous monitoring IGBT's current. System reliability further enhanced integrated under-voltage protection function. high speed built-in HVIC provides opto-coupler-less IGBT gate driving capability that further reduces overall size inverter system design. Additionally, incorporated HVIC allows single-supply drive topology without negative bias. should noted that could build typical block diagram SPM-inverter shown Fig. 1.1. objective this application note show details power circuit design application users. This note describes some designs that should enable users deploying expeditiously shorten their development time. will make inverter designers very familiar with help them incorporating their designs.
Fig. Typical block diagram SPM-inverter system
Rev. 2002
SPM-Inverter System Overview
Introduction
Induction brush less motor drive system using (Smart Power Module) been designed. this chapter, overview entire system given, more details, including drive performance, described another application note. Fig. shows block diagram drive system Fig. external view system. From Fig. 2.1, seen that control system consists three parts. first part composed line filter, rectifier, SMPS (Switching Mode Power Supply) power circuit blocks. second block three-phase inverter circuit. Finally there processor user interface blocks control part. system fully assembled board connected power source motors shown Fig. 2.2. appropriate home appliance applications. system configured operation induction motors brush less motors without external circuit. operation brush less motor achieved even without mechanical position sensor required numerous other cost applications. power requirements large number applications, such industrial tools home appliances, range between 500W typical application one-horse power 750W drive inverter designed for. TMS320F2406 used control processor, which C2000 series. designed digital motor control.
Fig. Block diagram drive system using SPM-inverter.
Rev. 2002
Control board
Control board with BLDC motor
Fig. External view drive board.
present configuration allows immediate operation induction motor with 750W power shaft. equivalent brush less motor requires proper adjustment wire connection located motor input part. inverter operated 220/110V with 50/60Hz. rectified voltage from 220V mains optimally requires motor with line-to-line voltage 220V space-vector based method implemented. arms current amounts about providing output power 750W. Similarly, current 110V mains increases motor control program running micro controller implemented using digit line (Vacuum Fluorescent Display) keys. keypad allows users switching frequency, dead time, acceleration time, deceleration time, base voltage, base frequency, frequency reference, torque boost etc. Three kinds pattern operation possible. manually controlled volume also supports variable speed operation motors.
Rev. 2002
Line Filter
Power electronic circuits, switching large amounts current high voltages, generate electrical signals that affect other electronic systems. These unwanted signals give rise electromagnetic interference (EMI), also known radio frequency interference (RFI), since they occur higher frequencies. These signals transmitted radiation through space conduction along cable. Apart from emitting EMI, control circuit power systems also affected generated power circuitry, other circuits natural phenomena. When this occurs system said susceptible EMI. system, which does emit above given level, affected EMI, stated have achieved electromagnetic compatibility (EMC). There three elements system. source EMI, media through which transmitted, receptor, which system that suffers adversely received EMI. Therefore electromagnetic compatibility achieved reducing levels from source, blocking propagation path signals, making receiver less susceptible received signals. source primarily system where current voltage changes rapidly (for example, breaking current relay contacts, arcing motor commutators, high-frequency switching such rapid turn-on turn-off IGBTs). radiated through space electromagnetic waves, conducted current along cable. Conduction take form common-mode differential-mode currents. differential-mode, currents equal opposite wires caused primarily other users same lines. Common-mode currents almost equal amplitude lines, travel same direction. These currents mainly caused coupling radiated power lines stray capacitive coupling body equipment. Emissions classified broadband narrowband. broadband emission, signal bandwidth greater than reference bandwidth, pulse-repetition frequency less than that reference bandwidth. reference bandwidth, purposes, considered equipment being interfered with, test receiver. narrowband emission, signal bandwidth less than reference bandwidth, pulse-repetition frequency greater than that reference bandwidth. sources broadly divided into categories, natural man-made. Naturally caused EMI, below 10MHz, mainly atmospheric noise resulting from electrical storms. Above 10MHz they primarily result cosmic noise solar radiation. Manmade intentional unintentional. variation voltage current which produces EMI, whose magnitude depends value current, length conductors, rate change voltage current, physical position conductors relative each other earth plains.
Rev. 2002
RELAY Utility AC220V 15mH
Bridge Diode
Fig. Input power stage with line-filter.
Protection against conducted being transmitted along cable achieved means suppression filters, which consist basically inductive capacitive elements. variety such filters exist since type, which suppresses interference completely from system, quite useless another. location filter also important. should generally placed directly source interference, output input leads should never bundled together. components chosen filters should also carefully designed. inductors must have stray capacitors, they should multi-layer, capacitors must have series inductance. filter should enclosed screened much possible. This connected wall shielded enclosure, that interference signals from noisy side with quiet side system. Fig. shows example basic filter arrangements, which used designed drive system suppressing conducted interference. This includes rectifying bridge diode, varistor suppress input spike voltage, relay circuit initial charging DC-link capacitor. noted that there choke coil Y-connected capacitors against common-mode noise, capacitors against differential-mode noise.
Initial Charging Circuit
turning system power, there would high current system input line. order prevent over-current damage bridge diode DC-link capacitor, initial charging circuit designed shown Fig. 2.4.
Rev. 2002
Relay
Utility AC220V
3.3V Bridge Diode
U1DL-44A 2N2222 From KRC101S
Fig. Initial charging circuit
Depending bridge diode rating electrolytic capacitor maximum ripple current, relay driven after 800ms charging duration from power series resistor connected parallel with relay should able endure power loss during charging period. simulation waveform shown below. Simulation condition Load 1Hp(750W) Input AC220V, single phase DC-link capacitors 470uF/250WV connected series Charging resistor :220W/3W
input current
DC-link voltage
Charging resistor power
Fig. Initial charging simulation
Rev. 2002
Dynamic Brake (DB) Circuit
adjustable-speed motor drives, machines subjected electrical braking reduction speed. electrical braking, motor operated generating mode kinetic energy stored system inertia converted electrical energy. designed system resistor used dissipate energy, which well known dynamic braking resistor. Dynamic braking power depends thee DC-link voltage resistor value. resistor used 200W/200W metal resistor. IGBT with rating 2A/600V used Fig. shows detailed circuit.
D2U60S Utility AC220V Bridge Diode 3.3V 2N2222 KTN2907 From KRC101S G2N60
Fig. Dynamic braking circuit designed
SMPS (Switching Mode Power Supply)
Flyback type SMPS designed isolated dc-to-dc converter. detailed schematic shown Fig. 2.7. designed generate values control supply, their power ratings 0.3W 0.7W, respectively. SMPS control, adopted main power switch KA5H0280R made Fairchild Semiconductor, major specifications shown Table 2.1. Table Specification KA5H0280R Vdmax Ipeak Pin(mat) Fopr [kHz] 100/70 Rds(on) max() 7.0(Id=1.0A) TO-220F-4L
Rev. 2002
U1DL-44A
0.1mH
UF4007
U1DL-44A
Drain
U1DL-44A 0.1mH
KA5H0280R
H11A817B H11A817B
2.61
TL431A 2.49
Fig. SMPS circuit designed system.
Table shows winding specification SMPS transformer. turn ratio primary winding secondary supply 120:7. copper wire used winding copper wire used others. There turns 0.050mm thick polyester taping ensure that there insulation between each winding. Table Winding specifications N15V (Start Finish) Wire 0.20 0.20 0.40 0.20 Turns Winding Method Solenoid Winding Solenoid Winding Solenoid Winding Solenoid Winding
Insulation Polyester Tape 0.050mm, 3Layer Insulation Polyester Tape 0.050mm, 3Layer Insulation Polyester Tape 0.050mm, 3Layer Insulation Polyester Tape 0.050mm, 3Layer
Note: Primary winding N5V: output winding NFB: Feed Back winding N15V: output winding
Table Electrical characteristics transformer Inductance Leakage Spec 5.5mH 120µH(max.) Remarks 100kHz, Without Core
Rev. 2002
winding order shown Fig. applied considering coupling coefficient.
N15V
N15V
Fig. winding order (EI2219 core bobbin used).
Rev. 2002
Product Guide
Product Line-Up
Part Number FPAL10SH60 FPBL10SH60 FPAL15SH60 FPBL15SH60 *FPAL15SM50 *FPBL15SM50 FPAL15SM60 FPBL15SM60 *FPAL20SM50 *FPBL20SM50 FPAL20SM60 FPBL20SM60 FPAL15SL60 FPBL15SL60 FPAL20SL60 FPBL20SL60 FPAL30SL60 FPBL30SL60
under development
Rating 600V 600V 600V 600V 500V 500V 600V 600V 500V 500V 600V 600V 600V 600V 600V 600V 600V 600V
Switching Frequency High Speed High Speed High Speed High Speed Medium Speed Medium Speed Medium Speed Medium Speed Medium Speed Medium Speed Medium Speed Medium Speed Speed Speed Speed Speed Speed Speed
Primary Application
Washing Machines
Conditioners
Conditioners
Rev. 2002
Ordering Information
FPAL15SH60
Voltage Rating High Switching Frequency Medium Switching Frequency Switching Frequency Single-Grounded Power Supply Multi-Grounded Power Supply Current Rating Package Type Option Built-In Thermistor Option No-Thermistor Power Circuit Type Fairchild Semiconductor
Rev. 2002
Outline Description
Outline Drawing
Figs. show detailed outline drawing guide SPM.
Fig. Detailed outline.
Rev. 2002
Fig. drawing.
Rev. 2002
Description input output pins
Table description Symbol VCC(L) COM(L) IN(UL) IN(VL) IN(WL) CFOD IN(WH) VCC(WH) VB(W) VS(W) COM(H) IN(VH) VCC(VH) VB(V) VS(V) IN(UH) VCC(UH) VB(U) VS(U) Description Low-Side Common Bias Voltage Driving IGBTs Low-Side Common Supply Ground Signal Input Terminal Low-Side Phase Signal Input Terminal Low-Side Phase Signal Input Terminal Low-Side Phase Fault Output Terminal Capacitor Fault-output Duration Time Selection Capacitor (Low-pass Filter) Short-Current Detection Input Resistor Short-circuit Current Detection Connection Thermistor Bias Voltage Series Resistor Thermistor (Temperature Monitoring) Output Terminal Phase Output Terminal Phase Output Terminal Phase Negative DC-Link Input Positive DC-Link Input Signal Input Terminal High-Side Phase High-Side Bias Voltage Phase High-Side Bias Voltage Phase IGBT Driving High-Side Bias Voltage Ground Phase IGBT Driving High-Side Common Supply Ground Signal Input Terminal High-Side Phase High-Side Bias Voltage Phase High-Side Bias Voltage Phase IGBT Driving High-Side Bias Voltage Ground Phase IGBT Driving Signal Input Terminal High-Side Phase High-Side Bias Voltage Phase High-Side Bias Voltage Phase IGBT Driving High-Side Bias Voltage Ground Phase Driving IGBT
Table show explanation input output pins SPM. detailed functional description
Rev. 2002
High-Side Bias Voltage Pins Driving IGBT High-Side Base Voltage Ground Pins Driving IGBT VB(U) VS(U), VB(V) VS(V), VB(W) VS(W) These drive supply pins High-Side IGBTs. virtue ability boot-strap circuit scheme, external power supplies required high-side IGBTs Each boot-strap capacitor generally charged from supply during ON-state corresponding low-side IGBT. order prevent malfunctions caused noise ripple supply voltage, smoothing capacitor favorable frequency characteristics should mounted very close these pins Low-Side Bias Voltage High-Side Bias Voltage Pins VCC(L), VCC(UH), VCC(VH), VCC(WH) These control supply pins built-in ICs. These four pins should connected externally. order prevent malfunctions caused noise ripple supply voltage, smoothing capacitor favorable frequency characteristics should mounted very close these pins. High-Side Common Supply Ground Low-Side Common Supply Ground COM(H), COM(L) These control ground pins built-in ICs. These pins should connected externally. main current power circuit, however, should allowed flow through these pins avoid noise influences. Signal Input Pins IN(UL), IN(VL), IN(WL), IN(UH), IN(VH), IN(WH) These pins control operation built-in IGBTs. They operate voltage input signals. These terminals internally connected schmitt trigger circuit composed 5V-class CMOS. Each signal line should pulled power supply through 4.7k resistance approximately. wiring each input should short possible protect against noise influences. prevent signal oscillations, coupling recommended Short-Current Detection Pins RSC, current sensing resistor should connected between low-side ground COM(L) detect short-current. sensing resistor should selected meet detection levels matched various applications. filter should connected from eliminating noise.
Rev. 2002
Fault Output This generated fault output. Active output given from this indicating fault state SPM(SC operation low-side). This output open collector type. signal line should pulled power supply with approximately 4.7k resistance. Fault Duration Time Selection CFOD This selecting fault pulse length. external capacitor should connected between this COM(L) fault pulse length. capacitance 5.6nF recommended (corresponding 300µs, which typical value fault pulse length). Positive DC-Link This DC-link positive power supply inverter. internally connected collectors high-side IGBTs. order suppress surge voltage caused DC-link wiring pattern inductance, connect smoothing capacitor very close pins. Negative DC-Link This DC-link negative power supply (power ground) inverter. This connected emitters low-side IGBTs. Inverter Power Output Inverter output pins connecting inverter load motor).
Rev. 2002
Internal Circuit Features
Fig. shows internal block diagram SPM. should noted that consists three-phase IGBT inverter circuit power block four drive control block. detailed features integrated functions benefits acquired using described follows.
(29) VB(U) VCC(L) COM(L) IN(UL) IN(VL) IN(WL) COM(L) IN(UL) IN(VL) IN(WL) V(FO) Wout C(FOD) C(SC) (10) (11) (12) THERMISTOR Vout Uout (28) VCC(UH) (27) IN(UH)
(30) VS(U) (25) VB(V) (24) VCC(VH) (23) IN(VH) (22) COM(H) (26) VS(V) (20) VB(W) (19) VCC(WH) (18) IN(WH)
CFOD
(21) VS(W)
(13)
(14)
(15)
(16)
(17)
Fig. Internal block diagram SPM.
Features Low-loss efficient IGBTs FRDs 3-phase IGBT inverter bridge including control gate driving protection 600V/10A rating Single-grounded power supply opto-coupler-less interface built-in HVIC IGBT switching characteristics matched system requirement. Built-in thermistor over-temperature monitoring leakage current high isolation voltage ceramic-based substrate Adjustable current protection using sense-IGBTs Integrated Functions inverter high-side IGBTs Gate drive circuit, High-voltage isolated high-speed level shifting, Control supply under-voltage (UV) protection inverter low-side IGBTs Gate drive circuit, Short-circuit protection with soft shut-down control, Control supply circuit under-voltage protection Temperature monitoring Over-temperature monitoring using built-in thermistor Fault signaling Corresponding fault(low-side IGBTs) fault (low-side supply) Input interface CMOS/LSTTL compatible, Schmitt trigger input
Rev. 2002
Benefits using inverter-driven motor application, achieve much visual/invisual advantages Reduced system design time frees customers from power circuit design. This allows them launch products faster. Reduced manufacturing time necessary power part inside SPM. Customers need worry about power part assemblies. Enhanced productivity comparison discrete IGBT solution. High-yields manufacturing Simplified manufacturing diverse components combined SPM. Less components order stock order stock just device. Minimized inventory levels costs. More compact system compact thin outline enables design smaller appliances. addition smaller size also results cost reduction. Reduced field failure ratio internal protection circuit prevents failures IGBT-chips. This effective minimizing failure power part field.
Rev. 2002
5V-Line
4.7k 0.47nF 1.2nF 4.7k 4.7k (UH) (VH) IN(WH) (UL) (VL) (WL)
Fig. Interface circuit between
Line
VCC(UH,VH,WH)
CBSC
VB(UH,VH,WH)
DETECT LEVEL SHIFT PULSE FILTER
Line
CBP15
IN(UH,VH,WH) PULSE GENERATOR
VS(UH,VH,WH)
HVIC
VCC(L)
Line
DETECT
BANDGAP REFERENCE
LVIC
TIME DELAY LATCH_UP
U,V,W
IN(UL,VL,WL)
PROTECTION
PULSE GENERATOR (HYSTERISIS)
BUFFER
PROTECTION SOFT_OFF CONTROL
OUTPUT
(UL,VL,WL)
CFOD
FAULT OUTPUT DURATION
LATCH_UP
TIME DELAY
DETECTION
CFOD
Fig. Internal structure built-in control
Rev. 2002
Interface Circuit
Control Input Fault Output Signal
internal structure built-in control outer interface circuit control shown Figs. 6.2. Fault output input signals should 5V-class interface, order interface directly with CPU. signal input terminals internally connected 5V-class Schmitt trigger circuits. Therefore, opto-coupler used, supply voltage should maximum ratings input fault output voltages shown Table 6.1. fault output open collector type rating VCC+0.5, 15Vclass supply possible. However, 5V-class supply recommended fault output, which same input signals. RPCPL/RPCPH coupling each input recommended order prevent input signals' oscillation should close possible each input pin. recommended that by-pass capacitors fault signal, should placed both sides SPM, VFO, close possible. Table Maximum ratings input pins Item Control Supply Voltage Input Signal Voltage Symbol Condition Applied between VCC(H) COM(H), VCC(L) COM(L) Applied between IN(UH), IN(VH), IN(WH) COM(H) IN(UL), IN(VL), IN(WL) COM(L) Applied between COM(L) Rating -0.3 Unit
Fault Output Supply Voltage
-0.3~VCC+0.5
Experimental Waveform Interface Circuit kinds experiments have been performed using FPAL15SH60 FPAL30SL60 DUT. Fig. shows measuring points used test. Test about device FPAL 15SH60. typical experimental results shown Figs. 6.7, which measured variation total propagation delay time from output signal switching commutation. There little difference between highside delay time low-side delay time, caused difference interface circuit parameters (high-side RP=4.7k, CPH=1.2nF, low-side RP=4.7k, CPL=0.47nF). However, note that parameters recommended values. that higher temperature condition (see Figs. 6.7) causes larger delay time comparing with lower temperature (see Figs. 6.5). From results test only larger temperature condition 125°C applied test using device FPAL30SL60. Figs. show experimental results. Note that device FPAL30SL60 highest delay time among products.
Rev. 2002
5V-Line
IN(UH) IN(WH) [23] VSPM IN(VH) [18] [27]
Gating Input Circuitry
Fig. Measuring point input/output interface circuit.
Test1 Condition 300V, 15A, 15V, FPAL15SH60 Temperature @25°C, @125°C X-axis Time [200ns/div.] Y-axis VCPU [1V/div.], VSPM [1V/div.], [60V/div.], [4A/div.] TONT total propagation time from VSPM VIL, turn-on switching commutation TOFFT total propagation time from VSPM VIH, turn-off switching commutation
TOFFT=700[ns] TONT=640[ns]
VSPM
VSPM
Turn-off
Turn-on
Fig. Input signal switching waveforms high-side TC=25°C.
Rev. 2002
TOFFT=650[ns]
TONT=660[ns]
VSPM
VSPM
Turn-off
Turn-on
Fig. Input signal switching waveforms low-side TC=25°C.
TOFFT=980[ns] VSPM
TONT=780[ns]
VSPM
Turn-off
Turn-on
Fig. Input signal switching waveforms high-side TC=125°C.
TOFFT=900[ns]
TONT=780[ns]
VSPM
VSPM
Turn-off
Turn-on
Fig. Input signal switching waveform low-side TC=125°C.
Rev. 2002
Test Condition: VDC=300V, IC=30A, VCC=15V, FPAL30SL60 Temperature @TC=125 X-axis Time [200ns/div.] Y-axis VCPU [1V/div.], VSPM [1V/div.], [60V/div.], [10A/div.] TONT total propagation time from VSPM VIL, turn-on switching communtation TOFFT total propagation time from VSPM VIH, turn-off switching commutation
TOFFT=1580[ns] VCPU VSPM VCPU VSPM TONT=980[ns]
High side off@TC=125°C
High side on@TC=125°C
Fig. Input signal switching waveform high-side TC=125°C
TOFFT=1489[ns] VCPU VSPM VCPU
TONT=1300[ns]
VSPM
side off@TC=125°C
side on@TC=125°C
Fig. Input signal switching waveform low-side TC=125°C
Rev. 2002
Temperature Monitoring
(Negative Temperature Coefficient) thermistor included only A-type (i.e. FPAL30SL60, B-type, FPBL30SL60) monitor internal temperature SPM. basic electrical characteristic thermistor that they change resistance with change their temperature, which changed surrounding temperature. They amplify, rectify, polarize generate signal. monitored temperature converted thermistor voltage divided series resistor, transferred through interface circuit shown Fig. 6.10. relationship between temperature resistance thermistor shown Fig. 6.11 Appendix Making built-in thermistor, protect against overheating level that want.
Rev. 2002
Fig. 6.10 Interface circuit temperature monitoring.
Curve
Max.
Min. Typ. Max.
Typ.
Min.
Resistance
Temperature
Fig. 6.11 curve built-in thermistor.
Rev. 2002
Function Protection Circuit
Under-Voltage Protection (Low-Side)
Fig.
Input Signal Internal IGBT Gate-Emitter Voltage Control Supply Voltage detect reset
Output Current Fault Output Signal
Fig. Time chart low-side under-voltage protection function
Normal operation IGBT conducting current Under-voltage detection IGBT gate interrupt Fault signal generation Under-voltage reset Normal operation IGBT conducting current
Under-Voltage Protection (High-Side)
Fig. Normal operation IGBT conducting current Detection under-voltage situation bias voltage IGBT gate interrupt fault signal Reset under-voltage state Normal operation IGBT conducting current
Rev. 2002
Input Signal Internal IGBT Gate-Emitter Voltage Control Supply Voltage detect reset
Output Current Fault Output Signal
Fig. Time chart high-side under-voltage protection function
Short-Circuit Protection (Low-Side Only)
Fig.
Sensed-Current with RSC=75 0.2V/div. Sensed-Current with RSC=27 0.2V/div. IGBT Collector Current (IC) 10A/div.
Fig. Current sensing characteristics
IGBT Collector Current (IC) 20A/div.
IGBT Collector-Emitter Voltage (VCE) 100V/div.
Time 1µs/div.
Fig. Protected short circuit current.
Rev. 2002
Sense-IGBT very good linearity current sensing. suitable value resistor appropriate range selected protect from abnormal state like short-circuit. experimental results current sensing characteristics short-current protection shown Figs. 7.4. Fig. show time chart short-circuit protection function. Normal operation IGBT conducting currents Short-circuit current detection IGBT gate interrupt Fault signal generation IGBT slowly turned IGBT signal IGBT signal IGBT cannot turned during fault-output activation IGBT state Fault-output reset normal operation start
Input Signal Internal IGBT Gate-Emitter Voltage
Detection
Output Current
Reference Voltage (0.5V) Filter Delay
Sensing Voltage
Fault Output Signal
Fig. Time chart short-circuit protection function.
Rev. 2002
Application Note 9018 Smart Power Module User's Guide
8.Bootstrap Circuit
Operation Bootstrap Circuit
voltage, which voltage difference between (SPM pins (SPM pins 30), provides supply HVICs within SPM. This supply must range 10~20V ensure that HVIC fully drive high-side IGBT. includes under-voltage detection function ensure that HVIC does drive high-side IGBT, voltage drops below specified voltage (refer datasheet). This function prevents IGBT from operating high dissipation mode. There number ways which floating supply generated. them bootstrap method described here. This method advantage being simple inexpensive. However, duty cycle on-time limited requirement refresh charge bootstrap capacitor. bootstrap supply formed combination external diode, resistor capacitor shown Fig. 8.1. current flow path bootstrap circuit shown Fig. 8.1. When pulled down ground (either through low-side load), bootstrap capacitor (CBS) charged through bootstrap diode (DBS) resistor (RBS) from supply.
Inverter Operation
HVIC Load
Vin(L)
LVIC
Vin(L)
Bootstrap circuit
Timing chart initial bootstrap charging
Fig. Bootstrap circuit operation initial charging.
Rev. 2002
Initial Charging Bootstrap Capacitor
adequate on-time duration low-side IGBT fully charge bootstrap capacitor required initial bootstrap charging. initial charging time (tcharge) calculated from following equation:
Forward voltage drop across bootstrap diode VBS(min) minimum value bootstrap capacitor Voltage drop across low-side IGBT load Duty ratio
Selection Bootstrap Capacitor
voltage source bootstrap capacitor supply. capacitance determined following constraints: gate charge required enhance IGBT IQBS Quiescent current HVIC Currents within level shiftier HVIC Bootstrap capacitor leakage current Factor only relevant bootstrap capacitor electrolytic capacitor. ignored other types capacitors used. Hence, always better non-electrolytic capacitor possible. following equation describes minimum charge, which needs supplied bootstrap capacitor:
leak
Gate charge high-side IGBT Switching frequency ICBS(leak) Bootstrap capacitor leakage current IQBS(max) Maximum quiescent current HVIC Level shift charge required cycle 5nC(built HVIC) bootstrap capacitor must able supply this charge (QBS), retain full voltage. Otherwise, there will significant amount ripple voltage, which could fall below VBSUV (under-voltage detection level). Hence, recommended that charge capacitor least twice above value. nature bootstrap circuit operation, value capacitor lead overcharging, which could turn damage HVIC. Hence, minimize risk overcharging further reduce ripple voltage, recommended that value multiplied factor minimum bootstrap capacitor value obtained from following equation (8.3). Where allowable discharge voltage CBS.
leak
Rev. 2002
Note that following equation (8.4) should used specific system application, with extended period application standstill mode output, during changing rotor direction. occur washing machine drive applications where voltage lowered under-voltage protection level. Example shows experimental result. Where period standstill mode, where switches inside turnoff state.
capacitor only charges when high-side device voltage pulled down ground. Therefore, on-time low-side IGBT must sufficient ensure that charge drawn from capacitor fully replenished. Hence, inherently there minimum on-time low-side IGBT off-time high-side IGBT). bootstrap capacitor should always placed close pins possible. least capacitor should used provide good local de-coupling. example, separate ceramic capacitor close would essential, electrolytic capacitor were used bootstrap capacitor. bootstrap capacitor either ceramic tantalum type, should adequate local decoupling.
Selection Bootstrap Diode
bootstrap diode (DBS) must block inverter DC-link voltage, which seen when high-side device switched important that this diode ultra-fast recovery device minimize amount charge that back from bootstrap capacitor into supply. Similarly, high temperature reverse leakage current would important capacitor store charge long periods time. current rating diode product charge calculated from equation (8.2) switching frequency.
Selection Series Resistance
resistor (RBS) must added series with bootstrap diode slow down dVBS/dt. value series resistor relative value bootstrap capacitor should chosen such that time constant equal greater than 10usec. Note that rising dVBS/dt slowed down significantly, could temporarily result missing pulses during start-up phase insufficient voltage.
Charging Discharging Bootstrap Capacitor during PWM-Inverter Operation
bootstrap capacitor (CBS) charges through bootstrap diode (DBS) resistor (RS) from supply when high-side IGBT off, voltage pulled down ground. discharges when high-side IGBT voltage, VBS, pure component. inherently fluctuating voltage waveform, shown Fig. 8.2, because floating supply bootstrap action. using designed capacitor experiment, observed that voltage fluctuates approximately 0.2V during normal operation, which related load current direction switching states.
Rev. 2002
Vin(H)
HVIC
Vin(L)
LVIC
Inverter circuit
Vin(H):[5V/div.]
Vin(L):[5V/div.] VBS:[5V/div.]
Vin(H)
Vin(L)
Time:[20us/div.]
Experimental Waveforms
Timing chart
Fig. Charging discharging action bootstrap capacitor.
Rev. 2002
Example Selection Initial Charging Time example calculation minimum value initial charging time given with reference equation (8.1) Condition: 22uF, 16.5V Duty Ratio()= (min) 12.5V, 1N4937(600V/1A)
16.5 22µF 1.86ms 16.5V 12.5V
Fig. shows result experiment obtained washing machine applications using FPAL15SH60. order ensure safety, recommended that charging time must least three times longer than calculated value arrived using equation (8.1).
VCC:[5V/div.]
VBS:[5V/div.]
Vin(L):[5V/div.] Time:[5ms/div.]
Fig. Practical initial charging waveforms
Example Minimum Value Bootstrap Capacitor example calculation minimum value bootstrap capacitor given with reference equation (8.3). Conditions: Switching frequency 15kHz, Qg(typ.) (FPAL15SH60)= 40nC, 1N4937(600V/1A), ICBS (leak) 3uA, IQBC(max) 420uA, 0.2V
420µA 40nC -15kHz 15kHz 16.98µF 0.2V
Rev. 2002
Based above calculation operating switching frequency 3kHz, 47uF applied compressor drive airconditioner application. Fig. 8.4(FPBL20SL60, Qg(typ.)=55nC) shows capacitor voltage output current obtained during test.
VBS:[5V/div.]
IO:[20A/div.]
Time:[10ms/div.]
CBS=47uF Fig. Test result with conditioner
Another verification done using washing machine. 22uF selected using switching frequency 15kHz above equation result shown Fig. (a). should noted that there large drop about during standstill period. this case, other calculated value using equation (8.4) should applied. Fig. test result obtained applying 220uF following calculation with 0.5s. that capacitor voltage fluctuating within boundary level operating condition.
420µA 0.5s 210µF
VBS:[5V/div.]
VBS:[5V/div.]
IO:[10A/div.]
IO:[10A/div.]
Time: 0.5s/div.]
Time:[0.5s/div.]
CBS=22uF
CBS=220uF
Fig. Test results with washing machine
Rev. 2002
Safe Operating Area
Turn-off Switching VCES represents 600V voltage rating IGBTs incorporated into SPM. Subtracting surge voltage (100V less), generated stray inductance inside SPM, from VCES VPN(Surge), that 500V. Moreover, subtracting from VPN(Surge) surge voltage (50V less) generated stray inductance between DC-link capacitor VPN(Surge), that 450V. Short-circuit Operation VCES represents 600V voltage rating IGBTs incorporated into SPM. Subtracting surge voltage (100V less), generated stray inductance inside SPM, from VCES VPN(Surge), that 500V. Moreover, subtracting from VPN(Surge) surge voltage (100V less) generated stray inductance between DC-link capacitor VPN(PROT), that 400V. Table Absolute maximum ratings. Item Supply Voltage Supply Voltage (Surge) Collector-Emitter Voltage Self protection Supply Voltage Limit (Short-circuit Protective Capability) Symbol VCES VDC(PROT) Applied DC-link VCC=VBS=13.5~16.5V, TJ=125°C, Non-Repetitive, less than Condition Applied DC-link Rating Unit
VPN(Surge) Applied between
Note; recommended that average junction temperature should limited TJ125°C TC100°C) order guarantee safe operation.
Fig. shows that normal switching operations done well DC-link voltage 450V, while surge voltage between (VPN(Surge)) limited under 500V. difference between hard soft turn-off switching operation from Figs. 9.3. hard turn-off IGBT causes large overshoot 100V). Hence, supply voltage DC-link capacitor should limited 400V (See Table 9.1) safely protect SPM. hard turn-off, with duration less than approximately 6us, occur case short-circuit fault. normal short-circuit fault, protection circuit becomes active IGBT turned very softly prevent excessive overshoot voltage. overshoot voltage 30~50V occurs shown Figs. 9.3. Figs. 9.1-9.3 experimental results safe operating area test. However, recommended operate these condition, because they considered maximum rating.
Rev. 2002
VCE@TC=25°C VCE@TC=125°C
IC@TC=125°C IC@TC=125°C 100[V/div.], 5[A/div.], 100[ns/div.]
Fig. Normal current turn-off waveforms @VDC=450V
VCE@ Hard switching
VCE@ Soft switching
Soft switching Hard switching 100[V/div.], 20[A/div.], 200[ns/div.]
Fig. Short-circuit current turn-off waveforms @VDC=400V, TC=25°C
VCE@ Hard switching
VCE@ Soft switching
Soft switching Hard switching 100[V/div.], 20[A/div.], 200[ns/div.]
Fig. Short-circuit current turn-off waveforms @VDC=400V, TC=125°C
Rev. 2002
Design
10.1 Double-Layer
Fig. 10.1 shows recommended pattern when double-layer applied.
Circuit layout
Bottom side pattern Fig. 10.1 Double-layer
side pattern
Rev. 2002
Practical Application Example Fig. 10.2 shows practical pattern washing machine application.
Circuit layout
Bottom side pattern
side pattern
Fig. 10.2 Practical example double-layer
Rev. 2002
10.2 Single-Layer
Fig. 10.3 shows recommended pattern when single-layer applied.
Fig. 10.3 Single-layer
Application Example Fig. 10.4 shows practical pattern washing machine application.
Fig. 10.4 Example single-layer
Rev. 2002
10.3 Remarks
order minimize difference level, wiring low-side (pin highside (pin should short possible. required that pattern low-side (pin path coming from power supply. achieve stable bias voltage VCC. ceramic capacitor low-side bias required mounted close pins parallel with electrolytic capacitor order achieve strong noise immunity. order prevent error protection operation, pins CFOD (pin (pin (pin should connected short possible with low-side (pin2). required that bias high-side (pins should made pass through electrolytic capacitor low-side VCC. recommended that wiring short possible. necessary, another electrolytic capacitor into high-side part. RP/CPL RP/CPH coupling each input recommended wiring should short possible prevent input signals oscillation. particular, should mounted close input (pins possible. series resistor, direct coupling outputs mounted close side possible. minimize pattern impedance, recommended that bootstrap current path short possible. There should sufficient distance between primary side (pins secondary side (pins bootstrap circuit. Note that minimum value experience, actual distance between pins (between pin19 2.2mm. Bootstrap capacitors, CBSC should mounted close pins possible. suppress surge voltage, non-inductive snubber capacitor CDCS should mounted close (pin (pin terminals possible. recommended that wiring DC-link power path short possible.
Rev. 2002
Table 10.1 part list parameters used double-layer manufacturing shown Fig. 10.1 Table 10.1 Part list parameters double-layer example with FPAL15SH60.
Symbol CSP15 CSP05 CFOD CBP15 CBPF CBSC CDCS Rating 470uF, 100uF, 33nF, 470pF, 1/10W 1nF, 100nF, Characteristics Definition Electrolytic Capacitor +15V Bias Voltage Source Capacitor Electrolytic Capacitor Bias Voltage Source Capacitor Ceramic Capacitor Ceramic Capacitor Chip Resistor (10%) Ceramic Capacitor Ceramic Capacitor Capacitor Selection Fault-Out Low-Side Pull-Up Capacitor Current Sensing Resistor Low-Pass Filter Current Sensing Low-Pass Filter Current Sensing Pull-up Resistor Bypass Capacitor Series Resistor Signal Interface Series Resistor Temperature Monitoring Bypass Capacitor Fault-Out Signal High-Side Pull-Up Capacitor Bypass Capacitor Bootstrap Supply Bootstrap Resistor Bootstrap Diode Snubber Capacitor Suppress Spike-Voltage Pull-Up capacitor Fault-Out Signal
3.9k, 1/10W Chip Resistor (10%) 4.7k, 1/10W Chip Resistor (10%) 100, 1/10W Chip Resistor (10%) 22k, 1/10W Chip Resistor (10%) 1nF, 1.2nF, 100nF, 1/4W 600V 220µF, 220nF, 630V 1nF, Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Chip Resistor (10%) Fast Recovery Diode Film Capacitor Ceramic Capacitor
Electrolytic Capacitor Bootstrap Capacitor
Rev. 2002
Overall Application Circuit
Gating Gating Gating Fault CBPF
Gating Gating Gating
VB(U) (29) line VCC(L) COM(L) IN(UL) IN(VL) IN(WL) IN(WL) V(FO) CFOD line (10) (11) SP05 CSPC05 (12) (13) (14) (15) (16) (17) THERMISTOR Wout C(FOD) C(SC) COM(L) IN(UL) (VL) Vout Uout VB(V) (25) VCC(VH) (24) IN(VH) (23) COM(H) (22) VS(V) (26) VB(W) (20) VCC(WH) (19) IN(WH) (18) VCC(UH) (28) IN(UH) (27)
line
CBSC
VS(U) (30)
CBSC
line VS(W) (21) CBSC CSPC15 CSP15
itorin
CDCS
RPCPL/RPCPH coupling each input recommended order prevent input signals' oscillation, should close possible each input pin. virtue integrating application specific type HVIC inside SPM, direct coupling terminals without opto-coupler transformer isolation possible. output open collector type. This signal line should pulled positive side power supply with approximately 4.7k resistance. CSP15 around times larger than bootstrap capacitor recommended. output pulse width should determined connecting external capacitor (CFOD) between CFOD (pin7) COM(L)(pin2). (Example CFOD 5.6nF, then 300us (typ.) Each input signal line should pulled power supply with approximately 4.7k resistance (other coupling circuits each input needed depending control scheme used wiring impedance system's printed circuit board). Approximately 0.22~2nF by-pass capacitor should used across each power supply connection terminal. prevent errors protection function, wiring around RSC, should short possible. short-circuit protection circuit, please select RFCSC time constant range 3~4us. should least times larger than RSC. (Recommended example: 3.9k 1nF) Each capacitor should mounted close pins possible. 10.To prevent surge destruction, wiring between smoothing capacitor pins should short possible. high frequency non-inductive capacitor around 0.1~0.22 between pins recommended. Relays used almost every systems electrical equipments home appliances. these cases, there should sufficient distance between relays. recommended that distance least.
Rev. 2002
Thermal Resistances Applicable Power
Note) Phase thermal analyzer from AnaTechR used device calibration thermal resistance measurement.
12.1 Overview
Semiconductor devices very sensitive junction temperature, i.e., junction temperature increases, operating characteristics device altered from normal, failure rate increases exponentially. This makes thermal design package very important factor device development stage, also application field. gain insight into device's thermal performance, normal introduce thermal resistance, which defined difference temperature between closed isothermal surfaces divided total heat flow between them. semiconductor devices, temperatures junction temperature, reference temperature, amount heat flow equal power dissipation device during operation. selection reference point arbitrary, usually hottest spot back device which heat sink attached chosen. This called junction-to-case thermal resistance, Rjc. When reference point ambient temperature, this called junction-to-ambient thermal resistance, Rja. Both thermal resistances used characterization device's thermal performance. usually used heat sink carrying devices while used other cases. Fig. 12.1 shows thermal network heat flow from junction-to-ambient SPMs including heat sink. Package
Chip Ceramic Thermal Grease Heat sink
Fig. 12.1 Thermal network from junction ambient
thermal resistance defined following equation,
Rev. 2002
12.1
where, (°C/W) junction-to-case thermal resistance, P(W), Tj(°C) Tc(°C) power dissipation device, junction temperature case reference temperature, respectively. replacing with (ambient temperature), junction-to-ambient thermal resistance obtained following,
12.2
where, (°C/W) indicates total thermal performance including heat sink. Basically serial summation various thermal resistances, Rjc, (°C/W) (°C/W).
12.3
where, contact thermal resistance thermal grease between package heat sink, heat sink thermal resistance, respectively. From equation (12.3), clear that minimizing essential application factor maximize power carrying ability device well minimizing itself. Usually, value proportional thermal grease thickness governed skill assembly site, while handled some extent selecting appropriate heat sink.
12.2 Measurement Method
During thermal resistance test, some constants equation (12.1), i.e., should measured. Since measured directly, only unknown constant junction temperature, Electrical Test Method (ETM) widely used measure junction temperature. test method using relationship between forward voltage drop diode junction junction temperature. This relationship intrinsic electro-thermal property semiconductor junctions, characterized nearly linear relationship between forward-biased voltage drop junction temperature, when constant forward-biased current (sense current) applied. This voltage drop junction called Temperature Sensitive Parameter (TSP). Fig. 12.2 illustrates concept measuring voltage drop junction temperature relationship diode junction. device under test (DUT) embedded fluid heat desired temperatures.
Rev. 2002
Therm ocouple attached case ense Current
tirred Dielectric Bath Heater
Fig. 12.2 Illustration bath method measurement.
Tj=m*Vf+To
Fig. 12.3 Typical example Plot with constant sense current.
When attains thermal equilibrium with fluid, sense current applied junction. Then voltage drop across junction measured function junction temperatures. amount sense current should small enough heat DUT, instance, 1mA, 10mA depending device type. measurements repeated over specific temperature range with some specified temperature steps. Fig. 12.3 shows typical result. relationship between junction temperature voltage drop given temperature expressed shown following equation.
12.4
Rev. 2002
slope, m(°C/V) temperature ordinate-intercept, To(V) used quantify this straight line relationship. reciprocal slope often referred factor °C)". this case, Vf(V) TSP. semiconductor junctions, slope calibrating straight line Fig. 12.2 always negative, i.e., forward conduction voltage decreases with increasing junction temperature. This process obtaining equation (12.4) called calibration procedure given device. During thermal resistance measurement test, junction temperature estimated measuring voltage drop given sense current during calibration procedure using equation (12.4). varies from device device, since specific device does have diode voltage TSP. transistor saturation voltage used that case. instance, gate turn-on voltage used IGBT MOSFET.
12.3 Measurement Procedures
thermal resistance test begins applying continuous power known current voltage DUT. continuous power heats thermally equilibrated state. While device heating, continuous train sampling pulses monitors TSP, i.e., voltage drop same junction temperature. sampling pulse must provide sense current equal that used during calibration procedure obtaining equation (12.4). While monitoring TSP, adjust applied power insure sufficient rise Adjusting applied power achieve increase about 100°C above reference temperature will generate enough temperature difference ensure good measurement resolution. typical example shown Fig. 12.4. Heating Power
Train heating pulses with 80ms interval sensing pulses with given
80ms
Time
Fig. 12.4 Example power sample pulses train during measurement SPM-IGBT
sampling time must very short allow appreciable cooling junction prior re-applying power. power sensing pulse train shown Fig. 12.4 duty cycle 99.9%, which practical purposes considered continuous power. Obviously, most total power applied Fig. 12.5.
Rev. 2002
Once reaches thermal equilibrium, value along with reference temperature applied power recorded. Using measured values equation (12.1), junction-tocase thermal resistance estimated. here indicates ability device dissipate power ideal environment, that mounted with infinite temperature-controlled heat sink. Fig. 12.6 shows thermal resistance measurement environment SPMs. placed heat sink having large heat carrying capacity. Thermal grease applied between heat sink prevent gap.
Electronic Switch Heating Circuit Sensing Circuit
Heating Current,
Sense Current
m*Vf (TJ-Tc)/(V*I)
Fig. 12.5 Illustration thermal resistance test method concept
Rev. 2002
Pressure Switch
Pneumatic Heat Sunk Fixture Serial #9511030 Voltage 120VAC, 60HZ Case Size External Heat Sink Size:
Pressure Gauge Pressure Controller
Cooling
Thermo -couple
125mm
Blowing
Fig. 12.6 thermal measurement environment
thermocouple inserted through heat sink pressed against underside record surface temperature. Although there stipulation thermocouple location which reference temperature here) needs measured, recommended that ideal location hottest point. this note, center ceramic heat sink center chosen. thermocouple needs make good thermal contact with reference location. Thermal grease appropriate clamping pressure needed shown Fig. 12.6.
12.4 Measurement Data
Table 12.1 shows measured thermal resistance data IGBT FRD. Fig. 12.7 shows transient thermal resistance graph (Thermal Impedance Graph) IGBT inside SPMs. This shows time dependent thermal characteristics before reaching steady state after about seconds. thermal impedance value steady state equal thermal resistance.
Rev. 2002
Table 12.1 Thermal Resistance Data Symbol Parameter Junction-to-Case Thermal Resistance Contact Thermal Resistance Condition IGBT (1/6) Diode (1/6) Limit Min. Typ. 0.06* 2.61 3.73 °C/W Unit
Note) This numerical analysis result
Thermal Impedance Curve
Thermal Impedance(/W)
0.00001 0.001 1000
Time(s)
Fig. 12.7 Thermal impedance SPM-IGBT
12.5 Junction Temperature Prediction Method
application environment, prediction junction temperature important crucial maintain junction temperature below design limit. Fig. shows test set-up explain apply thermal resistance concept predict junction temperature under given operating environment. this case natural convection chamber used precisely compare predicted measured junction temperatures. heat sink used here same used real washing machines applications.
Rev. 2002
Fig. 12.8 Test environment FPAL15SH60 junction temperature prediction using thermal resistance data (AnatechR Chamber) (Units (cm)).
Four Variables, Recorded during Test: Junction temperature using concept used thermal resistance measurement procedure Reference temperature Ambient temperature using thermocouples Power dissipation controlled power supply. important that reference point should same used during thermal resistance measurement test (the center here). Using these measured values thermal resistance data given previous section, easy compare predicted measured junction temperatures. junction temperature estimated using thermal resistance data field application environment with this simple procedure. Equation (12.5) used estimate junction temperature rewritten from equation (12.1). equation (12.5), Rjc, known measured values.
estimated 12.5
Rev. 2002
Table 12.2 shows test results predicted values. Table 12.2 Comparison between estimated measured junction temperatures Comparison Site Side Applied Power P(W) 14.6 Reference Temperature Tc(°C) 79.61 Junction Temperature, (°C) Thermal Resistance Estimated (°C/W) using Eq.5 Measured Error 2.61 117.72 110.19 -6.8
seen Table 12.2, estimated junction temperature closely matches measured value. Equation (12.5) states that restricting maximum power dissipation case temperature needed maintain below level that does exceed desirable maximum junction temperature (125°C specific values determined designer). lowered selecting appropriate heat sink, then allowable maximum power dissipation increased.
12.6 Heat Sink Design Guide
selection heat sink constrained many factors including space, actual operating power dissipation, heat sink cost, flow condition around heat sink, assembly location, etc. this note, only some constraints analyzed give some insights heat sink selection from practical application point view. Heat Sink Washing Machines type heat sink shown Fig. 12.9 applied under natural convection conditions washing machine applications that have drive characteristics which power dissipated alternatively high over periods hundreds milli-seconds SPM.
Fig. 12.9 heat sink example washing machines applications. thickness, spacing, height, length, Base-plate thickness, Base-plate width, Base-plate length
Rev. 2002
Figs. 12.10 12.13 show analysis results heat sink-to-ambient thermal resistance, Rha, designing heat sink. This varies widely with changes spacing, fin/baseplate length fin/base-plate width. should noted that optimum spacing approximately with base-plate area mm2, shown Fig. 12.10. Increasing spacing results reduction total number fins, i.e., total convection area. Reducing spacing interferes with airflow field between adjacent fins. This causes increase thermal resistance when fins spaced below above 5mm, respectively. increase thickness decreases total number fins size heat sink, resulting increase thermal resistance.
(/W) Thickness,
Spacing, b(mm)
Fig. 12.10 variation change spacing. (Constant: c=21mm, d=53mm, e=4mm, f=78mm, g=53mm)
Rev. 2002
Figs. 12.11 12.12 show results effect base-plate length width thermal resistance. From Fig. 12.11, that increase length 150%, that 79.5mm reduces resistance (2.3 °C/W), increase 200% reduces resistance (2.09 °C/W). Fig. 12.12 result variation base-plate width shows that increase width 150% 200% reduces resistance (2.144 °C/W) (1.88 °C/W), respectively. Therefore, increasing width more effective reducing thermal resistance, compared with increasing length. Fig. 12.13 shows thermal resistance variation with change height.
Base plate length, (mm)
(/W)
Fig. 12.11 variation change base-plate length. (Contant: a=1.5mm, b=5.45mm, c=21mm, e=4mm, f=78mm)
Base plate width, f(mm)
(/W)
Fig. 12.12 variation change base-plate width. (Constant: a=1.5mm, b=5.45mm, c=21mm, d=53mm, e=4mm, g=53mm)
Rev. 2002
(/W)
height, (mm)
Fig. 12.13 variation change height. (Constant: a=1.5mm, b=5.45mm, d=53mm, e=4mm, f=78mm, g=53mm)
Heat Sink Air-Conditioners Inverters air-conditioner applications need continuous power dissipation SPM, which different from those used washing machines. They generally heat sink with forced-convection using SPM. Fig. 12.14 shows shape heat sink, which generally used conditioning systems. this section, airflow velocity effect thermal resistance described based using heat sink shown Fig. Airflow direction
Fig. 12.14 heat sink example air-conditioner applications. (Constant: 2mm, 6mm, 30mm, d=140mm, e=7mm, f=76/100mm, g=160mm)
Rev. 2002
Fig. 12.15 shows airflow velocity effect resistance, Rha. kinds heat sink base-plates used reference values thermal resistance around °C/W °C/W, respectively, depending natural convection condition. that forced convection reduces resistance approximately three times. this case velocity about m/sec, optimal cost-effective heat sink size. having velocity m/sec., reduces resistance (0.25 °C/W).
Fig. 12.15 Rqha variation change airflow velocity.
Rev. 2002
Power Loss Dissipation
total power losses composed conduction switching losses caused IGBTs FRDs. loss during turn-off steady state ignored because very small amount little effect increasing temperature device. conduction loss depends electrical characteristics device i.e. saturation voltage. Therefore, function conduction current device's junction temperature. other hand switching loss determined dynamic characteristics like turn-on/off time over-voltage/current. Hence, order obtain accurate switching loss, should consider DC-link voltage system, applied switching frequency power circuit layout addition current temperature. this chapter, based PWM-inverter system motor control applications, detailed equations shown calculate both losses (refer articles Casanellas, "Losses inverters using IGBT's," Proc. Inst. Elect. Eng.-Elect. Power Applicant. vol. 141, 235-239, Sept.1994. Berringer, Marvin Perruchoud, "Semiconductor Power Losses inverters," Conf. Rec. IEEE IAS'95, 882-888, 1995), power ratings SPMs. These presented field application conditions such switching frequency, dc-link voltage operating temperature. using these results practical heat sink selection example also shown.
13.1 Calculation Method Conduction Loss
typical forward characteristics approximated following linear equation IGBT FRD, respectively. Threshold voltage IGBT on-state slope resistance IGBT (13.1) Threshold voltage diode on-state slope resistance diode
where, saturation voltage IGBT saturation voltage diode, respectively. Assuming that switching frequency high, output current PWM-inverter assumed sinusoidal. That Ipeakcos( (13.2)
Where phase-angle difference between output voltage current. Using equation (13.1), conduction loss IGBT diode obtained follows.
peak peak con.I
13.3
peak peak con.D )cosd )cos
13.4
Rev. 2002
where duty cycle given method.
13.5
where modulation index method that represents normalized voltage between zero one. Notice that full modulation duty ratio varies from zero 100%. Finally, integration equation (13.3) (13.4) gives
con.I con.D
13.6
peak peak peak peak )MIcos )MIcos
should noted that total inverter conduction losses times Pcon.
13.2 Calculation Method Switching Loss
Different devices have different switching characteristics they also vary according handled voltage/current operating temperature/frequency. However, turn-on/off loss energy (Joule) experimentally measured indirectly multiplying current voltage integrating over time, under given circumstance. Therefore linear dependency switching energy loss switched-current expressed during switching period follows.
Switching energy loss joule I.ON I.OFF D.ON D.OFF 13.7 13.8 13.9
where, switching loss energy IGBT diode. considered constant. mentioned above equation (13.2), output current considered sinusoidal waveform switching loss occurs every period continuous schemes. Therefore, depending switching frequency fsw, switching loss device following equation (13.10).
peak
peak
13.10
where unique constant each IGBT related switching energy, diode. Those should derived experimental measurement. From equation (13.10), should noted that switching losses linear functionof current directly proportional switching frequency.
Rev. 2002
13.3 Power Losses
Conduction loss parameters equation (13.1) have been measured calculated using curve tracer equipment, 371A. temperature conditions 25°C 125°C have been used were independently applied products. Figs. 13.1 13.12 show switching waveforms each product they were used obtain parameters equation (13.10). condition using 300V rating current applied example. Actually applicable voltages currents have been used. Figs. 13.1 13.6 switching waveforms measured under condition 25°C Figs. 13.7 13.12 125°C. that higher switching power loss occurs higher temperatures longer switching time.
Time:[100ns/div.
Ic:[5A/div.]
Vce:[100V/div P:[5kW/div.]
turn-on loss IGBT turn-off loss IGBT
conduction loss IGBT
Fig. 13.1 Power losses FPAL15SH60-IGBT.
Time:[100ns/div.
Ic:[5A/div.
Vce:[100V/div.]
P:[5kW/div.]
turn-on loss IGBT turn-off loss IGBT
conduction loss IGBT
Fig. 13.2 Power losses FPAL15SM60-IGBT.
Rev. 2002
Time:[100ns/div.
Ic:[5A/div.]
Vce:[100V/div P:[5kW/div.]
conduction loss IGBT
turn-on loss IGBT turn-off loss IGBT
Fig. 13.3 Power losses FPAL15SL60-IGBT
Time:[200ns/div.
Ic:[10A/div.]
Vce:[100V/div P:[10kW/div.]
conduction loss IGBT
turn-on loss IGBT turn-off loss IGBT
Fig. 13.4 Power losses FPAL20SM60-IGBT
Time:[200ns/div.
Ic:[10A/div
Vce:[100V/div.] P:[10kW/div.]
conduction loss IGBT
turn-on loss IGBT turn-off loss IGBT
Fig. 13.5 Power losses FPAL20SL60-IGBT
Rev. 2002
Time:[200ns/div.
Ic:[10A/div.]
Vce:[100V/div P:[5kW/div.]
conduction loss IGBT
turn-on loss IGBT turn-off loss IGBT
Fig. 13.6 Power losses FPAL30SL60-IGBT
Time:[200ns/div.
Ic:[5A/div.]
Vce:[100V/div P:[5kW/div.]
turn-on loss IGBT turn-off loss IGBT
conduction loss IGBT
Fig. 13.7 Power losses FPAL15SH60-IGBT
Time:[200ns/div.
Ic:[5A/div.
Vce:[100V/div.] P:[5kW/div.]
conduction loss IGBT
turn-on loss IGBT turn-off loss IGBT
Fig. 13.8 Power losses FPAL15SM60-IGBT
Rev. 2002
Time:[200ns/div.
Ic:[5A/div.]
Vce:[100V/div P:[5kW/div.]
conduction loss IGBT
turn-on loss IGBT turn-off loss IGBT
Fig. 13.9 Power losses FPAL15SL60-IGBT
Time:[200ns/div.
Ic:[10A/div.]
Vce:[100V/div P:[10kW/div.]
turn-on loss IGBT turn-off loss IGBT
conduction loss IGBT
Fig. 13.10 Power losses FPAL20SM60-IGBT
Time:[200ns/div.
Ic:[10A/div
Vce:[100V/div.] P:[5kW/div.]
conduction loss IGBT
turn-on loss IGBT turn-off loss IGBT
Fig. 13.11 Power losses FPAL20SL60-IGBT
Rev. 2002
Time:[200ns/div.
Ic:[10A/div.]
Vce:[100V/div P:[5kW/div.]
conduction loss IGBT
turn-on loss IGBT turn-off loss IGBT
Fig. 13.12. Power losses FPAL30SL60-IGBT
Calculated Results Figs. 13.13 -13.58 show calculated results including total power loss conduction switching IGBTs FRDs. should noted that cos=0.8 used common parameters calculation processes. Figs. 13.13 13.18 shows power loss caused SPMs with rating 15A, according operating switching frequency variation. Comparison results shown using temperature conditions 25°C 125°C, three kinds DC-link voltages 300V, 350V 400V. Figs. 13.19 13.24 show power loss SPMs with rating that function controlled load current values under constant frequency 2kHz. Figs. 13.25 13.30 show results using same conditions, except constant frequency 7kHz. Figs. 13.31 13.36 frequency about 15kHz. Note that SH-SPM lowest loss 15kHz operating condition power loss max. reduced worst condition. Figs. 13.37 13.42 power loss graphs SPMs with rating considering operating switching frequency variation. Remember that there types products. rating. temperature DC-link voltage variations used similar those used 15A-SPMs. Users select appropriate depending system frequency conditions. Figs. 13.43 13.48 Figs. 13.49 13.54 show power loss graphs under constant switching frequencies 2kHz 7kHz, repectively. Comparison results shown using temperature conditions 25°C 125°C, three kinds DC-link voltages 300V, 350V 400V. Figs. 13.55 13.58 show power loss graphs with rating 30A. Note that there only product 30A-SPM. Figs. 13.55 13.57 results under 25°C Figs. 13.56 13.58 under 125°C. From Fig. 13.58, that different DC-link voltages cause almost same power loss switching frequency 2kHz.
Rev. 2002
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Frequency [kHz]
Frequency [kHz]
Fig. 13.13 Power loss operating switching frequency characteristics SPMs with rating 15A(condition: Ipeak=10A, Tj=25°C, VDC=300V).
Fig. 13.14 Power loss operating switching frequency characteristics SPMs with rating 15A(condition: Ipeak=10A, Tj=125°C, VDC=300V).
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Frequency [kHz]
Frequency [kHz]
Fig. 13.15 Power loss operating switching frequency characteristics SPMs with rating 15A(condition: Ipeak=10A, Tj=25°C, VDC=350V
Fig. 13.16 Power loss operating switching frequency characteristics SPMs with rating 15A(condition: Ipeak=10A, Tj=125°C, VDC=350V).
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Frequency [kHz]
Frequency [kHz]
Fig. 13.17 Power loss operating switching Fre- Fig. 13.18 Power loss operating switching frequency characteristics SPMs with rating quency characteristics SPMs with rating 15A(condition: Ipeak=10A, Tj=25°C, VDC=400V 15A(condition: Ipeak=10A, Tj=125°C, VDC=400V).
Rev. 2002
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.19 Power loss load peak current charac- Fig. 13.20 Power loss load peak current charteristics SPMs with rating (condition: acteristics SPMs with rating (condition: f=2kHz, Tj=25°C, VDC=300V) f=2kHz, Tj=125°C, VDC=300V)
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.21 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=25°C, VDC=350V)
Fig. 13.22 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=125°C, VDC=350V)
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.23 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=25°C, VDC=400V)
Fig. 13.24 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=125°C, VDC=400V)
Rev. 2002
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.25 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=25°C, VDC=300V).
Fig. 13.26 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=125°C, VDC=300V).
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.27 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=25°C, VDC=350V).
Fig. 13.28 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=125°C, VDC=350V).
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.29 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=25°C, VDC=400V).
Fig. 13.30 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=125°C, VDC=400V).
Rev. 2002
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.31 Power loss load peak current characteristics with rating SPMs (condition: f=15kHz, Tj=25°C, VDC=300V)./
Fig. 13.32 Power loss load peak current characteristics SPMs with rating (condition: f=15kHz, Tj=125°C, VDC=300V).
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.33 Power loss load peak current characteristics SPMs with rating (condition: f=15kHz, Tj=25°C, VDC=350V).
Fig. 13.34 Power loss load peak current characteristics SPMs with rating (condition: f=15kHz, Tj=125°C, VDC=350V).
FPAL15SL60 FPAL15SM60 FPAL15SH60
FPAL15SL60 FPAL15SM60 FPAL15SH60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.35 Power loss load peak current characteristics SPMs with rating (condition: f=15kHz, Tj=25°C, VDC=400V).
Fig. 13.36 Power loss load peak current characteristics SPMs with rating (condition: f=15kHz, Tj=125°C, VDC=400V).
Rev. 2002
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Frequency [kHz]
Frequency [kHz]
Fig. 13.37 Power loss operating switching frequency characteristics SPMs with rating (condition: Ipeak=15A, Tj=25°C, VDC=300V)
13.38 Power loss operating switching frequency characteristics SPMs with rating (condition: Ipeak=15A, Tj=125°C, VDC=300V)
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Frequency [kHz]
Frequency [kHz]
13.39 Power loss operating switching frequency characteristics SPMs with rating (condition: Ipeak=15A, Tj=25°C, VDC=350V)
13.40 Power loss operating switching frequency characteristics SPMs with rating (condition: Ipeak=15A, Tj=125°C, VDC=350V)
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Frequency [kHz]
Frequency [kHz]
13.41 Power loss operating switching frequency characteristics SPMs with rating (condition: Ipeak=15A, Tj=25°C, VDC=400V)
13.42 Power loss operating switching frequency characteristics SPMs with rating (condition: Ipeak=15A, Tj=125°C, VDC=400V)
Rev. 2002
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.43 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=25°C, VDC=300V)
Fig. 13.44 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=125°C, VDC=300V)
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.45 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=25°C, VDC=350V)
Fig. 13.46 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=125°C, VDC=350V)
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.47 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=25°C, VDC=400V)
Fig. 13.48 Power loss load peak current characteristics SPMs with rating (condition: f=2kHz, Tj=125°C, VDC=400V)
Rev. 2002
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.49 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=25°C, VDC=300V)
Fig. 13.50 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=125°C, VDC=300V)
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.51 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=25°C, VDC=350V)
Fig. 13.52 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=125°C, VDC=350V)
FPAL20SL60 FPAL20SM60
FPAL20SL60 FPAL20SM60
Power Loss
Power Loss
Ipeak
Ipeak
Fig. 13.53 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=25°C, VDC=400V)
Fig. 13.54 Power loss load peak current characteristics SPMs with rating (condition: f=7kHz, Tj=125°C, VDC=400V)
Rev. 2002
=300V =350V =400V
DC=300V DC=350V DC=400V
Power Loss
Power Loss
Frequency [kHz]
Frequency [kHz]
Fig. 13.55 Power loss operating switching frequency characteristics FPAL30SL60 (condition: Ipeak=25A, Tj=25°C)
Fig. 13.56 Power loss operating switching frequency characteristics FPAL30SL60 (condition: Ipeak=25A, Tj=125°C)
=300V =350V =400V
DC=300V DC=350V DC=400V
Power Loss
Power Loss
Frequency [kHz]
Ipeak
Fig. 13.57 Power loss load peak current characteristics FPAL30SL60 (condition: f=2kHz, Tj=25°C)
Fig. 13.58 Power loss load peak current characteristics FPAL30SL60 (condition: f=2kHz, Tj=125°C)
Rev. 2002
Effective Load Current Fig. 13.59 shows calculated effective load current depending switching frequency. presents effective load current (IRMS) which outputted when junction temperature (Tj) rises average junction temperature 125°C which operates safely). should noted that following results vary depending control criteria type motor drive. Applied conditions follows; Condition: VDC=300V, VCC=15V, Vce(sat)=typ., switching loss=typ., Tj=125°C Tc=100°C Rjc=max. specification
FPAL15SL60 FPAL15SM60 FPAL15SH60 FPAL20SL60 FPAL20SM60
IRMS
Frquency [kHz]
Frequency [kHz]
FPAL30SL60
IRMS
Fig. 13.59 Effective load current operating switching frequency
13.4 Power Dissipation Design
Fig. 13.60 shows thermal equivalent circuit mounted heat sink. sustained power dissipation junction, junction temperature calculated
13.11
where ambient temperature Rjc, Rch, represent thermal resistance from junction case, case heat sink, heat sink ambient each IGBT diode within SPM, respectively. dotted component ignored sake convenience. From equation (13.11) evident that limited Tjmax (usually 125°C) increased reducing Rha. This means that more efficient cooling system will increase power dissipation capability SPM. infinite heat sink will result reduced zero case temperature locked fixed ambient temperature
Rev. 2002
practical operation, power loss cyclic therefore transient equivalent circuit shown Fig. 3.60 should considered. pulsed power loss, thermal capacitance effect delays rise junction temperature, thus permits heavier loading SPM. Fig. 12.7 shows transient thermal impedance characteristics SPM. However, this note, thermal capacitances dotted boxes Fig. 13.60 also ignored because intend design with continuous max. power dissipation.
Being ignored
Transient impedance each section
Fig. 13.60 Transient thermal equivalent circuit with heat
this chapter, referring equations (3.6) (3.10) using FPAL30SL60 device, example power dissipation design given. SPM, FPAL30SL60, selected sample device. applied conditions experimentally calculated parameters follows; Condition parameters: Tj=125, VI=0.83, VD=0.87, Ipeak=25A, MI=0.8, cos=0.8, RI=0.046, RD=0.082, EI=0.128x10-3, ED=3.3x10-6, fsw=3kHz, Rjc=max. value (see datasheet) IGBT Part From equation (13.6) conduction loss IGBT calculated
,IGBT 0.83 0.83 )0.8 0.046 )0.8 10.5
13.12
diode part equation (13.10) ignored, switching loss IGBT becomes following:
0.128 ,IGBT 3.05
13.13
Thus total power loss IGBTs obtained through summation values calculated above equations (13.12) (13.13)
,IGBT ,IBGT ,IBGT 10.5 3.05 81.3
13.14
Rev. 2002
From equation (13.14) know that total power loss 81.3W, from datasheet Rjc,IGBT 2.2°C/W 0.067°C/W, therefore, temperature case heat sink calculated
,IGBT 95.19 ,IGBT 89.74 13.15 13.16
Finally, assuming ambient temperature 40°C, which usually considered worst condition, required thermal resistance heat sink derived
0.554 ,IGBT 13.17
Note that chapter describes practical example heat sink design. Diode Part conduction switching loss diode calculated, similar IGBT part, using equations (13.6) (13.10)
,diode 0.87 0.87 )0.8 0.04 0.04 )0.8 3.15 13.18 ,diode 0.079
13.19
1The total loss dioedes calculated equation (13.20) below;
,diode Pcon ,diode ,diode 3.15 0.079 19.374 13.20
From equation (13.20) total power loss 19.374W from datasheet Rjc,diode 2.2°C/W 0.067°C/W. Therefore, temperature case heat sink calculated
,diode 114.7 ,diode 113.44 13.21 13.22
Similar IGBT part, applying ambient temperature 40°C, required thermal resistance heat sink diode calculated
,diode 3.79 13.23
should noted that result equation (13.23) shows that heat sink diode much smaller, compared with IGBT. means that thermal dissipation diode should considered when selecting heat sink SPM.
Rev. 2002
Packaging Installation Guide
14.1 Heat Sink Mounting
following precautions should observed maximize effect heat sink minimize device stress, when mounting heat sink. Heat Sink Please follow instructions manufacturer, when attaching heat sink SPM. careful apply excessive force device when attaching heat sink. Drill holes screws heat sink exactly specified. Smooth surface removing burrs protrusions indentations. Refer Table 14.1. Heat-sink-equipped devices become very when operation. touch, sustain burn injury. Silicon Grease Apply silicon grease between heat sink reduce contact thermal resistance. sure apply coating thinly evenly, much. uniform layer silicon grease (100 200um thickness) should applied this situation. Screw Tightening Torque exceed specified fastening torque. Over tightening screws cause ceramic cracks bolts heat-fin destruction. Tightening screws beyond certain torque cause saturation contact thermal resistance. tightening torques table 14.1 recommended obtaining proper contact thermal resistance avoiding application excessive stress device. Avoid stress tightening side only. Fig. 14.1 shows recommended torque order mounting screws. Uneven mounting cause ceramic substrate damaged. Table 14.1 Torque Rating
Item Mounting Torque Ceramic Flatness Condition Limits Min. +100 Unit Kgcm
Mounting Screw Recommended Kgcm (Note Fig. 14.1) Recommended 0.98 (Note Fig. 14.2)
Rev. 2002
Fig. 14.1 Mounting screws torque order
Fig. 14.2 Flatness measurement position ceramic substrate
Rev. 2002
14.2 Handling Precaution
When using semiconductors, incidence thermal and/or mechanical stress devices improper handling result significant deterioration their electrical characteristics and/or reliability. Transportation Handle device packaging material with care. avoid damage device, toss drop. During transport, ensure that device subjected mechanical vibration shock. Avoid getting devices wet. Moisture also adversely affect packaging nullifying effect antistatic agent). Place devices special conductive trays. When handling devices, hold package avoid touching leads, especially gate terminal. package boxes correct direction. Putting them upside down, leaning them giving them uneven stress might cause electrode terminals deformed resin case damaged. Throwing dropping packaging boxes might cause devices damaged. Wetting packaging boxes might cause breakdown devices when operating. attention them when transporting rainy snowy day. Storage Avoid locations where devices will exposed moisture direct sunlight. especially careful during periods rain snow.) place device cartons upside down. Stack cartons atop another uprighrt position only. place cartons their sides. storage area temperature should maintained within range with humidity kept within range from 75%. store devices presence harmful (especially corrosive) gases, dusty conditions. storage areas where there minimal temperature fluctuation. Rapid temperature changes cause moisture condensation stored devices, resulting lead oxidation corrosion. result, lead solderability will degraded. When repacking devices, antistatic containers. Unused devices should stored longer than month. allow external forces loads applied devices while they storage. Environment When humidity working environment decreases, human body other insulators easily become charged with electrostatic electricity friction. Maintain recommended humidity work environment. aware risk moisture absorption products after unpacking from moisture-proof packaging. sure that equipment, jigs tools working area grounded earth. Place conductive over floor work area, take other appropriate measures, that floor surface grounded earth protected against electrostatic electricity.
Rev. 2002
Cover workbench surface with conductive mat, grounded earth, disperse electrostatic electricity surface through resistive components. Workbench surfaces must constructed low-resistance metallic material that allows rapid static discharge when charged device touches directly. Ensure that work chairs protected with antistatic textile cover grounded floor surface with grounding chain. Install antistatic mats storage shelf surfaces. transport temporary storage devices, containers that made antistatic materials materials that dissipate static electricity. Make sure cart surfaces that come into contact with device packaging made materials that will conduct static electricity, grounded floor surface with grounding chain. Operators must wear antistatic clothing conductive shoes heel strap). Operators must wear wrist strap grounded earth through resistor about tweezers likely touch device terminals, antistatic type avoid metallic tweezers. charged device touches such low-resistance tool, rapid discharge occur. When using vacuum tweezers, attach conductive chucking connect dedicated ground used expressly antistatic purposes. When storing device-mounted circuit boards, board container that protected against static charge. Keep them separated from each other, stack them directly another, prevent static charge/discharge which occurs friction. Ensure that articles (such clip boards) that brought into static electricity control areas constructed antistatic materials possible. cases where human body comes into direct contact with device, sure wear finger cots gloves protected against static electricity. Electrical Shock device undergoing electrical measurement poses danger electrical shock. touch device unless sure that power measuring instrument off. Circuit Board Coating When using devices equipment requiring high reliability extreme environments (where moisture, corrosive dust present), circuit boards coated protection. However, before doing must carefully examine possible effects stress contamination that result. There many varied types coating resins whose selection most cases, based experience. However, because device-mounted circuit boards used various ways, factors such board size, board thickness, effects that components have another, makes practically impossible predict thermal mechanical stresses that semiconductor devices will subjected
Rev. 2002
14.3 Packaging Guide SPMs normally shipped tray. tray made recycled HIPS plastic treated with anti-static agent. tray contains SPMs. These trays placed stack with layers, including dummy layer, inside middle made recycled corrugated paper. middle contains SPMs. Bubble bags sponges inserted eliminate mechanical shock. these middle boxes placed inside labeled large box. maximum capacity large SPMs. actual quantity depends total number boxes listed purchase order.
Fig. 14.3 Description packaging process
Rev. 2002
support support support support support support support support
CON5
support
support 220,3W
Appendix
RELAY1 470u/250V RBV-2506 RELAY 5501 15mH/5A 224/AC275V 5N60 200K/0.5W 221/400Vac 471/400Vac 470u/250V 474/AC275V 471/400Vac 221/400Vac 200K/0.5W D5U60S
104/AC275V
15.1.1 Input Power Part
PV3.3 4.7KJ0 U1DL-44A HEATSINK HEATSINK SUPPORT 10KJ0 SUPPORT
CON10
4.7KJ0 2N2222
MC_CON
KRC101S
100KJ1 500K,2W DRAIN 220uF,25V U1DL-44A 100KJ1 100KF,1W 100KF,1W PM3A104K 100uF,25V 10J4 UF4007
220uF,10V
15.1 Detailed Schematics Inverter System
1KJ4
PV3.3 100KF,1W Trans_3out_with_FB U1DL-44A 10uF Drain KA5H0280R
U1DL-44A
100uF,25V 100uH, 2.0A
2KJ4
104,50V H11A817C
2.8KF0
473,50V
PC1B H11A817C
PC1A
TL431A
103,2kV 100uH, 2.0A 100KF,1W
100uF,25V
100uF,25V PV15 PV15 PV15
VDC_AD
KDS226 VDC_FB
200J0
0.7A 0.3A
1KJ0 2.61KF0 104,50V
2.49KF0
Title
INPUT POWER
Size Date:
Document Number <Doc> Monday, 2001
Sheet
Rev. 2002
PV15 PV3.3 FTPM1G15SH60 VCC(L) Vs(U) VB(U) VCC(UH) US1J 220u VCC(L) VS(U) VB(U) VCC(UH) IN(UH) US1J 220u PV15 PV15
15.1.2 Part
100J0 IN(UL) IN(VL) IN(WL) VS(V) VB(V) VCC(VH) IN(VH) 220u US1J VS(V) VB(V) VCC(VH)
4.7KJ0
CFOD PV3.3 VS(W) VB(W) VCC(WH) IN(WH) VS(W) VB(W) VCC(WH) CFOD
PV3.3
IDC_AD 3.9k 680n/630V
CON5
KDS226 TEMP_AD
KDS226
10KF0 10KF0 10KF0 10KF0 10KF0 10KF0
Title Size Date:
Document Number <Doc> Monday, 2001
Sheet
Rev. 2002
LD1117DT33 PV3.3L
PV3.3
ELJFA101kF
PV3.3L
104/CER 104/CER /BOOT BOOT_EN /RESET PWM01 PWM02 PWM03 PWM04 PWM05 PWM06 PWM_DIS 74ALS1034
104/CER
22uF/10V
220J0
22uF/10V
104/CER
15.1.3 Part
XINT1 IOPA2 XINT2 DCSOC IOPD0 16J0 XTAL1/CLKIN XTAL2 CLKOUT IOPE0 682/CER VFD_E_CPU VFD_R/W_CPU VFD_RS_CPU PLLF2 PLLF PLLVCCA T1PWM T1CMP IOPB4 T2PWM T2CMP IOPB5 TDIRA IOPB6 TCLKINA IOPB7 334/CER
IOPA6 IOPA7 IOPB0 IOPB1 IOPB2 IOPB3 PDPINTA
100/CER
1MJ0
100J0
PV3.3
100/CER PV3.3 100J0 /BOOT /RESET CHAR_D0
ELJFA101kF
CHAR_D1 CHAR_D2 CHAR_D3 CHAR_D4 CHAR_D5 CHAR_D6
7.5MHz
4.7KJ0
PV3.3
KDS226
PWM07 PWM08 PWM09 PWM10 PWM11 PWM12
IOPE1 IOPE2 IOPE3 IOPE4 IOPE5 IOPE6 PDPINTB
/RXD /TXD 4.7KJ0
CHAR_D7 RUN_KEY STOP_KEY CAP1 CAP2 CAP3 CAP4 CAP5 CAP6 T3PWM T3CMP IOPF2 T4PWM T4CMP IOPF3 TDIRB IOPF4 TCLKINB IOPF5 MODE_KEY A/M_KEY UP_KEY DOWN_KEY Test_LED IOPC0 IOPC1 IOPF6 QEP1 IOPA3 QEP2 IOPA4 IOPA5 QEP3 IOPE7 QEP4 IOPF0 IOPF1
Test_LED
KRC101S
VDC_AD IDC_AD VOL_AD TEMP_AD
ADCIN00 ADCIN01 ADCIN02 ADCIN03 ADCIN04 ADCIN05 ADCIN06 ADCIN07
PV15 104/CER PV3.3 2N2222 4.7KJ0 SPI_SIMO DB_CON 4.7KJ0 249J2 KTN2907AS DB_CON MC_CON KRC101S MC_CON
ADCIN08 ADCIN09 ADCIN10 ADCIN11 ADCIN12 ADCIN13 ADCIN14 ADCIN15 EMU0 EMU1 VREFLO VREFHI SCI_TXD IOPA0 SCI_RXD IOPA1 /TXD /RXD VCCA VSSA PV3.3L /RESET
TMS2 TRST
PV3.3 CAN_TX IOPC6 CAN_RX IOPC7 NS809T-3.08 3.08V VDD1 VDD2 VDD3 VDD4 PV3.3L PV3.3 104/CER VDD1 VDD2 VDD3 VDD4 VSS1 VSS2 VSS3 VSS4 VCCP 104/CER
4.7KJ0 SPI_CLK IOPC4 SPI_STE IOPC5 SPI_SOMI IOPC3 SPI_SIMO IOPC2
104/CER
PV3.3 TMS320LF2406
10KJ0 22KJ0 22KF0 CON5 PV15 22KJ0 HA_IN HB_IN HC_IN
10KJ0
10KJ0
SPI_STE SPI_SOMI
104/CER
104/CER
104/CER
104/CER
VDDO1
VDDO2
VDDO3
VDDO4
VDDO5
VSS1
VSS2
VSS3
VSS4
104/CER
104/CER
104/CER
104/CER
104/CER
104/CER
SPI_CLK SPI_STE SPI_SOMI VSS1 VSS2 VSS3 VSS4 VDDO1 VDDO2 VDDO3 VDDO4 VDDO5 VDDO6 VDDO1 VDDO2 VDDO3 VDDO4 VDDO5 VDDO6 VSSO1 VSSO2 VSSO3 VSSO4 VSSO5 VSSO6 VSSO1 VSSO2 VSSO3 VSSO4 VSSO5 VSSO6 VDD1 VDD2 VDD3 VSSO1 VSSO2 VSSO3 VSSO4
PV3.3
PV3.3
PV3.3
4.7KJ
4.7KJ
25LC040
/HOLD
SPI_CLK SPI_SIMO
HA_IN
HB_IN
PV3.3 VDD4 104/CER
HC_IN
VDDO6 Title VSSO5 VSSO6 Size Date:
Document Number <Doc> Monday, 2001
Sheet
Rev. 2002
15.1.4 Keypad Part
4.7KJ0
4.7KJ0
4.7KJ0
4.7KJ0
4.7KJ0
4.7KJ0
CHAR_D0 CHAR_D1 CHAR_D2 CHAR_D3 CHAR_D4 CHAR_D5 74LS07 VFD_RESET VFD_RS VFD_R/W VFD_E VFD_16T202DA1E VFD_DB6 VFD_DB7 VFD_RS VFD_R/W VFD_E CHAR_D6 CHAR_D7 VFD_RS_CPU VFD_R/W_CPU VFD_E_CPU CHAR_D6 CHAR_D7 74LS07 4.7KJ0 4.7KJ0 4.7KJ0 4.7KJ0 4.7KJ0 /RST E(/RD) VFD_DB0 VFD_DB1 VFD_DB2 VFD_DB3 VFD_DB4 VFD_DB5 VFD_DB6 VFD_DB7
CHAR_D0 CHAR_D1 CHAR_D2 CHAR_D3 CHAR_D4 CHAR_D5
VFD_DB0 VFD_DB1 VFD_DB2 VFD_DB3 VFD_DB4 VFD_DB5
RUN_KEY STOP_KEY MODE_KEY A/M_KEY UP_KEY DOWN_KEY VOLUME 4.7KJ0 RUN_KEY STOP_KEY MODE_KEY A/M_KEY 4.7KJ0 4.7KJ0 4.7KJ0
RUN_KEY STOP_KEY MODE_KEY A/M_KEY UP_KEY DOWN_KEY VOLUME
UP_KEY
DOWN_KEY
RUN_KEY
STOP_KEY
MODE
A/M_KEY
UP_KEY
STOP_KEY
PV3.3 PV3.3 PV3.3 PV3.3 PV3.3 PV3.3 PV3.3 4.7KJ0 4.7KJ0
VOLUME
VOL_AD
472/CER
Title
Keypad
Size Date:
Document Number <Doc> Monday, 2001
Sheet
Rev. 2002
15.2 Resistance Temperature Built-in Thermistor
TEMP.[°C] RESISTANCE MIN. 152.6 145.2 138.1 131.4 125.1 119.1 113.5 108.1 103.1 98.30 93.73 89.40 85.30 81.39 77.71 74.22 70.91 67.74 64.76 61.91 59.20 56.60 54.15 51.80 49.59 47.50 45.45 43.48 51.60 39.81 38.11 36.50 34.97 33.51 32.12 30.80 29.53 TYP. 163.3 155.2 147.5 140.3 133.4 127.0 120.9 115.1 109.6 104.4 99.50 94.85 90.45 86.25 82.30 78.55 75.00 71.60 68.40 65.35 62.45 59.7 57.10 54.60 52.25 50.00 47.86 45.83 43.89 42.05 40.29 38.61 37.02 35.50 34.05 32.66 31.34 MAX. 173.9 165.1 156.9 149.1 141.7 134.8 128.2 122.0 116.1 110. 105.3 100.3 95.60 91.11 86.89 82.88 79.09 75.46 72.04 68.79 65.70 62.80 60.05 57.40 54.91 52.50 50.27 48.17 46.18 44.28 42.46 40.72 39.06 37.48 35.97 34.52 33.15 TEMP.[°C] RESISTANCE MIN. 28.33 27.18 26.08 25.04 24.04 23.09 22.18 21.31 20.48 19.69 18.93 18.20 17.51 16.84 16.21 15.60 15.02 14.46 13.92 13.41 12.92 12.45 12.00 11.57 11.15 10.76 10.38 10.01 9.660 9.320 8.996 8.686 8.390 8.103 7.830 7.567 7.313 TYP. 30.08 28.88 27.73 26.64 25.59 24.59 23.64 22.72 21.85 21.01 20.21 19.45 18.72 18.02 17.35 16.70 16.09 15.50 14.93 14.39 13.87 13.38 12.90 12.44 12.00 11.58 11.18 10.79 10.42 10.06 9.710 9.380 9.065 8.760 8.470 8.19 7.920 MAX. 31.83 30.58 29.38 28.23 27.14 26.09 25.09 24.13 23.21 22.33 21.49 20.69 19.92 19.19 18.48 17.80 17.15 16.53 15.94 15.37 14.82 14.30 12.85 13.31 12.85 12.40 11.97 11.56 11.17 10.79 10.42 10.07 9.740 9.417 9.110 8.813 8.527
Rev. 2002
Resistance Temperature Built-in Thermistor (Continued)
TEMP.[°C] RESISTANCE MIN. 7.069 6.835 6.605 6.390 6.179 5.978 5.787 5.600 5.423 5.246 5.083 4.921 4.767 4.618 4.475 4.336 4.203 4.074 3.951 3.830 3.715 3.603 3.496 3.392 3.292 3.194 3.101 3.011 2.923 TYP. 7.660 7.410 7.165 6.935 6.710 6.495 6.290 6.090 5.900 5.710 5.535 5.360 5.195 5.035 4.881 4.732 4.589 4.450 4.317 4.187 4.063 3.943 3.827 3.714 3.606 3.501 3.400 3.303 3.208 MAX. 8.251 7.985 7.725 7.480 7.241 7.012 6.793 6.580 6.377 6.174 5.987 5.800 5.623 5.452 5.287 5.128 4.974 4.826 4.683 4.544 4.410 4.282 4.157 4.036 3.920 3.808 3.699 3.594 3.493 TEMP.[°C] RESISTANCE MIN. 2.839 2.757 2.678 2.602 2.528 2.457 2.388 2.321 2.255 2.192 2.131 2.072 2.016 1.961 1.908 1.857 1.808 1.760 1.714 1.669 1.626 1.583 1.543 1.503 1.465 1.427 1.391 1.356 1.321 TYP. 3.117 3.029 2.948 2.861 2.781 2.703 2.629 2.556 2.486 2.418 2.352 2.288 2.226 2.167 2.109 2.053 1.999 1.947 1.896 1.847 1.800 1.753 1.709 1.666 1.624 1.583 1.543 1.505 1.467 MAX. 3.395 3.300 3.208 3.119 3.033 2.950 2.869 2.791 2.716 2.643 2.572 2.503 2.436 2.372 2.310 2.249 2.190 2.133 2.078 2.025 1.973 1.923 1.874 1.828 1.782 1.738 1.695 1.653 1.613
Rev. 2002
15.3 Socket Boards
Double-side Socket Board Single-side Socket Board socket boards supplied help customers easily test SPM. Boards composed socket additional required components mounted PCB. connect your existing designed board that contains power control parts.
Double-side Board
Single-side Board
Applicable Heat Sink
Enable Supply Whenever Want
Rev. 2002
Double-Side Board Pattern
123mm
85mm Side Pattern Silk
View Bottom Side Pattern Silk
Part List
Symbol CSP15 CSP05 CFOD CSPC15 CBPF CBSC CDCS Rating 470µF, 100µF, 33nF, 470pF, 1/10W 3.9k, 1/10W 1nF, 4.7k, 1/10W 100nF, 100, 1/10W 22k, 1/10W 1nF, 1.2nF, 100nF, 1/4W 600V 220µF, 220nF, 630V Characteristics Electrolytic Capacitor Electrolytic Capacitor Ceramic Capacitor Ceramic Capacitor Chip Resistor (10%) Chip Resistor (10%) Ceramic Capacitor Chip Resistor (10%) Ceramic Capacitor Chip Resistor (10%) Chip Resistor (10%) Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Fast Recovery Diode, (1N4937) Electrolytic Capacitor Film Capacitor Definition +15V Bias Voltage Source Capacitor Bias Voltage Source Capacitor Capacitor Selection Fault Duration Side Pull-Up Capacitor Current Sensing Resistor Low-Pass-Filter Current Sensing Low-Pass-Filter Current Sensing Pull-Up Resistor +15V Bypass Capacitor Series Resistor Signal Interface Series Resistor Temperature Monitoring Bypass Pull-Up Capacitor Fault-Out Signal High-Side Pull-Up Capacitor Bypass Capacitor Bootstrap Supply Bootstrap Resistor Bootstrap Diode Bootstrap Capacitor Snubber Capacitor Suppress SpikeVoltage
Rev. 2002
Double-Side Board User's Guide
Signal Connection Terminals
Fault-Out signal Connection Low-Side Input Connection from High-Side Input Connection from Temperature Detecting Connection
Heat Sink Location
Bootstrap Components
Electrolytic Capacitor Bias Supply
DC-Link Film Capacitor
Bias Supply (15V Terminals
DC-Link Input Connection Motor Input Connection
Power Connection Terminals
Rev. 2002
Single-Side Board Pattern
123mm View 91mm
Part List
Symbol CSP15 CSP05 CFOD CSPC15 CBPF CBSC CDCS JUMPER Rating 470µF, 100µF, 33nF, 470pF, 1/10W 3.9k, 1/10W 1nF, 4.7k, 1/4W 100nF, 100, 1/10W 22k, 1/10W 1nF, 1.2nF, 100nF, 1/4W 600V 220µF, 220nF, 630V 1/4W Characteristics Electrolytic Capacitor Electrolytic Capacitor Ceramic Capacitor Ceramic Capacitor Chip Resistor (10%) Chip Resistor (10%) Ceramic Capacitor Resistor (5%) Ceramic Capacitor Chip Resistor (10%) Chip Resistor (10%) Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Chip Resistor (10%) Fast Recovery Diode, (1N4937) Electrolytic Capacitor Film Capacitor Chip Resistor Definition +15V Bias Voltage Source Capacitor Bias Voltage Source Capacitor Capacitor Selection Fault Duration Side Pull-Up Capacitor Current Sensing Resistor Low-Pass-Filter Current Sensing Low-Pass-Filter Current Sensing Pull-Up Resistor +15V Bypass Capacitor Series Resistor Signal Interface Series Resistor Temperature Monitoring Bypass Pull-Up Capacitor Fault-Out Signal High-Side Pull-Up Capacitor Bypass Capacitor Bootstrap Supply Bootstrap Resistor Bootstrap Diode Bootstrap Capacitor Snubber Capacitor Suppress SpikeVoltage High-Side Single Connection
Rev. 2002
Single-Side Board User's Guide
Signal Connection Terminals
Fault-Out signal Connection Low-Side Input Connection from High-Side Input Connection from Temperature Detecting Connection
Heat Sink Location
Bootstrap Components
Electrolytic Capacitor Bias Supply
DC-Link Film Capacitor
Bias Supply (15V Terminals
DC-Link Input Connection Motor Input Connection
Power Connection Terminals
Rev. 2002
Operation Example Experimental Condition Supply Voltage DC-Link Supply Voltage (between Varied Input Voltage Series Resistor (Built Board) (For details, Fig. User's Guide) Applied Heat Sink Shown Cover Page (Natural Convection Condition) Load Induction Motor Washing Machine Used Device FPAL15SH60 Switching Frequency 15kHz
Experimental Results Detected Thermistor voltage Heat Sink Temperature
AC220V Input Condition
AC264V Input Condition
Heat Temp.(
Heat sink Temperature
Heat sink Temperature
AC220V Input Condition
DC-Link Voltage 100V/Div 100V/Div
AC264V Input Condition
DC-Link Voltage
2A/Div Output Load Current
2A/Div Output Load Current
2A/Div
Time (500ms/Div)
Time (500ms/Div)
Rev. 2002
Themistor olts.(V
Themistor Voltage
Themistor Voltage
15.4. Interface Methods
Interface Methods between Comparisons Method Direct Interface
Bootstrap Circuit
single-grounded power supply used. bootstrap circuit required. control program initial charge bootstrap capacitors required. required dead-time inverter-operation 3µs. overall power circuit design simplest. overall manufacturing cost lowest.
Rev. 2002
Method Interface using Opto-couplers with Isolated Power Supplies
Opto-couplers
Power Supply
Power Supply
Bootstrap Circuit
isolated power supplies used. part operation other part operation. bootstrap circuit required. control program initial charge bootstrap capacitors required. Required dead-time inverter operation depends performance opto-couplers used. (for example: case using TLP521, recommended dead-time >10µs)
Rev. 2002
Method Interface using Opto-couplers with Five Isolated Power Supplies
Opto-couplers
15V_4
15V_2
15V_3
Power Supply
Power Supply Power Supply
Power Supply
15V_1
Power Supply
High-side bias supplies Five isolated power supplies used. part operation others part operation. Basically, high-side part needs three isolated power supplies lowside part have independent power supply. Required dead-time inverter operation depends performance opto-couplers used. (for example: case using TLP521, recommended dead-time >10µs)
Rev. 2002
Comparison Others Method Manufacturing Time Supply Voltage Stability Size (Related Components Only) Control DeadTime Propagation Delay-Time Fast Opto-coupler Slow Opto-coupler Excellent Excellent 100% Second Typically Second Typically Method Good Good 115% Second Second Method Good Good 130% Second Second
Rev. 2002
TRADEMARKS
following registered unregistered trademarks Fairchild Semiconductor owns authorized intended exhaustive list such trademarks.
ACEx Bottomless CoolFET CROSSVOLT DenseTrench DOME EcoSPARK E2CMOSEnSignaFACT FACT Quiet Series
DISCLAIMER
FAST FASTr FRFET GlobalOptoisolator HiSeC ISOPLANAR LittleFET MicroFET MicroPak
MICROWIRE OPTOLOGIC OPTOPLANAR PACMAN Power247 PowerTrench QFET Optoelectronics Quiet Series
SILENT SWITCHER SMART START UltraFET STAR*POWER Stealth SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET TinyLogic TruTranslation
STAR*POWER used under license
FAIRCHILD SEMICONDUCTOR RESERVES RIGHT MAKE CHANGES WITHOUT FURTHER NOTICE PRODUCTS HEREIN IMPROVE RELIABILITY, FUNCTION DESIGN. FAIRCHILD DOES ASSUME LIABILITY ARISING APPLICATION PRODUCT CIRCUIT DESCRIBED HEREIN; NEITHER DOES CONVEY LICENSE UNDER PATENT RIGHTS, RIGHTS OTHERS.
LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL FAIRCHILD SEMICONDUCTOR CORPORATION. used herein: critical component component life Life support devices systems devices support device system whose failure perform systems which, intended surgical implant into reasonably expected cause failure life body, support sustain life, whose support device system, affect safety failure perform when properly used accordance with instructions provided labeling, effectiveness. reasonably expected result significant injury user. PRODUCT STATUS DEFINITIONS Definition Terms Datasheet Identification Advance Information Product Status Formative Design First Production Definition This datasheet contains design specifications product development. Specifications change manner without notice. This datasheet contains preliminary data, supplementary data will published later date. Fairchild Semiconductor reserves right make changes time without notice order improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves right make changes time without notice order improve design. This datasheet contains specifications product that been discontinued Fairchild semiconductor. datasheet printed reference information only.
Preliminary
Identification Needed
Full Production
Obsolete
Production
Rev.
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