Compaq Intel Microsoft Revision September 1998 Universal Ser
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Universal Serial Specification
Compaq Intel Microsoft
Revision September 1998
Universal Serial Specification Revision
Scope this Revision revision specification intended product design. Every attempt been made ensure consistent implementable specification. Implementations should ensure compliance with this revision.
Revision History Revision
0.99
Issue Date
November 1994 December 1994 April 1995 August 1995 November 1995 January 1996 September 1998 Supersedes 0.6e.
Comments
Revisions Chapters 3-8, Added appendixes. Revisions chapters. Revisions chapters. Revisions Chapters 5-11. Edits Chapters consistency. Updates chapters problems identified.
Universal Serial Specification Copyright 1998, Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, Corporation. rights reserved. INTELLECTUAL PROPERTY DISCLAIMER THIS SPECIFICATION PROVIDED WITH WARRANTIES WHATSOEVER INCLUDING WARRANTY MERCHANTABILITY, FITNESS PARTICULAR PURPOSE, WARRANTY OTHERWISE ARISING PROPOSAL, SPECIFICATION, SAMPLE. LICENSE HEREBY GRANTED REPRODUCE DISTRIBUTE THIS SPECIFICATION INTERNAL ONLY. OTHER LICENSE, EXPRESS IMPLIED, ESTOPPEL OTHERWISE, OTHER INTELLECTUAL PROPERTY RIGHTS GRANTED INTENDED HEREBY. AUTHORS THIS SPECIFICATION DISCLAIM LIABILITY, INCLUDING LIABILITY INFRINGEMENT PROPRIETARY RIGHTS, RELATING IMPLEMENTATION INFORMATION THIS SPECIFICATION. AUTHORS THIS SPECIFICATION ALSO WARRANT REPRESENT THAT SUCH IMPLEMENTATION(S) WILL INFRINGE SUCH RIGHTS.
GeoPort Apple Desktop trademarks Apple Computer, Inc. Windows Windows trademarks Microsoft Win32 registered trademarks Microsoft Corporation. IBM, PS/2, Micro Channel registered trademarks International Business Machines Corporation. AT&T registered trademark American Telephone Telegraph Company. Compaq registered trademark Compaq Computer Corporation. UNIX registered trademark UNIX System Laboratories. trademark Phillips Semiconductors. trademark Digital Equipment Corporation. other product names trademarks, registered trademarks, servicemarks their respective owners. Please send comments electronic mail techsup@usb.org industry information, refer Implementers Forum page http://www.usb.org
Universal Serial Specification Revision
Contents
CHAPTER INTRODUCTION
Motivation Objective Specification Scope Document Document Organization.
CHAPTER TERMS ABBREVIATIONS CHAPTER BACKGROUND.
Goals Universal Serial Taxonomy Application Space. Feature List
CHAPTER ARCHITECTURAL OVERVIEW
System Description 4.1.1 Topology Physical Interface 4.2.1 Electrical 4.2.2 Mechanical Power 4.3.1 Power Distribution 4.3.2 Power Management.18 Protocol
Robustness.19 4.5.1 Error Detection.19 4.5.2 Error Handling.19 System Configuration.19 4.6.1 Attachment Devices 4.6.2 Removal Devices.20 4.6.3 Enumeration Data Flow Types 4.7.1 Control Transfers.20
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4.7.2 4.7.3 4.7.4 4.7.5
Bulk Transfers.20 Interrupt Transfers.21 Isochronous Transfers Allocating Bandwidth.21
Devices 4.8.1 Device Characterizations.21 4.8.2 Device Descriptions Host: Hardware Software.24
4.10 Architectural Extensions
CHAPTER DATA FLOW MODEL.
Implementer Viewpoints.25
Topology 5.2.1 Host 5.2.2 Devices 5.2.3 Physical Topology.29 5.2.4 Logical Topology.30 5.2.5 Client Software-to-function Relationship.30 Communication Flow 5.3.1 Device Endpoints 5.3.2 Pipes.33 Transfer Types.35
Control Transfers 5.5.1 Control Transfer Data Format 5.5.2 Control Transfer Direction 5.5.3 Control Transfer Packet Size Constraints.37 5.5.4 Control Transfer Access Constraints.38 5.5.5 Control Transfer Data Sequences.40 Isochronous Transfers 5.6.1 Isochronous Transfer Data Format.41 5.6.2 Isochronous Transfer Direction.41 5.6.3 Isochronous Transfer Packet Size Constraints 5.6.4 Isochronous Transfer Access Constraints 5.6.5 Isochronous Transfer Data Sequences.43 Interrupt Transfers 5.7.1 Interrupt Transfer Data Format 5.7.2 Interrupt Transfer Direction 5.7.3 Interrupt Transfer Packet Size Constraints.43 5.7.4 Interrupt Transfer Access Constraints.44 5.7.5 Interrupt Transfer Data Sequences Bulk Transfers 5.8.1 Bulk Transfer Data Format 5.8.2 Bulk Transfer Direction 5.8.3 Bulk Transfer Packet Size Constraints
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5.8.4 5.8.5
Bulk Transfer Access Constraints Bulk Transfer Data Sequences
Access Transfers.49 5.9.1 Transfer Management.49 5.9.2 Transaction Tracking.52 5.9.3 Calculating Transaction Times.54 5.9.4 Calculating Buffer Sizes Functions Software.55 5.9.5 Bandwidth Reclamation 5.10 Special Considerations Isochronous Transfers.55 5.10.1 Example Non-USB Isochronous Application.56 5.10.2 Clock Model 5.10.3 Clock Synchronization 5.10.4 Isochronous Devices.61 5.10.5 Data Prebuffering 5.10.6 Tracking 5.10.7 Error Handling.70 5.10.8 Buffering Rate Matching
CHAPTER MECHANICAL.
Architectural Overview.73 Keyed Connector Protocol.73 Cable.74
Cable Assembly.74 6.4.1 Detachable Cable Assemblies 6.4.2 Full-speed Captive Cable Assemblies 6.4.3 Low-speed Captive Cable Assemblies 6.4.4 Prohibited Cable Assemblies.80 Connector Mechanical Configuration Material Requirements 6.5.1 Icon Location.81 6.5.2 Connector Termination Data 6.5.3 Series Series Receptacles 6.5.4 Series Series Plugs Cable Mechanical Configuration Material Requirements 6.6.1 Description 6.6.2 Construction 6.6.3 Electrical Characteristics 6.6.4 Cable Environmental Characteristics 6.6.5 Listing Electrical, Mechanical Environmental Compliance Standards 6.7.1 Applicable Documents .102 Grounding .102 Reference Drawings.102
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CHAPTER ELECTRICAL.
Signaling. .107 7.1.1 Driver Characteristics .107 7.1.2 Data Signal Rise Fall .110 7.1.3 Cable Skew.112 7.1.4 Receiver Characteristics.112 7.1.5 Device Speed Identification .113 7.1.6 Input Characteristics.114 7.1.7 Signaling Levels.115 7.1.8 Data Encoding/Decoding .123 7.1.9 Stuffing.124 7.1.10 Sync Pattern .126 7.1.11 Data Signaling Rate.126 7.1.12 Frame Interval Frame Interval Adjustment .126 7.1.13 Data Source Signaling.127 7.1.14 Signaling Timings .128 7.1.15 Receiver Data Jitter .130 7.1.16 Cable Delay.132 7.1.17 Cable Attenuation.133 7.1.18 Turn-around Time Inter-packet Delay.133 7.1.19 Maximum End-to-end Signal Delay.133 Power Distribution .134 7.2.1 Classes Devices.134 7.2.2 Voltage Drop Budget .138 7.2.3 Power Control During Suspend/Resume.139 7.2.4 Dynamic Attach Detach.140 Physical Layer .141 7.3.1 Regulatory Requirements.142 7.3.2 Timing/Electrical Characteristics.142 7.3.3 Timing Waveforms .151
CHAPTER PROTOCOL LAYER
Ordering. .155 SYNC Field .155
Packet Field Formats .155 8.3.1 Packet Identifier Field .155 8.3.2 Address Fields. .156 8.3.3 Frame Number Field .157 8.3.4 Data Field .157 8.3.5 Cyclic Redundancy Checks.158 Packet Formats .158 8.4.1 Token Packets .159 8.4.2 Start-of-Frame Packets.159 8.4.3 Data Packets .160 8.4.4 Handshake Packets.160 8.4.5 Handshake Responses .161
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Transaction Formats .162 8.5.1 Bulk Transactions.163 8.5.2 Control Transfers.164 8.5.3 Interrupt Transactions.167 8.5.4 Isochronous Transactions .168 Data Toggle Synchronization Retry .168 8.6.1 Initialization SETUP Token .169 8.6.2 Successful Data Transactions .169 8.6.3 Data Corrupted Accepted.170 8.6.4 Corrupted Handshake.170 8.6.5 Low-speed Transactions.171 Error Detection Recovery.172 8.7.1 Packet Error Categories.172 8.7.2 Turn-around Timing.172 8.7.3 False EOPs .173 8.7.4 Babble Loss Activity Recovery.174
CHAPTER DEVICE FRAMEWORK
Device States. .175 9.1.1 Visible Device States. .175 9.1.2 Enumeration .179 Generic Device Operations .180 9.2.1 Dynamic Attachment Removal.180 9.2.2 Address Assignment.180 9.2.3 Configuration .180 9.2.4 Data Transfer.181 9.2.5 Power Management.181 9.2.6 Request Processing.181 9.2.7 Request Error.182 Device Requests.183 9.3.1 bmRequestType.183 9.3.2 bRequest .184 9.3.3 wValue .184 9.3.4 wIndex.184 9.3.5 wLength.184 Standard Device Requests.185 9.4.1 Clear Feature .188 9.4.2 Configuration.189 9.4.3 Descriptor .189 9.4.4 Interface.190 9.4.5 Status .190 9.4.6 Address.192 9.4.7 Configuration .193 9.4.8 Descriptor.193 9.4.9 Feature.194 9.4.10 Interface.195 9.4.11 Synch Frame.195 Descriptors .196
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Standard Descriptor Definitions.196 9.6.1 Device .196 9.6.2 Configuration .199 9.6.3 Interface .201 9.6.4 Endpoint .203 9.6.5 String.204 Device Class Definitions .205 9.7.1 Descriptors .205 9.7.2 Interface(s) Endpoint Usage .205 9.7.3 Requests .206
CHAPTER HOST: HARDWARE SOFTWARE
10.1 Overview Host .207 10.1.1 Overview.207 10.1.2 Control Mechanisms .210 10.1.3 Data Flow.210 10.1.4 Collecting Status Activity Statistics .211 10.1.5 Electrical Interface Considerations .211 10.2 Host Controller Requirements .211 10.2.1 State Handling.212 10.2.2 Serializer/Deserializer .212 10.2.3 Frame Generation.212 10.2.4 Data Processing.213 10.2.5 Protocol Engine.213 10.2.6 Transmission Error Handling .213 10.2.7 Remote Wakeup .214 10.2.8 Root .214 10.2.9 Host System Interface .214 10.3 Overview Software Mechanisms.214 10.3.1 Device Configuration .215 10.3.2 Resource Management .217 10.3.3 Data Transfers .217 10.3.4 Common Data Definitions .218 10.4 Host Controller Driver.218 10.5 Universal Serial Driver.219 10.5.1 USBD Overview .219 10.5.2 USBD Command Mechanism Requirements.221 10.5.3 USBD Pipe Mechanisms.223 10.5.4 Managing USBD Mechanisms.225 10.5.5 Passing Preboot Control Operating System.227 10.6 Operating System Environment Guides.227
CHAPTER SPECIFICATION
11.1 Overview .229 11.1.1 Architecture. .230 11.1.2 Connectivity .230
viii
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11.2 Frame Timer.232 11.2.1 Frame Timer Synchronization.233 11.2.2 EOF1 EOF2 Timing Points .234 11.3 Host Behavior End-of-Frame .235 11.3.1 Latest Host Packet .235 11.3.2 Packet Nullification.235 11.3.3 Transaction Completion Prediction.236 11.4 Internal Port .237 11.4.1 Inactive .237 11.4.2 Suspend Delay.237 11.4.3 Full Suspend (Fsus) .237 11.4.4 Generate Resume (GResume) .238 11.5 Downstream Ports .239 11.5.1 Downstream Port State Descriptions.240 11.5.2 Disconnect Detect Timer.243 11.6 Upstream Port.244 11.6.1 Receiver.244 11.6.2 Transmitter .246 11.7 Repeater.249 11.7.1 Wait Start Packet from Upstream Port (WFSOPFU) .250 11.7.2 Wait Packet from Upstream Port (WFEOPFU) .250 11.7.3 Wait Start Packet (WFSOP) .251 11.7.4 Wait Packet (WFEOP) .251 11.8 State Evaluation .251 11.8.1 Port Error.251 11.8.2 Speed Detection.251 11.8.3 Collision .252 11.8.4 Full- versus Low-speed Behavior.252 11.9 Suspend Resume.253 11.10 Reset Behavior.254 11.10.1 Receiving Reset Upstream Port .254 11.11 Port Power Control.255 11.11.1 Multiple Gangs.255 11.12 Buffer Requirements.256 11.12.1 Pull-up Pull-down Resistors .256 11.12.2 Edge Rate Control .256 11.13 Controller .256 11.13.1 Endpoint Organization .257 11.13.2 Information Architecture Operation.257 11.13.3 Port Change Information Processing.259 11.13.4 Port Status Change Bitmap .259 11.13.5 Over-current Reporting Recovery .260 11.14 Configuration .261
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11.15 Descriptors .263 11.15.1 Standard Descriptors .263 11.15.2 Class-specific Descriptors .264 11.16 Requests.266 11.16.1 Standard Requests .266 11.16.2 Class-specific Requests .267
INDEX.
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Figures
Figure 3-1. Application Space Taxonomy Figure 4-1. Topology.16 Figure 4-2. Cable.17 Figure 4-3. Typical Hub.22 Figure 4-4. Hubs Desktop Computer Environment Figure 5-1. Simple Host/Device View Figure 5-2. Implementation Areas Figure 5-3. Host Composition Figure 5-4. Physical Device Composition Figure 5-5. Physical Topology.29 Figure 5-6. Logical Topology Figure 5-7. Client Software-to-function Relationships.30 Figure 5-8. Host/Device Detailed View Figure 5-9. Communication Flow Figure 5-10. Information Conversion From Client Software Bus.50 Figure 5-11. Transfers Communication Flows.52 Figure 5-12. Arrangement IRPs Transactions/Frames Figure 5-13. Non-USB Isochronous Example Figure 5-14. Isochronous Application.60 Figure 5-15. Example Source/Sink Connectivity Figure 5-16. Data Prebuffering Figure 5-17. Packet Buffer Size Formulas Rate-Matched Isochronous Transfers.72 Figure 6-1. Keyed Connector Protocol Figure 6-2. Detachable Cable Assembly.75 Figure 6-3. Full-speed Hardwired Cable Assembly Figure 6-4. Low-speed Hardwired Cable Assembly Figure 6-5. Icon.81 Figure 6-6. Typical Plug Orientation Figure 6-7. Series Receptacle Interface Mating Drawing Figure 6-8. Series Recptacle Interface Mating Drawing Figure 6-9. Series Plug Interface Drawing.87 Figure 6-10. Series Plug Interface Drawing.88 Figure 6-11. Typical Full-speed Cable Construction.90 Figure 6-12. Single Pin-Type Series Receptacle .103
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Figure 6-13. Dual Pin-Type Series Receptacle.104 Figure 6-14. Single Pin-Type Series Receptacle .105 Figure 7-1. Maximum Input Waveforms Signaling .107 Figure 7-2. Example Full-speed CMOS Driver Circuit.108 Figure 7-3. Full-speed Buffer Characteristics .109 Figure 7-4. Full-speed Signal Waveforms.110 Figure 7-5. Low-speed Driver Signal Waveforms.110 Figure 7-6. Data Signal Rise Fall Time .111 Figure 7-7. Full-speed Load .111 Figure 7-8. Low-speed Port Loads .112 Figure 7-9. Differential Input Sensitivity Range .113 Figure 7-10. Full-speed Device Cable Resistor Connections.113 Figure 7-11. Low-speed Device Cable Resistor Connections.114 Figure 7-12. Placement Optional Edge Rate Control Capacitors .115 Figure 7-13. Upstream Full-speed Port Transceiver.117 Figure 7-14. Downstream Port Transceiver.117 Figure 7-15. Disconnect Detection .118 Figure 7-16. Full-speed Device Connect Detection.118 Figure 7-17. Low-speed Device Connect Detection.119 Figure 7-18. State Evaluation after reset (optional).119 Figure 7-19. Power-on Connection Events Timing .120 Figure 7-20. Packet Voltage Levels.121 Figure 7-21. NRZI Data Encoding .124 Figure 7-22. Stuffing .124 Figure 7-23. Illustration Extra Preceding EOP.125 Figure 7-24. Flow Diagram Stuffing.125 Figure 7-25. Sync Pattern .126 Figure 7-26. Data Jitter Taxonomy.127 Figure 7-27. Width Timing .128 Figure 7-28. Propagation Delay Full-speed Differential Signals.129 Figure 7-29. Full-speed Cable Delay.132 Figure 7-30. Low-speed Cable Delay .132 Figure 7-31. Worst-case Signal Delay Model.134 Figure 7-32. Compound Bus-powered Hub.135 Figure 7-33. Compound Self-powered .136 Figure 7-34. Low-power Bus-powered Function.137 Figure 7-35. High-power Bus-powered Function.137 Figure 7-36. Self-powered Function.138
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Figure 7-37. Worst-case Voltage Drop Topology (Steady State) .138 Figure 7-38. Typical Suspend Current Averaging Profile .139 Figure 7-39. Differential Data Jitter.151 Figure 7-40. Differential-to-EOP Transition Skew Width .151 Figure 7-41. Receiver Jitter Tolerance.151 Figure 7-42. Differential Delay, Differential Jitter, Distortion .152 Figure 7-43. Delay Skew.153 Figure 8-1. Format.155 Figure 8-2. ADDR Field .157 Figure 8-3. Endpoint Field.157 Figure 8-4. Data Field Format .157 Figure 8-5. Token Format.159 Figure 8-6. Packet.159 Figure 8-7. Data Packet Format.160 Figure 8-8. Handshake Packet .160 Figure 8-9. Bulk Transaction Format.163 Figure 8-10. Bulk Reads Writes.164 Figure 8-11. Control SETUP Transaction .164 Figure 8-12. Control Read Write Sequences.165 Figure 8-13. Interrupt Transaction Format .167 Figure 8-14. Isochronous Transaction Format.168 Figure 8-15. SETUP Initialization .169 Figure 8-16. Consecutive Transactions.169 Figure 8-17. NAKed Transaction with Retry.170 Figure 8-18. Corrupted Handshake with Retry .170 Figure 8-19. Low-speed Transaction .171 Figure 8-20. Turn-around Timer Usage.173 Figure 9-1. Device State Diagram .176 Figure 9-2. wIndex Format when Specifying Endpoint .184 Figure 9-3. wIndex Format when Specifying Interface .184 Figure 9-4. Information Returned GetStatus() Request Device .191 Figure 9-5. Information Returned GetStatus() Request Interface .191 Figure 9-6. Information Returned GetStatus() Request Endpoint .192 Figure 10-1. Interlayer Communications Model.207 Figure 10-2. Host Communications.208 Figure 10-3. Frame Creation.212 Figure 10-4. Configuration Interactions .215 Figure 10-5. Universal Serial Driver Structure.219 xiii
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Figure 11-1. Architecture.230 Figure 11-2. Signaling Connectivity.231 Figure 11-3. Resume Connectivity .232 Figure 11-4. Timing Points .234 Figure 11-5. Internal Port State Machine.237 Figure 11-6. Downstream Port State Machine.239 Figure 11-7. Upstream Port Receiver State Machine .244 Figure 11-8. Upstream Port Transmitter State Machine .246 Figure 11-9. Repeater State Machine.249 Figure 11-10. Example Remote-Wakeup Resume Signaling .254 Figure 11-11. Example Controller Organization .257 Figure 11-12. Relationship Status, Status Change, Control Information Device States.258 Figure 11-13. Port Status Handling Method .259 Figure 11-14. Port Status Change Bitmap.260 Figure 11-15. Example Port Change Sampling .260
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Tables
Table 5-1. Full-speed Control Transfer Limits Table 5-2. Low-speed Control Transfer Limits Table 5-3. Isochronous Transaction Limits Table 5-4. Full-speed Interrupt Transaction Limits Table 5-5. Low-speed Interrupt Transaction Limits Table 5-6. Bulk Transaction Limits Table 5-7. Synchronization Characteristics Table 5-8. Connection Requirements Table 6-1. Connector Termination Assignment Table 6-2. Power Pair Table 6-3. Signal Pair Table 6-4. Drain Wire Signal Pair Table 6-5. Nominal Cable Diameter.93 Table 6-6. Conductor Resistance Table 6-7. Electrical, Mechnaical Environmental Compliance Standards Table 7-1. Signaling Levels .116 Table 7-2. Full-speed Jitter Budget.131 Table 7-3. Low-speed Jitter Budget.131 Table 7-4. Signal Attenuation.133 Table 7-5. Electrical Characteristics.142 Table 7-6. Full-speed Source Electrical Characteristics .144 Table 7-7. Low-speed Source Electrical Characteristics .145 Table 7-8. Hub/Repeater Electrical Characteristics .146 Table 7-9. Cable Characteristics (Note 14).147 Table 7-10. Event Timings .148 Table 7-11. Device Event Timings .149 Table 8-1. Types.156 Table 8-2. Function Responses Transactions .161 Table 8-3. Host Responses Transactions .162 Table 8-4. Function Responses Transactions Order Precedence.162 Table 8-5. Status Stage Responses.166 Table 8-6. Packet Error Types .172 Table 9-1. Visible Device States.177 Table 9-2. Format Setup Data .183
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Table 9-3. Standard Device Requests .186 Table 9-4. Standard Request Codes.187 Table 9-5. Descriptor Types .187 Table 9-6. Standard Feature Selectors .188 Table 9-7. Standard Device Descriptor.197 Table 9-8. Standard Configuration Descriptor .199 Table 9-9. Standard Interface Descriptor.202 Table 9-10. Standard Endpoint Descriptor .203 Table 9-11. Codes Representing Languages Supported Device .205 Table 9-12. UNICODE String Descriptor .205 Table 11-1. Host Timing Points.235 Table 11-2. Internal Port Signal/Event Definitions .237 Table 11-3. Downstream Port Signal/Event Definitions.240 Table 11-4. Upstream Port Receiver Signal/Event Definitions .245 Table 11-5. Upstream Port Transmit Signal/Event Definitions .247 Table 11-6. Repeater Signal/Event Definitions .250 Table 11-7. Power Operating Mode Summary .261 Table 11-8. Descriptor .264 Table 11-9. Responses Standard Device Requests .266 Table 11-10. Class Requests .267 Table 11-11. Class Request Codes.268 Table 11-12. Class Feature Selectors.268 Table 11-13. Status Field, wHubStatus.272 Table 11-14. Change Field, wHubChange.272 Table 11-15. Port Status Field, wPortStatus.274 Table 11-16. Port Change Field, wPortChange.277
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Chapter Introduction
Motivation
motivation Universal Serial (USB) comes from three interrelated considerations:
Connection telephone well understood that merge computing communication will basis next generation productivity applications. movement machine-oriented human-oriented data types from location environment another depends ubiquitous cheap connectivity. Unfortunately, computing communication industries have evolved independently. provides ubiquitous link that used across wide range PC-to-telephone interconnects. Ease-of-use lack flexibility reconfiguring been acknowledged Achilles' heel further deployment. combination user-friendly graphical interfaces hardware software mechanisms associated with new-generation architectures have made computers less confrontational easier reconfigure. However, from user's point view, PC's interfaces, such serial/parallel ports, keyboard/mouse/joystick interfaces, etc., have attributes plug-and-play. Port expansion addition external peripherals continues constrained port availability. lack bidirectional, low-cost, low-to-mid speed peripheral held back creative proliferation peripherals such telephone/fax/modem adapters, answering machines, scanners, PDA's, keyboards, mice, etc. Existing interconnects optimized point products. each function capability added interface been defined address this need. answer connectivity architecture. fast, bi-directional, isochronous, low-cost, dynamically attachable serial interface that consistent with requirements platform today tomorrow.
Objective Specification
This document defines industry-standard USB. specification describes attributes, protocol definition, types transactions, management, programming interface required design build systems peripherals that compliant with this standard. goal enable such devices from different vendors interoperate open architecture. specification intended enhancement architecture, spanning portable, business desktop, home environments. intended that specification allow system OEMs peripheral developers adequate room product versatility market differentiation without burden carrying obsolete interfaces losing compatibility.
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Scope Document
Target audience specification primarily targeted peripheral developers system OEMs, provides valuable information platform operating system/ BIOS/ device driver, adapter IHVs/ISVs, platform/adapter controller vendors. Benefit This version Specification used planning products, engineering early prototype, preliminary software development. final products required compliant with Specification 1.1.
Document Organization
Chapters through provide overview readers, while Chapters through contain detailed technical information defining USB.
Peripheral implementers should particularly read Chapters through Host Controller implementers should particularly read Chapters through device driver implementers should particularly read Chapters
This document complemented referenced Universal Serial Device Class Specifications. Device class specifications exist wide variety devices. Please contact Implementers Forum further details. Readers also requested contact operating system vendors operating system bindings specific USB.
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Chapter Terms Abbreviations
This chapter lists defines terms abbreviations used throughout this specification.
Active Device Asynchronous Data Asynchronous
Handshake packet indicating positive acknowledgment. device that powered Suspend state. Data transferred irregular intervals with relaxed latency requirements. incoming data rate, Fsi, outgoing data rate, Fso, process independent (i.e., there shared master clock). also Rate Adaptation. incoming sample rate, Fsi, outgoing sample rate, Fso, process independent (i.e., there shared master clock). also Sample Rate Conversion. device that sources sinks sampled analog data. measurement wire's cross section, defined American Wire Gauge standard. Unexpected activity that persists beyond specified point frame. amount data transmitted unit time, typically bits second (b/s) bytes second (B/s). method storing data that places most significant byte multiple-byte values lower storage addresses. example, 16-bit integer stored endian format places least significant byte higher address most significant byte lower address. also Little Endian. unit information used digital computers. Represents smallest piece addressable memory within computer. expresses choice between possibilities typically represented logical zero (0). Insertion into data stream cause electrical transition data wires, allowing remain locked. Transmission rate expressed bits second. Transmission rate expressed bytes second. Storage used compensate difference data rates time occurrence events, when transmitting data from device another. four transfer types. Bulk transfers non-periodic, large bursty communication typically used transfer that available bandwidth also delayed until bandwidth available. also Transfer Type. Detecting identifying devices.
Asynchronous
Audio Device AWG# Babble Bandwidth Endian
Stuffing Buffer Bulk Transfer
Enumeration
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Byte Capabilities Characteristics Client
data element that eight bits size. Those attributes device that administrated host. Those qualities device that unchangeable; example, device class device characteristic. Software resident host that interacts with System Software arrange data transfer between function host. client often data provider consumer transferred data. Software resident host software that responsible configuring device. This system configurator software specific device. pair device endpoints with same endpoint number that used control pipe. Control endpoints transfer data both directions therefore both endpoint directions device address endpoint number combination. Thus, each control endpoint consumes endpoint addresses. Same message pipe. four transfer types. Control transfers support configuration/command/status type communications between client function. also Transfer Type. Cyclic Redundancy Check. Computer Telephony Integration. check performed data error occurred transmitting, reading, writing data. result typically stored transmitted with checked data. stored transmitted result compared calculated data determine error occurred. address defined Specification used device when first powered reset. default address 00H. message pipe created System Software pass control status information between host device's endpoint zero. logical physical entity that performs function. actual entity described depends context reference. lowest level, device refer single hardware component, memory device. higher level, refer collection hardware components that perform particular function, such interface device. even higher level, device refer function performed entity attached USB; example, data/FAX modem device. Devices physical, electrical, addressable, logical. When used non-specific reference, device either function.
Configuring Software Control Endpoint
Control Pipe Control Transfer
Cyclic Redundancy Check (CRC)
Default Address Default Pipe Device
Device Address
seven-bit value representing address device USB. device address default address (00H) when device first powered device reset. Devices assigned unique device address System Software.
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Device Endpoint
uniquely addressable portion device that source sink information communication flow between host device. also Endpoint Address. Resources provided devices, such buffer space endpoints. also Host Resources Universal Serial Resources. Software that responsible using device. This software also responsible configuring device use. direction data flow from host away from host. downstream port port electrically farthest from host that generates downstream data traffic from hub. Downstream ports receive upstream data traffic. When referring hardware, that drives external load. When referring software, program responsible interfacing hardware device; that device driver. Double word. data element that words (i.e., four bytes bits) size. ability attach remove devices while host operation. Electrically Erasable Programmable Read Only Memory. Electrically Erasable Programmable Read Only Memory. Non-volatile rewritable memory storage technology.
Device Resources Device Software Downstream
Driver
DWORD Dynamic Insertion Removal PROM EEPROM Electrically Erasable Programmable Read Only Memory (EEPROM) User Endpoint Endpoint Address Endpoint Direction Endpoint Number External Port False Frame
user host. Device Endpoint. combination endpoint number endpoint direction device. Each endpoint address supports data transfer direction. direction data transfer USB. direction either OUT. refers transfers host; refers transfers from host. four-bit value between inclusive, associated with endpoint device. End-of-Frame. End-of-Packet. Port. spurious, usually noise-induced event that interpreted packet receiver EOP. time from start token start subsequent token; consists series transactions.
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Frame Pattern
sequence frames that exhibit repeating pattern number samples transmitted frame. 44.1kHz audio transfer, frame pattern could nine frames containing samples followed frame containing samples. Sample Rate. Computer data transmission occurring both directions simultaneously. device that provides capability host, such ISDN connection, digital microphone, speakers. packet that acknowledges rejects specific condition. examples, NAK. host computer system where Host Controller installed. This includes host hardware platform (CPU, bus, etc.) operating system use. host's interface. software layer that abstracts Host Controller hardware. Host Controller Driver provides interaction with Host Controller. Host Controller Driver hides specifics Host Controller hardware implementation. Resources provided host, such buffer space interrupts. also Device Resources Universal Serial Resources. device that provides additional connections USB. level connect within network topology, given number hubs through which data flow. hardware signal that allows device request attention from host. host typically invokes interrupt service routine handle condition that caused request. four transfer types. Interrupt transfer characteristics small data, non-periodic, low-frequency, bounded-latency. Interrupt transfers typically used handle service needs. also Transfer Type. identifiable request software client move data between itself host) endpoint device appropriate direction. Request Packet. Interrupt Request. stream data whose timing implied delivery rate. entity with isochronous endpoints, defined Specification, that sources sinks sampled analog streams synchronous data streams. endpoint that capable consuming isochronous data stream that sent host. endpoint that capable producing isochronous data stream sending host. four transfer types. Isochronous transfers used when working with isochronous data. Isochronous transfers provide periodic, continuous communication between host device. also Transfer Type.
Full-duplex Function Handshake Packet Host
Host Controller Host Controller Driver (HCD)
Host Resources Tier Interrupt Request (IRQ) Interrupt Transfer
Request Packet Isochronous Data Isochronous Device Isochronous Sink Endpoint Isochronous Source Endpoint Isochronous Transfer
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Jitter
tendency toward lack synchronization caused mechanical electrical changes. More specifically, phase shift digital pulses over transmission medium. Transmission rate expressed kilobits second. Transmission rate expressed kilobytes second. Method storing data that places least significant byte multiple-byte values lower storage addresses. example, 16-bit integer stored little endian format places least significant byte lower address most significant byte next address. also Endian. Loss activity characterized without corresponding EOP. Least significant bit. Least significant byte. Transmission rate expressed megabits second. Transmission rate expressed megabytes second. bi-directional pipe that transfers data using request/data/status paradigm. data imposed structure that allows requests reliably identified communicated. Most significant bit. Most significant byte. Handshake packet indicating negative acknowledgment. method encoding serial data which ones zeroes represented opposite alternating high voltages where there return zero (reference) voltage between encoded bits. Eliminates need clock pulses. Return Zero Invert. Host software data structure representing entity. bundle data organized group transmission. Packets typically contain three elements: control information (e.g., source, destination, length), data transferred, error detection correction bits. logical buffer used device sending receiving single packet. This determines maximum packet size device send receive. field packet that indicates type packet, inference, format packet type error detection applied packet. token, data, handshake packet; transaction three phases. circuit that acts phase detector keep oscillator phase with incoming frequency. device that physical implementation; e.g., speakers, microphones, players. Packet
kb/s kB/s Little Endian
Mb/s MB/s Message Pipe
Return Zero Invert (NRZI)
NRZI Object Packet
Packet Buffer
Packet (PID) Phase Phase Locked Loop (PLL) Physical Device
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Pipe
logical abstraction representing association between endpoint device software host. pipe several attributes; example, pipe transfer data streams (stream pipe) messages (message pipe). also Stream Pipe Message Pipe. Phase Locked Loop. Asking multiple devices, time, they have data transmit. Power Reset. Point access from system circuit. USB, point where device attached. Restoring storage device, register, memory predetermined state when power applied. Either fixed data rate (single-frequency endpoints), limited number data rates (32kHz, 44.1kHz, 48kHz, continuously programmable data rate. exact programming capabilities endpoint must reported appropriate class-specific endpoint descriptors. specific rules, procedures, conventions relating format timing data transmission between devices. Rate Adaptation. process which incoming data stream, sampled Fsi, converted outgoing data stream, sampled Fso,with certain loss quality, determined rate adaptation algorithm. Error control mechanisms required process. different asynchronous. input data rate output data rate request made device contained within data portion SETUP packet. action completing service transfer notifying appropriate software client completion. directly attached Host Controller. This attached host (tier downstream port Root Hub. smallest unit data which endpoint operates; property endpoint. number samples second, expressed Hertz (Hz). dedicated implementation process sampled analog data streams. error control mechanism replaced interpolating techniques. procedure provided System Programming Interface (SPI). period between consecutive requests endpoint send receive data. deviation service delivery from scheduled delivery time. number services given endpoint unit time. Start-of-Frame. Start-of-Packet.
Polling Port Power Reset (POR) Programmable Data Rate
Protocol Rate Adaptation
Request Retire Root Root Port Sample Sample Rate (Fs) Sample Rate Conversion (SRC) Service Service Interval Service Jitter Service Rate
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Stage Start-of-Frame (SOF) Stream Pipe Synchronization Type Synchronous
System Programming Interface. Sample Rate Conversion. part sequence composing control transfer; stages include Setup stage, Data stage, Status stage. first transaction each frame. allows endpoints identify start frame synchronize internal endpoint clocks host. pipe that transfers data stream samples with defined structure. classification that characterizes isochronous endpoint's capability connect other isochronous endpoints. incoming data rate, Fsi, outgoing data rate, Fso, process derived from same master clock. There fixed relation between Fso. incoming sample rate, Fsi, outgoing sample rate, Fso, process derived from same master clock. There fixed relation between Fso. defined interface services provided system software.
Synchronous
System Programming Interface (SPI) Termination Time Division Multiplexing (TDM) Timeout Token Packet Transaction
Time Division Multiplexing. Passive components attached cables prevent signals from being reflected echoed. method transmitting multiple signals (data, voice, and/or video) simultaneously over communications medium interleaving piece each signal after another. detection lack activity some predetermined interval. type packet that identifies what transaction performed bus. delivery service endpoint; consists token packet, optional data packet, optional handshake packet. Specific packets allowed/required based transaction type. more transactions move information between software client function. Determines characteristics data flow between software client function. Four transfer types defined: control, interrupt, bulk, isochronous. time device needs wait begin transmitting packet after packet been received prevent collisions USB. This time based length propagation delay characteristics cable location transmitting device relation other devices USB. Universal Serial Driver. host resident software entity responsible providing common services clients that manipulating more functions more Host Controllers.
Transfer Transfer Type
Turn-around Time
USBD Universal Serial Driver (USBD)
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Universal Serial Resources Upstream
Resources provided USB, such bandwidth power. also Device Resources Host Resources direction data flow towards host. upstream port port device electrically closest host that generates upstream data traffic from hub. Upstream ports receive downstream data traffic. device that represented software interface layer. example virtual device hard disk with associated device driver client software that makes able reproduce audio .WAV file. data element that bytes bits) size.
Virtual Device
Word
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Chapter Background
This chapter presents brief description background Universal Serial (USB), including design goals, features bus, existing technologies.
Goals Universal Serial
specified industry-standard extension architecture with focus Computer Telephony Integration (CTI), consumer, productivity applications. following criteria were applied defining architecture USB:
Ease-of-use peripheral expansion Low-cost solution that supports transfer rates 12Mb/s Full support real-time data voice, audio, compressed video Protocol flexibility mixed-mode isochronous data transfers asynchronous messaging Integration commodity device technology Comprehension various configurations form factors Provision standard interface capable quick diffusion into product Enablement classes devices that augment PC's capability.
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Taxonomy Application Space
Figure describes taxonomy range data traffic workloads that serviced over USB. seen, 12Mb/s comprehends mid-speed low-speed data ranges. Typically, midspeed data types isochronous, while low-speed data comes from interactive devices. being proposed primarily desktop readily applied mobile environment. software architecture allows future extension providing support multiple Host Controllers.
PERFORMANCE LOW-SPEED
Interactive Devices 100kb/s
APPLICATIONS
Keyboard, Mouse Stylus Game Peripherals Virtual Reality Peripherals Monitor Configuration
ATTRIBUTES
Lower Cost Plug-unplug Ease-of-use Multiple Peripherals
MEDIUM-SPEED
Phone, Audio, Compressed Video 500Kb/S 10Mb/s
ISDN POTS Audio
Cost Ease-of-use Guaranteed Latency Guaranteed Bandwidth Dynamic Attach-Detach Multiple devices
HIGH-SPEED
Video, Disk 500Mb/s
Video Disk
High Bandwidth Guaranteed Latency Ease-of-use
Figure 3-1. Application Space Taxonomy
Feature List
Specification provides selection attributes that achieve multiple price/performance integration pointsi enable functions that allow differentiation system component level. Features categorized following benefits: Easy user
Single model cabling connectors Electrical details isolated from user (e.g., terminations) Self-identifying peripherals, automatic mapping function driver, configuration Dynamically attachable reconfigurable peripherals
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Wide range workloads applications
Suitable device bandwidths ranging from kb/s several Mb/s Supports isochronous well asynchronous transfer types over same wires Supports concurrent operation many devices (multiple connections) Supports physical devices Supports transfer multiple data message streams between host devices Allows compound devices (i.e., peripherals composed many functions) Lower protocol overhead, resulting high utilization
Isochronous bandwidth
Guaranteed bandwidth latencies appropriate telephony, audio, etc. Isochronous workload entire bandwidth
Flexibility
Supports wide range packet sizes, which allows range device buffering options Allows wide range device data rates accommodating packet buffer size latencies Flow control buffer handling built into protocol
Robustness
Error handling/fault recovery mechanism built into protocol Dynamic insertion removal devices identified user-perceived real-time Supports identification faulty devices
Synergy with industry
Protocol simple implement integrate Consistent with plug-and-play architecture Leverages existing operating system interfaces
Low-cost implementation
Low-cost subchannel 1.5Mb/s Optimized integration peripheral host hardware Suitable development low-cost peripherals Low-cost cables connectors Uses commodity technologies
Upgrade path
Architecture upgradeable support multiple Host Controllers system
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Chapter Architectural Overview
This chapter presents overview Universal Serial (USB) architecture concepts. cable that supports data exchange between host computer wide range simultaneously accessible peripherals. attached peripherals share bandwidth through hostscheduled, token-based protocol. allows peripherals attached, configured, used, detached while host other peripherals operation. Later chapters describe various components greater detail.
System Description
system described three definitional areas:
interconnect devices host.
interconnect manner which devices connected communicate with host. This includes following:
Topology: Connection model between devices host. Inter-layer Relationships: terms capability stack, tasks that performed each layer system. Data Flow Models: manner which data moves system over between producers consumers. Schedule: provides shared interconnect. Access interconnect scheduled order support isochronous data transfers eliminate arbitration overhead.
devices host described detail subsequent sections.
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4.1.1 Topology
connects devices with host. physical interconnect tiered star topology. center each star. Each wire segment point-to-point connection between host function, connected another function. Figure illustrates topology USB.
Host
RootHub
Host (Root Tier) Tier
Tier
Node Node
Tier
Node Node
Tier
Node Node Node
Figure 4-1. Topology
4.1.1.1 Host
There only host system. interface host computer system referred Host Controller. Host Controller implemented combination hardware, firmware, software. root integrated within host system provide more attachment points. Additional information concerning host found Section Chapter
4.1.1.2 Devices
devices following:
Hubs, which provide additional attachment points Functions, which provide capabilities system, such ISDN connection, digital joystick, speakers.
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devices present standard interface terms following:
Their comprehension protocol Their response standard operations, such configuration reset Their standard capability descriptive information.
Additional information concerning devices found Section Chapter
Physical Interface
physical interface described electrical (Chapter mechanical (Chapter specifications bus.
4.2.1 Electrical
transfers signal power over four-wire cable, shown Figure 4-2. signaling occurs over wires each point-to-point segment. There data rates:
full-speed signaling rate 12Mb/s. limited capability low-speed signaling mode also defined 1.5Mb/s.
low-speed mode requires less protection. Both modes supported same automatic dynamic mode switching between transfers. low-speed mode defined support limited number low-bandwidth devices, such mice, because more general would degrade utilization. clock transmitted, encoded along with differential data. clock encoding scheme NRZI with stuffing ensure adequate transitions. SYNC field precedes each packet allow receiver(s) synchronize their recovery clocks.
VBUS DGND
VBUS DGND
Figure 4-2. Cable cable also carries VBUS wires each segment deliver power devices. VBUS nominally source. allows cable segments variable lengths, several meters, choosing appropriate conductor gauge match specified drop other attributes such device power budget cable flexibility. order provide guaranteed input voltage levels proper termination impedance, biased terminations used each cable. terminations also permit detection attach detach each port differentiate between full-speed low-speed devices.
4.2.2 Mechanical
mechanical specifications cables connectors provided Chapter devices have upstream connection. Upstream downstream connectors mechanically interchangeable, thus eliminating illegal loopback connections hubs. cable four conductors: twisted signal pair standard gauge power pair range permitted gauges. connector four-position, with shielded housing, specified robustness, ease attach-detach characteristics.
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Power
specification covers aspects power:
Power distribution over deals with issues devices consume power provided host over USB. Power management deals with System Software devices into host-based power management system.
4.3.1 Power Distribution
Each segment provides limited amount power over cable. host supplies power devices that directly connected. addition, device have power supply. devices that rely totally power from cable called bus-powered devices. contrast, those that have alternate source power called self-powered devices. also supplies power connected devices. architecture permits bus-powered hubs within certain constraints topology that discussed later Chapter Figure (see Section 4.8.2.1), keyboard, pen, mouse bus-powered devices.
4.3.2 Power Management
host have power management system that independent USB. System Software interacts with host's power management system handle system power events such suspend resume. Additionally, devices typically implement additional power management features that allow them power managed system software. power distribution power management features allow designed into powersensitive systems such battery-based notebook computers.
Protocol
polled bus. Host Controller initiates data transfers. transactions involve transmission three packets. Each transaction begins when Host Controller, scheduled basis, sends packet describing type direction transaction, device address, endpoint number. This packet referred "token packet." device that addressed selects itself decoding appropriate address fields. given transaction, data transferred either from host device from device host. direction data transfer specified token packet. source transaction then sends data packet indicates data transfer. destination, general, responds with handshake packet indicating whether transfer successful. data transfer model between source destination host endpoint device referred pipe. There types pipes: stream message. Stream data USB-defined structure, while message data does. Additionally, pipes have associations data bandwidth, transfer service type, endpoint characteristics like directionality buffer sizes. Most pipes come into existence when device configured. message pipe, Default Control Pipe, always exists once device powered, order provide access device's configuration, status, control information. transaction schedule allows flow control some stream pipes. hardware level, this prevents buffers from underrun overrun situations using handshake throttle data rate. When NAKed, transaction retried when time available. flow control mechanism permits construction flexible schedules that accommodate concurrent servicing heterogeneous stream pipes. Thus, multiple stream pipes serviced different intervals with packets different sizes.
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Robustness
There several attributes that contribute robustness:
Signal integrity using differential drivers, receivers, shielding protection over control data fields Detection attach detach system-level configuration resources Self-recovery protocol, using timeouts lost corrupted packets Flow control streaming data ensure isochrony hardware buffer management Data control pipe constructs ensuring independence from adverse interactions between functions.
4.5.1 Error Detection
core error rate medium expected close that backplane glitches will very likely transient nature. provide protection against such transients, each packet includes error protection fields. When data integrity required, such with lossless data devices, error recovery procedure invoked hardware software. protocol includes separate CRCs control data fields each packet. failed considered indicate corrupted packet. gives 100% coverage single- double-bit errors.
4.5.2 Error Handling
protocol allows error handling hardware software. Hardware error handling includes reporting retry failed transfers. Host Controller will transmission that encounters errors three times before informing client software failure. client software recover implementation-specific way.
System Configuration
supports devices attaching detaching from time. Consequently, system software must accommodate dynamic changes physical topology.
4.6.1 Attachment Devices
devices attach through ports specialized devices known hubs. Hubs have status indicators that indicate attachment removal device ports. host queries retrieve these indicators case attachment, host enables port addresses device through device's control pipe default address. host assigns unique address device then determines newly attached device function host establishes control pipe device using assigned address endpoint number zero. attached device devices attached ports, then above procedure followed each attached devices. attached device function, then attachment notifications will handled host software that appropriate function.
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4.6.2 Removal Devices
When device been removed from hub's ports, disables port provides indication device removal host removal indication then handled appropriate System Software. removed device hub, System Software must handle removal both devices that were previously attached system through hub.
4.6.3 Enumeration
enumeration activity that identifies assigns unique addresses devices attached bus. Because allows devices attach detach from time, enumeration on-going activity System Software. Additionally, enumeration also includes detection processing removals.
Data Flow Types
supports functional data control exchange between host device either uni-directional bi-directional pipes. data transfers take place between host software particular endpoint device. Such associations between host software device endpoint called pipes. general, data movement though pipe independent from data flow other pipe. given device have many pipes. example, given device could have endpoint that supports pipe transporting data device another endpoint that supports pipe transporting data from device. architecture comprehends four basic types data transfers:
Control Transfers: Used configure device attach time used other device-specific purposes, including control other pipes device. Bulk Data Transfers: Generated consumed relatively large bursty quantities have wide dynamic latitude transmission constraints. Interrupt Data Transfers: Used characters coordinates with human-perceptible echo feedback response characteristics. Isochronous Data Transfers: Occupy prenegotiated amount bandwidth with prenegotiated delivery latency. (Also called streaming real time transfers).
pipe supports only types transfers described above given device configuration. data flow model described more detail Chapter
4.7.1 Control Transfers
Control data used System Software configure devices when they first attached. Other driver software choose control transfers implementation-specific ways. Data delivery lossless.
4.7.2 Bulk Transfers
Bulk data typically consists larger amounts data, such that used printers scanners. Bulk data sequential. Reliable exchange data ensured hardware level using error detection hardware invoking limited number retries hardware. Also, bandwidth taken bulk data vary, depending other activities.
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4.7.3 Interrupt Transfers
small, limited-latency transfer from device referred interrupt data. Such data presented transfer device time delivered rate slower than specified device. Interrupt data typically consists event notification, characters, coordinates that organized more bytes. example interrupt data coordinates from pointing device. Although explicit timing rate required, interactive data have response time bounds that must support.
4.7.4 Isochronous Transfers
Isochronous data continuous real-time creation, delivery, consumption. Timing-related information implied steady rate which isochronous data received transferred. Isochronous data must delivered rate received maintain timing. addition delivery rate, isochronous data also sensitive delivery delays. isochronous pipes, bandwidth required typically based upon sampling characteristics associated function. latency required related buffering available each endpoint. typical example isochronous data voice. delivery rate these data streams maintained, drop-outs data stream will occur buffer frame underruns overruns. Even data delivered appropriate rate hardware, delivery delays introduced software degrade applications requiring real-time turn-around, such telephony-based audio conferencing. timely delivery isochronous data ensured expense potential transient losses data stream. other words, error electrical transmission corrected hardware mechanisms such retries. practice, core error rate expected small enough issue. isochronous data streams allocated dedicated portion bandwidth ensure that data delivered desired rate. also designed minimal delay isochronous data transfers.
4.7.5 Allocating Bandwidth
bandwidth allocated among pipes. allocates bandwidth some pipes when pipe established. devices required provide some buffering data. assumed that devices requiring more bandwidth capable providing larger buffers. goal architecture ensure that buffering-induced hardware delay bounded within milliseconds. USB's bandwidth capacity allocated among many different data streams. This allows wide range devices attached USB. example, telephony devices ranging from 1B+D capacity accommodated. Further, different device rates, with wide dynamic range, concurrently supported. Specification defines rules each transfer type allowed access bus.
Devices
devices divided into device classes such hub, locator, text device. device class indicates specially designated device that provides additional attachment points (refer Chapter 11). devices required carry information self-identification generic configuration. They also required times display behavior consistent with defined device states.
4.8.1 Device Characterizations
devices accessed address that assigned when device attached enumerated. Each device additionally supports more pipes through which host communicate with device. devices must support specially designated pipe endpoint zero
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which device's control pipe will attached. devices support common accesses mechanism accessing information through this control pipe. Associated with control pipe endpoint zero information required completely describe device. This information falls into following categories:
Standard: This information whose definition common devices includes items such vendor identification, device class, power management. Device, configuration, interface, endpoint descriptions carry configuration-related information about device. Detailed information about these descriptors found Chapter Class: definition this information varies, depending device class device. Vendor: vendor device free information desired here. format, however, determined this specification.
Additionally, each device carries control status information.
4.8.2 Device Descriptions
major divisions device classes exist: hubs functions. Only hubs have ability provide additional attachment points. Functions provide additional capabilities host.
4.8.2.1 Hubs
Hubs element plug-and-play architecture USB. Figure shows typical hub. Hubs serve simplify connectivity from user's perspective provide robustness cost complexity. Hubs wiring concentrators enable multiple attachment characteristics USB. Attachment points referred ports. Each converts single attachment point into multiple attachment points. architecture supports concatenation multiple hubs. upstream port connects towards host. Each downstream ports allows connection another function. Hubs detect attach detach each downstream port enable distribution power downstream devices. Each downstream port individually enabled attached either full- low-speed devices. isolates low-speed ports from full-speed signaling. consists portions: Controller Repeater. Repeater protocol-controlled switch between upstream port downstream ports. also hardware support reset suspend/resume signaling. Host Controller provides interface registers allow communication to/from host. Hub-specific status control commands permit host configure monitor control ports.
Port
Port
Port Port
Upstream Port
Port
Port
Figure 4-3. Typical
Port
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Figure illustrates hubs provide connectivity typical computer environment.
TYPICAL ARCHITECTURAL CONFIGURATION
Hub/Function
Hub/Function
Host/Hub
Monitor
Mouse
Speaker
Phone
Function
Function
Function
Function
Function
Figure 4-4. Hubs Desktop Computer Environment
4.8.2.2 Functions
function device that able transmit receive data control information over bus. function typically implemented separate peripheral device with cable that plugs into port hub. However, physical package implement multiple functions embedded with single cable. This known compound device. compound device appears host with more non-removable devices. Each function contains configuration information that describes capabilities resource requirements. Before function used, must configured host. This configuration includes allocating bandwidth selecting function-specific configuration options. Examples functions include following:
locator device such mouse, tablet, light input device such keyboard
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output device such printer telephony adapter such ISDN.
Host: Hardware Software
host interacts with devices through Host Controller. host responsible following:
Detecting attachment removal devices Managing control flow between host devices Managing data flow between host devices Collecting status activity statistics Providing power attached devices.
System Software host manages interactions between devices host-based device software. There five areas interactions between System Software device software:
Device enumeration configuration Isochronous data transfers Asynchronous data transfers Power management Device management information.
Whenever possible, System Software uses existing host system interfaces manage above interactions.
4.10 Architectural Extensions
architecture comprehends extensibility interface between Host Controller Driver Driver. Implementations with multiple Host Controllers, associated Host Controller Drivers, possible.
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Chapter Data Flow Model
This chapter presents information about data moved across USB. information this chapter affects implementers. information presented level above signaling protocol definitions system. Consult Chapter Chapter more details about their respective parts system. This chapter provides framework information that further expanded Chapters through implementers should read this chapter they understand concepts USB.
Implementer Viewpoints
provides communication services between host attached devices. However, simple view user sees attaching more devices host, Figure 5-1, fact little more complicated implement than indicated figure. Different views system required explain specific requirements from perspective different implementers. Several important concepts features must supported provide user with reliable operation demanded from today's personal computers. presented layered fashion ease explanation allow implementers particular products focus details related their product.
Host
Device
Figure 5-1. Simple Host/Device View Figure shows deeper overview USB, identifying different layers system that will described more detail remainder specification. particular, there four focus implementation areas:
Physical Device: piece hardware cable that performs some useful user function. Client Software: Software that executes host, corresponding device. This client software typically supplied with operating system provided along with device. System Software: Software that supports particular operating system. System Software typically supplied with operating system, independently particular devices client software. Host Controller (Host Side Interface): hardware software that allows devices attached host.
There shared rights responsibilities between four system components. remainder this specification describes details required support robust, reliable communication flows between function client.
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Host
Interconnect
Physical Device
Client
Function
Function Layer
System
Logical Device
Device Layer
Host Controller
Interface Actual communications flow Logical communications flow Implementation Focus Area
Interface Layer
Figure 5-2. Implementation Areas shown Figure 5-2, simple connection host device requires interaction between number layers entities. Interface layer provides physical/signaling/packet connectivity between host device. Device Layer view System Software performing generic operations with device. Function Layer provides additional capabilities host appropriate matched client software layer. Device Function layers each have view logical communication within their layer that actually uses Interface Layer accomplish data transfer. physical view communication described Chapters related logical communication view presented Chapters This chapter describes those concepts that affect implementers should read before proceeding remainder specification find those details most relevant their product. describe manage communication, following concepts important:
Topology: Section presents primary physical logical components they interrelate. Communication Flow Models: Sections through describe communication flows between host devices through defines four transfer types. Access Management: Section describes access managed within host support broad range communication flows devices. Special Consideration Isochronous Transfers: Section 5.10 presents features specific devices requiring isochronous data transfers. Device implementers non-isochronous devices need read Section 5.10.
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Topology
There four main parts topology:
Host Devices: primary components system. Physical Topology: elements connected. Logical Topology: roles responsibilities various elements appears from perspective host device. Client Software-to-function Relationships: client software related function interfaces device view each other.
5.2.1 Host
host's logical composition shown Figure 5-3, includes following:
Host Controller Aggregate System Software (USB Driver, Host Controller Driver, host software) Client.
Host
Client
System
Host Controller Actual communications flow Logical communications flow
Figure 5-3. Host Composition host occupies unique position coordinating entity USB. addition special physical position, host specific responsibilities with regard attached devices. host controls access USB. device gains access only being granted access host. host also responsible monitoring topology USB. complete discussion host duties, refer Chapter
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5.2.2 Devices
physical device's logical composition shown Figure 5-4, includes following:
interface logical device Function.
physical devices provide additional functionality host. types functionality provided devices vary widely. However, logical devices present same basic interface host. This allows host manage USB-relevant aspects different devices same manner. assist host identifying configuring devices, each device carries reports configuration-related information. Some information reported common among logical devices. Other information specific functionality provided device. detailed format this information varies, depending device class device. complete discussion devices, refer Chapter
Physical Device
Function
Logical Device
Interface Actual communications flow Logical communications flow
Figure 5-4. Physical Device Composition
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5.2.3 Physical Topology
Devices physically connected host tiered star topology, illustrated Figure 5-5. attachment points provided special class device known hub. additional attachment points provided called ports. host includes embedded called root hub. host provides more attachment points root hub. devices that provide additional functionality host known functions. prevent circular attachments, tiered ordering imposed star topology USB. This results tree-like configuration illustrated Figure 5-5.
Host Device Root Device
Compound Device
Device
Device Device Device Device
Figure 5-5. Physical Topology Multiple functions packaged together what appears single physical device. example, keyboard trackball might combined single package. Inside package, individual functions permanently attached internal that connected USB. When multiple functions combined with single package, they referred compound device. From host's perspective, compound device same separate with multiple functions attached. Figure also illustrates compound device.
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5.2.4 Logical Topology
While devices physically attach tiered, star topology, host communicates with each logical device were directly connected root port. This creates logical view illustrated Figure that corresponds physical topology shown Figure 5-5. Hubs logical devices also, shown Figure simplify picture. Even though most host/logical device activities this logical perspective, host maintains awareness physical topology support processing removal hubs. When removed, devices attached must removed from host's view logical topology. more complete discussion hubs found Chapter Host
Logical Device Logical Device Logical Device Logical Device
Logical Device Logical Device Logical Device
Figure 5-6. Logical Topology
5.2.5 Client Software-to-function Relationship
Even though physical logical topology reflects shared nature bus, client software (CSw) manipulating function interface presented with view that deals only with interface(s) interest. Client software functions must software programming interfaces manipulate their functions opposed directly manipulating their functions memory accesses with other buses (e.g., PCI, EISA, PCMCIA, etc.). During operation, client software should independent other devices that connected USB. This allows designer device client software focus hardware/software interaction design details. Figure illustrates device designer's perspective relationships client software functions with respect logical topology Figure 5-6.
Client Software
Func
Func
Func Func
Func Func
Func
Figure 5-7. Client Software-to-function Relationships
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Communication Flow
provides communication service between software host function. Functions have different communication flow requirements different client-to-function interactions. provides better overall utilization allowing separation different communication flows function. Each communication flow makes some access accomplish communication between client function. Each communication flow terminated endpoint device. Device endpoints used identify aspects each communication flow. Figure shows more detailed view Figure 5-2. complete definition actual communication flows Figure supports logical device function layer communication flows. These actual communication flows cross several interface boundaries. Chapters through describe mechanical, electrical, protocol interface definitions "wire." Chapter describes device programming interface that allows device manipulated from host side wire. Chapter describes host side software interfaces:
Host Controller Driver (HCD): software interface between Host Controller System Software. This interface allows range Host Controller implementations without requiring host software dependent particular implementation. Driver support different Host Controllers without requiring specific knowledge Host Controller implementation. Host Controller implementer provides implementation that supports Host Controller. Driver (USBD): interface between System Software client software. This interface provides clients with convenient functions manipulating devices.
Host Interconnect Physical Device
Client
manages interface Interface
Function
collection interfaces
Pipe Bundle
interface
Buffers
Format
Interfacespecific
Format
System
manages devices
Endpoint Zero
Logical Device
collection endpoints
Default Pipe
Endpoint Zero
Device (Chapter
Data Endpoint Framed Data
Transfers
Framed Data
Host (Chapter
Host Controller Framed Data
Interface
Interface
Transactions
Wire
Pipe: represents connection abstraction between horizontal entities
Mechanical,
Data transport mechanism USB-relevant format transported data
Electrical, Protocol (Chapter
Figure 5-8. Host/Device Detailed View
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logical device appears system collection endpoints. Endpoints grouped into endpoint sets that implement interface. Interfaces views function. System Software manages device using Default Control Pipe. Client software manages interface using pipe bundles (associated with endpoint set). Client software requests that data moved across between buffer host endpoint device. Host Controller device, depending transfer direction) packetizes data move over USB. Host Controller also coordinates when access used move packet data over USB. Figure illustrates communication flows carried over pipes between endpoints host side memory buffers. following sections describe endpoints, pipes, communication flows more detail. Host Client Software Buffers Communication Flows
Pipes
Logical Device Interface Figure 5-9. Communication Flow
Endpoints
Software host communicates with logical device communication flows. communication flows selected device software/hardware designer(s) efficiently match communication requirements device transfer characteristics provided USB.
5.3.1 Device Endpoints
endpoint uniquely identifiable portion device that terminus communication flow between host device. Each logical device composed collection independent endpoints. Each logical device unique address assigned system device attachment time. Each endpoint device given design time unique device-determined identifier called endpoint number. Each endpoint device-determined direction data flow. combination device address, endpoint number, direction allows each endpoint uniquely referenced. Each endpoint simplex connection that supports data flow direction: either input (from device host) output (from host device). endpoint characteristics that determine type transfer service required between endpoint client software. Endpoints describe themselves
Their access frequency/latency requirements Their bandwidth requirements Their endpoint number error handling behavior requirements Maximum packet size that endpoint capable sending receiving
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transfer type endpoint (refer Section details) direction data transferred between endpoint host.
Endpoints other than those with endpoint number zero unknown state before being configured accessed host before being configured.
5.3.1.1 Endpoint Zero Requirements
devices required implement default control method that uses both input output endpoints with endpoint number zero. System Software uses this default control method initialize generically manipulate logical device (e.g., configure logical device) Default Control Pipe (see Section 5.3.2). Default Control Pipe provides access device's configuration information allows generic status control access. Default Control Pipe supports control transfers defined Section 5.5. endpoints with endpoint number zero always accessible once device attached, powered, received reset.
5.3.1.2 Non-endpoint Zero Requirements
Functions have additional endpoints required their implementation. Low-speed functions limited optional endpoints beyond required implement Default Control Pipe. Fullspeed devices have additional endpoints only limited protocol definition (i.e., maximum additional input endpoints additional output endpoints). Endpoints other than those Default Control Pipe cannot used until device configured normal part device configuration process (refer Chapter
5.3.2 Pipes
pipe association between endpoint device software host. Pipes represent ability move data between software host memory buffer endpoint device. There different, mutually exclusive, pipe communication modes:
Stream: Data moving through pipe USB-defined structure Message: Data moving through pipe some USB-defined structure.
does interpret content data delivers through pipe. Even though message pipe requires that data structured according definitions, content data interpreted USB. Additionally, pipes have following associated with them:
claim access bandwidth usage. transfer type. associated endpoint's characteristics, such directionality maximum data payload sizes. data payload data that carried data field data packet within transaction defined Chapter
pipe that consists endpoints with endpoint number zero called Default Control Pipe. This pipe always available once device powered received reset. Other pipes come into existence when device configured. Default Control Pipe used System Software determine device identification configuration requirements, configure device. Default Control Pipe also used device-specific software after device configured. System Software retains "ownership" Default Control Pipe mediates pipe other client software.
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software client normally requests data transfers Request Packets (IRPs) pipe then either waits notified when they completed. Details about IRPs defined operating systemspecific manner. This specification uses term simply refer identifiable request software client move data between itself host) endpoint device appropriate direction. software client cause pipe return outstanding IRPs desires. software client notified that completed when transactions associated with have completed either successfully errors. there IRPs pending progress pipe, pipe idle Host Controller will take action with regard pipe; i.e., endpoint such pipe will transactions directed only time activity present pipe when IRPs pending that pipe. non-isochronous pipe encounters condition that causes send STALL host (refer Chapter three errors encountered packet IRP, aborted/retired, outstanding IRPs also retired, further IRPs accepted until software client recovers from condition implementation-dependent way) acknowledges halt error condition USBD call. appropriate status informs software client specific result error versus halt (refer Chapter 10). Isochronous pipe behavior described Section 5.6. require multiple data payloads move client data over bus. data payloads such multiple data payload expected maximum packet size until last data payload that contains remainder overall IRP. description each transfer type more details. such IRP, short packets (i.e., less than maximum-sized data payloads) input that completely fill data buffer have possible meanings, depending upon expectations client:
client expect variable-sized amount data IRP. this case, short packet that does fill data buffer used simply in-band delimiter indicate "end unit data." should retired without error Host Controller should advance next IRP. client expect specific-sized amount data. this case, short packet that does fill data buffer indication error. should retired, pipe should stalled, pending IRPs associated with pipe should also retired.
Because Host Controller must behave differently cases cannot know which behave given IRP, possible indicate which behavior client desires. endpoint inform host that busy responding with NAK. NAKs used retire condition returning software client. number NAKs encountered during processing given IRP. response transaction does constitute error counted three errors described above.
5.3.2.1 Stream Pipes
Stream pipes deliver data data packet portion transactions with USB-required structure data content. Data flows stream pipe other same order. Stream pipes always uni-directional their communication flow. Data flowing through stream pipe expected interact with what believes single client. System Software required provide synchronization between multiple clients that using same stream pipe. Data presented stream pipe moved through pipe sequential order: first-in, first-out. stream pipe device bound single device endpoint number appropriate direction (i.e., corresponding token defined protocol layer). device endpoint number opposite direction used some other stream pipe device. Stream pipes support bulk, isochronous, interrupt transfer types, which explained later sections.
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5.3.2.2 Message Pipes
Message pipes interact with endpoint different manner than stream pipes. First, request sent device from host. This request followed data transfer(s) appropriate direction. Finally, Status stage follows some later time. order accommodate request/data/status paradigm, message pipes impose structure communication flow that allows commands reliably identified communicated. Message pipes allow communication flow both directions, although communication flow predominately one-way. Default Control Pipe always message pipe. System Software ensures that multiple requests sent message pipe concurrently. device required service only single message request time message pipe. Multiple software clients host make requests Default Control Pipe, they sent device firstin, first-out order. device control flow information during Data Status stages based ability respond host transactions (refer Chapter more details). message pipe will normally sent next message from host until current message's processing device been completed. However, there error conditions whereby message transfer aborted host message pipe sent message transfer prematurely (from device's perspective). From perspective software manipulating message pipe, error some part retires current queued IRPs. software client that requested notified completion with appropriate error indication. message pipe device requires single device endpoint number both directions tokens). does allow message pipe associated with different endpoint numbers each direction. Message pipes support control transfer type, which explained Section 5.5.
Transfer Types
transports data through pipe between memory buffer associated with software client host endpoint device. Data transported message pipes carried USB-defined structure, allows device-specific structured data transported within USB-defined message data payload. also defines that data moved over packetized pipe (stream message), ultimately formatting interpretation data transported data payload transaction responsibility client software function using pipe. However, provides different transfer types that optimized more closely match service requirements client software function using pipe. uses more transactions move information between software client function. Each transfer type determines various characteristics communication flow including following:
Data format imposed Direction communication flow Packet size constraints access constraints Latency constraints Required data sequences Error handling.
designers device choose capabilities device's endpoints. When pipe established endpoint, most pipe's transfer characteristics determined remain fixed lifetime pipe. Transfer characteristics that modified described each transfer type.
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defines four transfer types:
Control Transfers: Bursty, non-periodic, host software-initiated request/response communication, typically used command/status operations. Isochronous Transfers: Periodic, continuous communication between host device, typically used time-relevant information. This transfer type also preserves concept time encapsulated data. This does imply, however, that delivery needs such data always time-critical. Interrupt Transfers: Small-data, low-frequency, bounded-latency communication. Bulk Transfers: Non-periodic, large-packet bursty communication, typically used data that available bandwidth also delayed until bandwidth available.
Each transfer type described detail following four major sections. data carried data field data packet described Section 8.4.3. Chapter also describes details protocol that affected each particular transfer type.
Control Transfers
Control transfers allow access different parts device. Control transfers intended support configuration/command/status type communication flows between client software function. control transfer composed Setup transaction moving request information from host function, zero more Data transactions sending data direction indicated Setup transaction, Status transaction returning status information from function host. Status transaction returns "success" when endpoint successfully completed processing requested operation. Section 8.5.2 describes details what packets, transactions, transaction sequences used accomplish control transfer. Chapter describes details defined command codes. Each device required implement Default Control Pipe message pipe. This pipe used System Software. Default Control Pipe provides access device's configuration, status, control information. function can, required provide endpoints additional control pipes implementation needs. device framework (refer Chapter defines standard, device class, vendor-specific requests that used manipulate device's state. Descriptors also defined that used contain different information device. Control transfers provide transport mechanism access device descriptors make requests device manipulate behavior. Control transfers carried only through message pipes. Consequently, data flows using control transfers must adhere data structure definitions described Section 5.5.1. system will make "best effort" support delivery control transfers between host devices. function client software cannot request specific access frequency bandwidth control transfers. System Software restrict access bandwidth that device desire control transfers. These restrictions defined Section 5.5.3 Section 5.5.4.
5.5.1 Control Transfer Data Format
Setup packet USB-defined structure that accommodates minimum commands required enable communication between host device. structure definition allows vendor-specific extensions device specific commands. Data transactions following Setup have USB-defined structure except when carrying vendor-specific information. Status transaction also USB-defined structure. Specific control transfer Setup/Data definitions described Section 8.5.2 Chapter
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5.5.2 Control Transfer Direction
Control transfers supported bi-directional communication flow over message pipes. consequence, when control pipe configured, uses both input output endpoint with specified endpoint number.
5.5.3 Control Transfer Packet Size Constraints
endpoint control transfers specifies maximum data payload size that endpoint accept from transmit bus. defines allowable maximum control data payload sizes fullspeed devices either bytes. Low-speed devices limited only eight-byte maximum data payload size. This maximum applies data payloads Data packets following Setup; i.e., size specified data field packet defined Chapter including other information that required protocol. Setup packet always eight bytes. control pipe (including Default Control Pipe) always uses wMaxPacketSize value data payloads. endpoint reports configuration information value maximum data payload size. does require that data payloads transmitted exactly maximum size; i.e., data payload less than maximum, does need padded maximum size. Host Controllers required have support 16-, 32-, 64-byte maximum data payload sizes full-speed control endpoints only eight-byte maximum data payload sizes low-speed control endpoints. Host Controller required support larger smaller maximum data payload sizes. order determine maximum packet size Default Control Pipe, System Software reads device descriptor. host will read first eight bytes device descriptor. device always responds with least these initial bytes single packet. After host reads initial part device descriptor, guaranteed have read this default pipe's wMaxPacketSize field (byte device descriptor). will then allow correct size subsequent transactions. other control endpoints, maximum data payload size known after configuration that System Software ensure that data payload will sent endpoint that larger than supported size. host will always maximum data payload size least eight bytes. endpoint must always transmit data payloads with data field less than equal endpoint's wMaxPacketSize (refer Chapter When control transfer involves more data than data payload currently established maximum size, data payloads required maximum-sized except last data payload, which will contain remaining data. Data stage control transfer from endpoint host complete when endpoint does following:
transferred exactly amount data specified during Setup stage Transfers packet with payload size less than wMaxPacketSize transfers zero-length packet.
When Data stage complete, Host Controller advances Status stage instead continuing with another data transaction. Host Controller does advance Status stage when Data stage complete, endpoint halts pipe outlined Section 5.3.2. larger-than-expected data payload received from endpoint, control transfer will aborted/retired. Data stage control transfer from host endpoint complete when data been transferred. endpoint receives larger-than-expected data payload from host, halts pipe.
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5.5.4 Control Transfer Access Constraints
Control transfers used full-speed low-speed devices. endpoint indicate desired access frequency control pipe. balances access requirements control pipes specific IRPs that pending provide "best effort" delivery data between client software functions. requires that part each frame reserved available control transfers follows:
control transfers that attempted implementation-dependent fashion) consume less than frame time, remaining time used support bulk transfers (refer Section 5.8). control transfer that been attempted needs retried retried current future frame; i.e., required retried same frame. there more control transfers than reserved time, there additional frame time that being used isochronous interrupt transfers, Host Controller move additional control transfers they available. there many pending control transfers available frame time, control transfers selected moved over appropriate. there control transfers pending multiple endpoints, control transfers different endpoints selected according fair access policy that Host Controller implementationdependent. transaction control transfer that frequently being retried should expected consume unfair share time.
These requirements allow control transfers between host devices regularly moved over with "best effort." rate control transfers particular endpoint varied System Software discretion. endpoint client software cannot assume specific rate service control transfers. control endpoint zero more transfers single frame. time made available software client endpoint changed other devices inserted into removed from system also control transfers requested other device endpoints. frequency frame timing limit maximum number successful control transfers within frame system less than full-speed eight-byte data payloads less than four low-speed eight-byte data payloads. Table lists information about different-sized full-speed control transfers maximum number transfers possible frame. This table generated assuming that there Data stage transaction that Data stage zero-length status phase. table illustrates possible power data payloads less than equal allowable maximum data payload sizes. table does include overhead associated with stuffing.
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Table 5-1. Full-speed Control Transfer Limits Protocol Overhead bytes) SYNC bytes, bytes, Endpoint bytes, bytes, Setup data bytes, 7-byte interpacket delay (EOP, etc.)) Frame Bandwidth Transfer
Data Payload
Bandwidth (bytes/second)
Transfers
Bytes Remaining
Bytes/Frame Useful Data
32000 62000 120000 224000 384000 608000 832000 1500000
1500
frame reservation non-periodic transfers means that system with time fully allocated, full-speed control transfers system contend nominal three control transfers frame. Because system uses control transfers configuration purposes addition whatever other control transfers other client software requesting, given software client function should expect able make this full bandwidth control purposes. Host Controllers also free determine individual transactions specific control transfers moved over within across frames. endpoint could transactions control transfer within same frame spread across several noncontiguous frames. Host Controller, various implementation reasons, able provide theoretical maximum number control transfers frame. Both full-speed low-speed control transfers contend same available frame time. Low-speed control transfers simply take longer transfer. Table lists information about different-sized low-speed packets maximum number packets possible frame. table does include overhead associated with stuffing. both speeds, because control transfer composed several packets, packets spread over several frames spread time required across several frames.
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Table 5-2. Low-speed Control Transfer Limits Protocol Overhead bytes)
Data Payload
Bandwidth (Approximate)
Frame Bandwidth Transfer
Transfers
Bytes Remaining
Bytes/Frame Useful Data
3000 6000 12000 24000 187500
5.5.5 Control Transfer Data Sequences
Control transfers require that Setup transaction sent from host device describe type control access that device should perform. Setup transaction followed zero more control Data transactions that carry specific information requested access. Finally, Status transaction completes control transfer allows endpoint return status control transfer client software. After Status transaction control transfer completed, host advance next control transfer endpoint. described Section 5.5.4, each control transaction next control transfer will moved over some Host Controller implementation-defined time. endpoint busy device-specific time during Data Status transactions control transfer. During these times when endpoint indicates busy (refer Chapter Chapter details), host will retry transaction later time. Setup transaction received endpoint before previously initiated control transfer completed, device must abort current transfer/operation handle control Setup transaction. Setup transaction should normally sent before completion previous control transfer. However, transfer aborted, example, errors bus, host send next Setup transaction prematurely from endpoint's perspective. After halt condition encountered error detected host, control endpoint allowed recover accepting next Setup PID; i.e., recovery actions some other pipe required control endpoints. Default Control Pipe, device reset will ultimately required clear halt error condition next Setup accepted. provides robust error detection recovery/retransmission errors that occur during control transfers. Transmitters receivers remain synchronized with regard where they control transfer recover with minimum effort. Retransmission Data Status packets detected receiver data retry indicators packet. transmitter reliably determine that corresponding receiver successfully accepted transmitted packet information returned handshake packet. protocol allows distinguishing retransmitted packet from original packet except control Setup packet. Setup packets retransmitted transmission error; however, Setup packets cannot indicate that packet original retried transmission.
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Isochronous Transfers
non-USB environments, isochronous transfers have general implication constant-rate, errortolerant transfers. environment, requesting isochronous transfer type provides requester with following:
Guaranteed access bandwidth with bounded latency Guaranteed constant data rate through pipe long data provided pipe case delivery failure error, retrying attempt deliver data.
While isochronous transfer type designed support isochronous sources destinations, required that software using this transfer type actually isochronous order transfer type. Section 5.10 presents more detail special considerations handling isochronous data USB.
5.6.1 Isochronous Transfer Data Format
imposes data content structure communication flows isochronous pipes.
5.6.2 Isochronous Transfer Direction
isochronous pipe stream pipe therefore, always uni-directional. endpoint description identifies whether given isochronous pipe's communication flow into host. device requires bi-directional isochronous communication flow, isochronous pipes must used, each direction.
5.6.3 Isochronous Transfer Packet Size Constraints
endpoint given configuration isochronous pipe specifies maximum size data payload that transmit receive. System Software uses this information during configuration ensure that there sufficient time accommodate this maximum data payload each frame. there sufficient time maximum data payload, configuration established; not, configuration established. System Software does adjust maximum data payload size isochronous pipe case control pipe. isochronous pipe simply either supported supported given system configuration. limits maximum data payload size 1,023 bytes each isochronous pipe. Table lists information about different-sized isochronous transactions maximum number transactions possible frame. table does include overhead associated with stuffing.
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Table 5-3. Isochronous Transaction Limits Protocol Overhead bytes) SYNC bytes, bytes, Endpoint bytes, bytes, 1-byte interpacket delay) Frame Bandwidth Transfer
Data Payload
Bandwidth
Transfers
Bytes Remaining
Bytes/Frame Useful Data
1023
150000 272000 460000 704000 960000 1152000 1280000 1280000 1280000 1024000 1023000 1500000
1152 1280 1280 1280 1024 1023 1500
given transaction isochronous pipe need exactly maximum size specified endpoint. size data payload determined transmitter (client software function) vary required from transaction transaction. ensures that whatever size presented Host Controller delivered bus. actual size data payload determined data transmitter less than prenegotiated maximum size. errors change actual packet size seen receiver. However, these errors detected either data knowledge receiver about expected size transaction.
5.6.4 Isochronous Transfer Access Constraints
Isochronous transfers used only full-speed devices. requires that more than frame allocated periodic (isochronous interrupt) transfers. endpoint isochronous pipe does include information about access frequency. isochronous pipes normally move exactly data packet each frame (i.e., every 1ms). Errors delays operating system scheduling client software result packet being transferred frame. error indication should returned status client software such case. device also detect this situation tracking tokens noticing tokens without intervening data packet isochronous endpoint.
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frequency frame timing limit maximum number successful isochronous transactions within frame system less than full-speed one-byte data payloads. Host Controller, various implementation reasons, able provide theoretical maximum number isochronous transactions frame.
5.6.5 Isochronous Transfer Data Sequences
Isochronous transfers support data retransmission response errors bus. receiver determine that transmission error occurred. low-level protocol does allow handshakes returned transmitter isochronous pipe. Normally, handshakes would returned tell transmitter whether packet successfully received not. isochronous transfers, timeliness more important than correctness/retransmission, given error rates expected bus, protocol optimized assuming transfers normally succeed. Isochronous receivers determine whether they missed data during frame. Also, receiver determine much data lost. Section 5.10 describes these mechanisms more detail. endpoint isochronous transfers never halts because there handshake report halt condition. Errors reported status associated with isochronous transfer, isochronous pipe halted error case. error detected, host continues process data associated with next frame transfer. Limited error detection possible because protocol isochronous transactions does allow per-transaction handshakes.
Interrupt Transfers
interrupt transfer type designed support those devices that need send receive small amounts data infrequently, with bounded service periods. Requesting pipe with interrupt transfer type provides requester with following:
Guaranteed maximum service period pipe Retry transfer attempts next period, case occasional delivery failure error bus.
5.7.1 Interrupt Transfer Data Format
imposes data content structure communication flows interrupt pipes.
5.7.2 Interrupt Transfer Direction
interrupt pipe stream pipe therefore always uni-directional. endpoint description identifies whether given interrupt pipe's communication flow into host.
5.7.3 Interrupt Transfer Packet Size Constraints
endpoint interrupt pipe specifies maximum size data payload that will transmit receive. maximum allowable interrupt data payload size bytes less full-speed. Low-speed devices limited eight bytes less maximum data payload size. This maximum applies data payloads data packets; i.e., size specified data field packet defined Chapter including other protocol-required information. does require that data packets exactly maximum size; i.e., data packet less than maximum, does need padded maximum size. Host Controllers required have support 64-byte maximum data payload sizes fullspeed interrupt endpoints eight bytes less maximum data payload sizes low-speed interrupt endpoints. Host Controller required support larger maximum data payload sizes.
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System Software determines maximum data payload size that will used interrupt pipe during device configuration. This size remains constant lifetime device's configuration. System Software uses maximum data payload size determined during configuration ensure that there sufficient time accommodate this maximum data payload assigned period. there sufficient time, pipe established; not, pipe established. System Software does adjust time made available interrupt pipe case control pipe. interrupt pipe simply either supported supported given system configuration. However, actual size data payload still determined data transmitter less than maximum size. endpoint must always transmit data payloads with data field less than equal endpoint's wMaxPacketSize value. device move data interrupt pipe that larger than wMaxPacketSize. software client accept this data interrupt transfer that requires multiple transactions without requiring IRP-complete notification transaction. This achieved specifying buffer that hold desired data size. size buffer multiple wMaxPacketSize with some remainder. endpoint must transfer each transaction except last wMaxPacketSize last transaction remainder. multiple data transactions moved over period established pipe. When interrupt transfer involves more data than data payload currently established maximum size, data payloads required maximum-sized except last data payload, which will contain remaining data. interrupt transfer complete when endpoint does following:
transferred exactly amount data expected Transfers packet with payload size less than wMaxPacketSize transfers zero-length packet.
When interrupt transfer complete, Host Controller retires current advances next IRP. data payload received that larger than expected, interrupt will aborted/retired pipe will stall future IRPs until condition corrected acknowledged.
5.7.4 Interrupt Transfer Access Constraints
Interrupt transfers used full-speed low-speed devices. requires that more than frame allocated periodic (isochronous interrupt) transfers. frequency frame timing limit maximum number successful interrupt transactions within frame system less than full-speed one-byte data payloads low-speed one-byte data payloads. Host Controller, various implementation reasons, able provide above maximum number interrupt transactions frame. Table lists information about different sized full-speed interrupt transactions maximum number transactions possible frame. Table lists similar information low-speed interrupt transactions. tables include overhead associated with stuffing.
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Table 5-4. Full-speed Interrupt Transaction Limits Protocol Overhead bytes) SYNC bytes, bytes, Endpoint bytes, bytes, 3-byte interpacket delay) Frame Bandwidth Transfer
Data Payload
Bandwidth
Transfers
Bytes Remaining
Bytes/Frame Useful Data
107000 200000 352000 568000 816000 1056000 1216000 1500000
1056 1216 1500
endpoint interrupt pipe specifies desired access period. full-speed endpoint specify desired period from 255ms. Low-speed endpoints limited specifying only 10ms 255ms. System Software will this information during configuration determine period that sustained. period provided system shorter than that desired device shortest period defined (1ms). client software device depend only fact that host will ensure that time duration between transaction attempts with endpoint will longer than desired period. Note that errors prevent interrupt transaction from being successfully delivered over consequently exceed desired period. Also, endpoint only polled when software client interrupt transfer pending. time performing interrupt transfer arrives there pending, endpoint will given opportunity transfer data that time. Once available, data will transferred next allocated period.
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Table 5-5. Low-speed Interrupt Transaction Limits Protocol Overhead bytes)
Data Payload
Bandwidth (Approximate)
Frame Bandwidth Transfer
Transfers
Bytes Remaining
Bytes/Frame Useful Data
13000 24000 44000 64000 187500
Interrupt transfers moved over accessing interrupt endpoint every period. input interrupt endpoints, host determine whether endpoint will source interrupt without accessing endpoint requesting interrupt transfer. endpoint interrupt data transmit when accessed host, responds with NAK. endpoint should only provide interrupt data when interrupt pending avoid having software client erroneously notified complete. zerolength data payload valid transfer useful some implementations.
5.7.5 Interrupt Transfer Data Sequences
Interrupt transactions either alternating data toggle bits, such that bits toggled only upon successful transfer completion, continuously toggling data toggle bits. host case must assume that device obeying full handshake/retry rules defined Chapter device choose always toggle DATA0/DATA1 PIDs that ignore handshakes from host. However, this case, client software miss some data packets when error occurs, because Host Controller interprets next packet retry missed packet. halt condition detected interrupt pipe transmission errors STALL handshake being returned from endpoint, pending IRPs retired. Removal halt condition achieved software intervention through separate control pipe. This recovery will reset data toggle DATA0 endpoint both host device. Interrupt transactions retried errors detected that affect given transfer.
Bulk Transfers
bulk transfer type designed support devices that need communicate relatively large amounts data highly variable times where transfer available bandwidth. Requesting pipe with bulk transfer type provides requester with following:
Access bandwidth-available basis Retry transfers, case occasional delivery failure errors Guaranteed delivery data, guarantee bandwidth latency.
Bulk transfers occur only bandwidth-available basis. with large amounts free bandwidth, bulk transfers happen relatively quickly; with little bandwidth available, bulk transfers trickle over relatively long period time.
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5.8.1 Bulk Transfer Data Format
imposes data content structure communication flows bulk pipes.
5.8.2 Bulk Transfer Direction
bulk pipe stream pipe and, therefore, always communication flowing either into host given pipe. device requires bi-directional bulk communication flow, bulk pipes must used, each direction.
5.8.3 Bulk Transfer Packet Size Constraints
endpoint bulk transfers specifies maximum data payload size that endpoint accept from transmit bus. defines allowable maximum bulk data payload sizes only bytes. This maximum applies data payloads data packets; i.e.; size specified data field packet defined Chapter including other protocol-required information. bulk endpoint designed support maximum data payload size. bulk endpoint reports configuration information value maximum data payload size. does require that data payloads transmitted exactly maximum size; i.e., data payload less than maximum, does need padded maximum size. Host Controllers r
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