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SOLDERRM/D Rev. January-2007 SCILLC, 2007 "All Rights Reserved"
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January-2007 SCILLC, 2007 "All Rights Reserved" SOLDERRM FULLPAK, ICePAK, MicroIntegration, MicroLeadless, MOSORB, MiniMOSORB, POWERTAP trademarks Semiconductor Components Industries, (SCILLC). Cho-Therm registered trademark Chromerics, Inc. Grafoil registered trademark Union Carbide. Kapton registered trademark Pont Nemours Co., Inc. Kon-Dux Rubber-Duc trademarks Aavid Thermal Technologies, Inc. PowerFLEX trademark Texas Instruments Incorporated. Thermasil registered trademark Thermafilm trademark Thermalloy, Inc. Micro8 trademark International Rectifier. Intel Pentium registered trademarks Itanium trademark Intel Corporation. ChipFET trademark Vishay Siliconix. POWERMITE registered trademark used under license from Microsemi Corporation. Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. SCILLC does convey license under patent rights rights others. SCILLC products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure SCILLC product could create situation where personal injury death occur. Should Buyer purchase SCILLC products such unintended unauthorized application, Buyer shall indemnify hold SCILLC officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that SCILLC negligent regarding design manufacture part. SCILLC Equal Opportunity/Affirmative Action Employer. This literature subject applicable copyright laws resale manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center Semiconductor P.O. 5163, Denver, Colorado 80217 Phone: 303-675-2175 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East Africa Technical Support: Phone: 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit additional information, please contact your local Sales Representative SOLDERRM/D http://onsemi.com SOLDERRM Table Contents Page Section General (Lead) Free Lead Finish/Plating Strategy Section Soldering/Mounting Techniques Soldering Considerations Surface Mount Packages Footprints Soldering POWERMITE® SOD-523 SC-70/SOT-323 SOT-723 D2PAK SOT-223 SOT-953 5-LEAD DPAK Central Lead Crop SC-74/SC-74R TSOP-6 DFN6, DFN6, Dual Flag 7-LEAD D2PAK, Short Lead SO-8 DFN8/UDFN8, UDFN8, DFN8, 9-Bump WDFN10, UQFN12, DFN12 TSSOP-14 QFN16, DFN16 UDFN20, TLLGA32, SOD-123 SOD-723 SC-75/SC-89/SOT-416 SOT-1123 WDFN3 SOT-553 THIN SOT23-5/TSOP-5/SC59-5 6-PIN FLIP-CHIP SOT-563 UDFN6/WDFN6, DFN6, Single Flag CLCC-6 Micro8t SO-8 Exposed UDFN8, DFN8, Micro10 DFN10, DFN12, PLLP-12 UQFN16/WQFN16, SOIC-16 TSSOP-16 LLGA-20, QFN32, SOD-323 SC-59 SOT-23 DPAK SC-82AB SC-88A/SC70-5/SOT-353 5-LEAD D2PAK SC-88/SC70-6/SOT-363 SOT-963 DFN6, DFN6, Single Flag 7-LEAD D2PAK Micro8 Leadless SO8FL (DFN6), DFN8, DFN8, 8-Bump (Flip-Chip) UQFN10/WQFN10, UDFN10 WDFN12, SOIC-14 QFN-16, 3/EP, SOIC16-EP TSSOP-20 DFN22, ChipFET Board Level Application Notes Packages Mounting Considerations Power Semiconductors Mounting Considerations Flip-Chips Section Handling Semiconductor Packages Section Semiconductor Package Reliability Quality http://onsemi.com SOLDERRM http://onsemi.com SOLDERRM Section General (Lead) Free Lead Finish/ Plating Strategy http://onsemi.com SOLDERRM General (Lead) Free Lead Finish/Plating Strategy order provide maximum flexibility convenience customers, Semiconductor modifying strategy support Pb-free global initiatives from previous General Announcement #12770. Pb-free Plating Strategy Semiconductor offers portfolio devices that plated with Pb-free lead finishes. Many products were originally released Pb-free have comparable leaded version available. devices which have been Pb-free since their inception, intend introduce Pb-containing lead finish versions those devices. those customers that choose convert Pb-free offering according conversion plan, Semiconductor will continue offer current containing devices until business conditions longer prove feasible. committed meeting needs customers industry transitions Pb-free over next couple years. Semiconductor qualified majority packages Pb-free version have made them available sampling production ordering. list below shows packages that have been qualified remaining with their targeted completion dates. Please contact your Semiconductor Sales Representative this schedule does meet your conversion needs, want order Pb-free samples. Semiconductor fully compliant with RoHS directive parts which makes business sense other words, Semiconductor offers Available Axial Lead Button Case ChipFETt D2PAK D2PAK Discrete POWERMITEt POWERTAPt PSOP-2 5x5, 5x6, 7x7, 2x2.2, 3x3, SC-59 SC-70 SC-74 SC-75 SC-82AB SC-82 Dual SC-88 SC-88A SC-89 SIDAC SO-8 SOD-123 SOD-323 SOD-523 SOEIAJ 8/14/16/20 SOIC Narrow 7/8/14/16 SOIC Wide 16/18/20/24 SOIC SOT-223 SOT-23 SOT-23 SOT-23 SOT-23-L SOT-553 SSOP SSOVP Surge Special Surmetic TO-218 TO-220 3/5/7 TO-247 TO-264 TO-3 TO-92 TQFP TSOP-5 TSOP-6 TSSOP 8/14/16/20/24/48 Pb-free versions parts which there sufficient demand. will also continue offer these parts standard Tin-Lead (SnPb) lead finish until market conditions necessitate change direction. Moisture Sensitivity Level (MSL) Surface Mount Packages qualified 260°C, which compliant JEDEC standard J-STD-020C. majority ratings will remain unchanged from current classification. there change rating package, customer will notified appropriate packing precautions will taken before product shipped Semiconductor. Product Identification Devices offered without containing lead finish will concatenated with suffix denote Pb-free lead finish qualified compatibility with Pb-free board mount assembly processing. Existing packages that currently offered solely with Pb-free finish will also change part numbers. This intended clearly identify parts that Pb-free qualified compatibility with Pb-free board mount assembly processing. (Manufacturer Part Number) code label reel, tube rail, intermediate boxes will have "Pb-free 2LI" logo printed those labels compliant JEDEC standard JESD97. Pb-free products also identified unique product marking. Pb-free products marked with suffix part number package. However, package small include additional character, Pb-free package will marked with micro dot. 1.6x1.6, 3x1, 3x3, 3.3x3.3, 4x1.6 DPAK FCDCA LQFP 32/52 LQFP 52/64 Micro8t/10 Micro8 Micro Leadless MOSORBt/MiniMOSORBt PDIP 7/8/14/16/18/20/24N/24W http://onsemi.com SOLDERRM Available PLCC 20/28/44 Planned FCBGA 16/49 SOIC SPAK Planned CLCC QSOP CDIP PLLP (PQFN) SOT-143 SOT-723 PowerFLEXt SOT-563 SOT-89 Qualification Plan: qualification requirements Pb-free external lead finish differ surface-mount device (SMD) through-hole devices (THD). THDs primary qualification requirement demonstrate forward compatibility with Pb-free solder pastes (based SnCuAg). tests performed typically include: (Preconditioning performed target +5/-0°C) Solderability with SnCuAg solder Resistance Solder Heat (RSH Solder Immersion) Solderability with SnCuAg solder Resistance Solder Heat SMDs reclassification moisture sensitivity level (MSL) peak reflow temperature 260°C required addition solderability validation. reclassification performed largest size that used package. tests performed typically include: Backward Compatibility Backward compatibility capability customers take Pb-free products, mount their board reflow using solder containing lead (Pb). Semiconductor conducted reflow tests Pb-free parts using leaded solder reflow temperatures processes simulate this condition. Tests have been conducted 230°C results show that there will solderability issues. Please Note: This does apply BGA, bumped Flip-Chip devices. parts Pb-free they need Pb-free reflow process. Points Contact: Your Local Semiconductor Sales Representative Semiconductor Technical Information Center 1-800-282-9855 Canada) http://www.onsemi.com/pb-free Preconditioned Highly Accelerated Stress Testing (PC-HAST) hours minimum Preconditioned Autoclave (PC-AC) hours minimum Preconditioned Temperature Cycling (PC-TC) cycles minimum http://onsemi.com SOLDERRM http://onsemi.com SOLDERRM Section Soldering Mounting Techniques http://onsemi.com SOLDERRM Soldering Considerations Surface Mount Packages RECOMMENDED FOOTPRINTS SURFACE MOUNTED APPLICATIONS Surface mount board layout critical portion total design. footprint semiconductor packages must correct size ensure proper solder connection interface between board package. With correct geometry, packages will self align when subjected solder reflow process. POWER DISSIPATION SURFACE MOUNT DEVICE THERMAL RESISTANCE, JUNCTION AMBIENT (°C/W) power dissipation surface mount device function drain/collector size. These vary from minimum size soldering size given maximum power dissipation. Power dissipation surface mount device determined TJ(max), maximum rated junction temperature die, RJA, thermal resistance from device junction ambient, operating ambient temperature, Using values provided data sheet, calculated follows: Board Material 0.0625 G-10/FR-4, Copper Watts 25°C 1.25 Watts* Watts *Mounted DPAK footprint AREA (SQUARE INCHES) TJ(max) THERMAL RESISTANCE, JUNCTION AMBIENT (°C/W) values equation found maximum ratings table data sheet. Substituting these values into equation ambient temperature 25°C, calculate power dissipation device. example, SOT-223 device, calculated follows. 150°C 25°C 156°C/W milliwatts Figure Thermal Resistance versus Drain Area SOT-223 Package (Typical) 1.75 Watts 25°C Board Material 0.0625 G-10/FR-4, Copper THERMAL RESISTANCE, JUNCTION AMBIENT (°C/W) 156°C/W SOT-223 package assumes recommended footprint glass epoxy printed circuit board achieve power dissipation milliwatts. There other alternatives achieving higher power dissipation from surface mount packages. increase area drain/collector pad. increasing area drain/collector pad, power dissipation increased. Although power dissipation almost doubled with this method, area taken printed circuit board which defeat purpose using surface mount technology. example, graph versus drain area shown Figures Another alternative would ceramic substrate aluminum core board such Thermal CladTM. Using board material such Thermal Clad, aluminum core board, power dissipation doubled using same footprint. Watts Watts Figure Thermal Resistance versus Drain Area DPAK Package (Typical) Board Material 0.0625 G-10/FR-4, Copper Watts Watts Watts 25°C AREA (SQUARE INCHES) AREA (SQUARE INCHES) Figure Thermal Resistance versus Drain Area D2PAK Package (Typical) http://onsemi.com SOLDERRM SOLDER STENCIL GUIDELINES Prior placing surface mount components onto printed circuit board, solder paste must applied pads. Solder stencils used screen optimum amount. These stencils typically 0.008 inches thick made brass stainless steel. packages such SC-59, SC-70/SOT-323, SOD-123, SOT-23, SOT-143, SOT-223, SO-8, SO-14, SO-16, SMB/SMC diode packages, stencil opening should same size registration. This case with DPAK D2PAK packages. opening used screen solder onto drain pad, misalignment and/or "tombstoning" occur excess solder. these packages, opening stencil paste should approximately area. opening leads still registration. Figure shows typical stencil DPAK D2PAK packages. pattern opening stencil drain critical long allows approximately covered with paste. Figure Typical Stencil DPAK D2PAK Packages SOLDERING PRECAUTIONS melting temperature solder higher than rated temperature device. When entire device heated high temperature, failure complete soldering within short time could result device failure. Therefore, following items should always observed order minimize thermal stress which devices subjected. Always preheat device. delta temperature between preheat soldering should 100°C less.* When preheating soldering, temperature leads case must exceed maximum temperature ratings shown data sheet. When using infrared heating with reflow soldering method, difference should maximum 10°C. soldering temperature time should exceed 260°C more than seconds. When shifting from preheating soldering, maximum temperature gradient shall less. After soldering been completed, device should allowed cool naturally least three minutes. Gradual cooling should used since forced cooling will increase temperature gradient will result latent failure mechanical stress. Mechanical stress shock should applied during cooling. Soldering device without preheating cause excessive thermal shock stress which result damage device. shadowing inability wave height incorporate other surface mount components, D2PAK recommended wave soldering. http://onsemi.com SOLDER PASTE OPENINGS STENCIL SOLDERRM TYPICAL SOLDER HEATING PROFILE given circuit board, there will group control settings that will give desired heat pattern. operator must temperatures several heating zones figure belt speed. Taken together, these control settings make heating "profile" that particular circuit board. machines controlled computer, computer remembers these profiles from operating session next. Figure shows typical heating profile when soldering surface mount device printed circuit board. This profile will vary among soldering systems, good starting point. Factors that affect profile include type soldering system use, density types components board, type solder used, type board substrate material being used. This profile shows temperature versus time. line graph shows actual temperature that might experienced surface test board near central solder joint. profiles based high density density board. Vitronics SMD310 convection/infrared reflow soldering system used generate this profile. type solder used 62/36/2 Lead Silver with melting point between 177-189°C. When this type furnace used solder reflow work, circuit boards solder joints tend heat first. components board then heated conduction. circuit board, because large surface area, absorbs thermal energy more efficiently, then distributes this energy components. Because this effect, main body component degrees cooler than adjacent solder joints. STEP PREHEAT ZONE "RAMP" 200°C STEP STEP VENT HEATING "SOAK" ZONES "RAMP" STEP HEATING ZONES "SOAK" DESIRED CURVE HIGH MASS ASSEMBLIES 150°C 160°C STEP STEP STEP HEATING VENT COOLING ZONES 205° 219°C "SPIKE" PEAK 170°C SOLDER JOINT 150°C 100°C 100°C DESIRED CURVE MASS ASSEMBLIES 140°C SOLDER LIQUID SECONDS (DEPENDING MASS ASSEMBLY) TIME MINUTES TOTAL) TMAX Figure Typical Lead (SnPb) Solder Heating Profile http://onsemi.com SOLDERRM RAMP-UP Tsmax Critical Zone TEMPERATURE Tsmin Preheat RAMP-DOWN 25°C Peak TIME Figure Typical Pb-Free Solder Heating Profile Profile Feature Average Ramp-Up Rate (Tsmax Preheat Temperature (Tsmin) Temperature (Tsmax) Time (tsmin tsmax) Time maintained above Temperature (TT) Time (tT) Peak Classification Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-Down Rate Time 25°C Peak Temperature Pb-Free Assembly 3°C/second 150°C 200°C 60-180 seconds 217°C 60-150 seconds 260°C +5/-0 20-40 seconds 6°C/second minutes http://onsemi.com SOLDERRM Footprints Soldering 0.635 0.025 0.762 0.030 0.0787 2.54 0.100 1.27 0.050 0.0787 SCALE 10:1 inches SCALE inches 2.67 0.105 0.157 POWERMITE) 2.261 0.089 4.343 0.171 3.810 0.150 2.743 0.108 2.159 0.085 SCALE inches 2.794 0.110 SCALE inches 0.91 0.036 1.22 0.048 0.63 0.025 0.83 0.033 1.60 0.063 2.85 0.112 2.36 0.093 4.19 0.165 SCALE 10:1 SOD-123 inches SCALE 10:1 inches SOD-323 http://onsemi.com SOLDERRM Footprints Soldering (continued) 1.40 0.0547 0.40 0.0157 0.40 0.0157 SCALE 10:1 inches 0.043 0.45 0.0177 0.50 0.0197 SCALE 10:1 inches SOD-523 SOD-723 0.95 0.037 0.95 0.037 0.65 0.025 0.65 0.025 0.094 0.039 0.031 SCALE 10:1 inches 0.075 0.035 0.028 SCALE 10:1 inches SC-59 SC-70/SOT-323 0.356 0.014 0.95 0.037 0.95 0.037 1.803 0.071 0.787 0.031 0.035 1.000 0.039 SCALE 10:1 inches 0.079 0.508 0.020 0.031 SCALE 10:1 inches SC-75/SC-89/SOT-416 SOT-23 http://onsemi.com SOLDERRM Footprints Soldering (continued) 0.40 0.0157 0.40 0.0157 0.039 0.40 0.0157 0.25 0.90 0.40 0.0157 SCALE 20:1 inches 0.35 0.30 0.40 DIMENSIONS: MILLIMETERS 0.40 0.0157 SOT-723 SOT-1123 6.20 0.244 2.58 0.101 5.80 0.228 0.118 8.38 0.33 0.063 6.172 0.243 10.66 0.42 1.016 0.04 5.08 0.20 SCALE inches 17.02 0.67 3.05 0.12 inches SCALE DPAK D2PAK 1.30 0.512 1.300 0.400 0.600 0.250 0.65 0.026 1.100 0.300 0.90 0.035 1.90 0.95 0.075 0.037 0.400 1.600 0.275 0.70 0.028 SCALE 10:1 inches DIMENSIONS: MILLIMETERS WDFN3 SC-82AB http://onsemi.com SOLDERRM Footprints Soldering (continued) 0.15 0.079 0.0394 0.0118 0.45 0.0177 1.35 0.0531 0.091 0.091 0.248 0.079 0.059 SCALE inches 0.0197 0.0197 SCALE 20:1 inches SOT-223 SOT-553 0.50 0.0197 0.35 0.014 0.35 0.014 0.65 0.025 0.65 0.025 0.90 0.0354 0.20 0.08 0.40 0.0157 0.0748 SCALE 20:1 inches 0.20 0.08 SCALE 20:1 inches SC-88A/SC70-5/SOT-353 SOT-953 0.95 0.037 0.074 8.38 0.33 1.702 0.067 10.66 0.42 1.016 0.04 0.094 0.039 0.028 inches 16.02 0.63 3.05 0.12 SCALE 10:1 SCALE inches THIN SOT23-5/TSOP-5/SC59-5 5-LEAD D2PAK http://onsemi.com SOLDERRM Footprints Soldering (continued) 0.252 0.500 0.0197 0.086 0.228 0.34 5.36 0.013 0.217 0.500 0.0197 10.6 0.417 0.031 SCALE inches 0.0394 0.250 0.275 0.0098 0.0108 SCALE 20:1 inches 5-LEAD DPAK CENTRAL LEAD CROP 0.50 0.0197 FLIP-CHIP (1.00 1.50 Pitch) 0.094 0.65 0.025 0.65 0.025 0.028 0.074 0.95 0.037 0.95 0.037 0.40 0.0157 0.0748 0.039 inches SCALE 10:1 inches SCALE 20:1 SC-88/SC70-6/SOT-363 SC-74/SC-74R 0.0118 0.45 0.0177 1.35 0.0531 0.0394 0.35 0.014 0.35 0.014 0.90 0.0354 0.20 0.08 0.0197 0.0197 SCALE 20:1 inches 0.20 0.08 SCALE 20:1 inches SOT-563 SOT-963 http://onsemi.com SOLDERRM Footprints Soldering (continued) 0.094 1.299 0.0511 0.575 0.0226 0.075 0.95 0.037 0.95 0.037 0.028 0.039 SCALE 10:1 inches 0.650 0.0256 0.324 0.0128 1.124 0.0443 0.400 0.0157 PITCH 1.212 0.0477 inches TSOP-6 UDFN6/WDFN6, 0.770 0.0303 0.200 0.0079 0.475 0.0187 0.325 0.0128 0.650 0.0256 PITCH 0.50 0.020 0.65 0.025 0.40 0.016 0.50 0.020 0.65 0.025 inches 0.770 0.0303 2.300 0.0906 1.100 0.0433 inches 0.075 SCALE 10:1 DFN6, 2.45 0.964 DFN6, Exposed Defined 0.450 0.0177 0.950 0.0374 3.31 0.130 0.63 0.025 DFN6, Single Flag 0.65 0.025 1.700 0.685 3.31 0.130 1.700 0.685 0.35 0.014 inches 0.63 0.025 2.60 0.1023 SCALE 10:1 SCALE 10:1 inches DFN6, Single Flag http://onsemi.com SOLDERRM Footprints Soldering (continued) 0.450 0.0177 0.850 0.0334 0.950 0.0374 3.31 0.130 1.700 0.685 1.50 5.06 0.63 0.025 1.20 0.0472 0.35 0.014 SCALE 10:1 inches 2.54 PITCH 1.50 DIMENSION: MILLIMETERS DFN6, Dual Flag CLCC-6, 0.374 1.27 0.050 3.25 0.128 8.89 0.350 2.16 0.085 1.27 0.050 11.43 0.450 0.76 0.030 3.27 0.129 SCALE inches 10.54 0.415 0.150 0.96 0.038 SCALE inches 15.46 0.609 8.26 0.325 7-LEAD D2PAK 7-LEAD D2PAK, SHORT LEAD 1.04 0.041 0.38 0.015 2.75 3.20 0.126 4.24 0.167 5.28 0.208 1.23 1.50 3.60 0.40 0.58 0.65 PITCH DIMENSIONS: MILLIMETERS 0.33 0.65 0.0256 SCALE inches Micro8E Micro8 Leadless http://onsemi.com SOLDERRM Footprints Soldering (continued) 2.72 0.107 1.52 0.060 1.52 0.060 Exposed 0.275 0.155 0.275 2.03 0.08 0.155 0.024 1.270 0.050 SCALE inches 0.024 1.270 0.050 SO-8 SO-8 Exposed SCALE inches 1.270 0.750 1.000 0.490 0.0193 0.924 0.0364 0.965 1.330 0.495 3.200 0.475 0.905 4.530 0.200 0.0079 0.400 0.0157 PITCH DIMENSIONS: MILLIMETERS 0.902 0.0355 1.530 4.560 0.502 0.0197 SCALE 20:1 inches SO8FL (DFN6), DFN8/UDFN8, 0.22 0.66 0.575 0.0226 0.250 0.0098 1.150 0.0453 1.50 0.32 0.40 PITCH DIMENSIONS: MILLIMETERS 0.300 0.0118 0.500 0.0197 PITCH 1.350 0.0531 0.700 0.0276 SCALE 15:1 inches UDFN8, DFN8, http://onsemi.com SOLDERRM Footprints Soldering (continued) 2.15 0.48 0.25 1.28 2.55 1.60 0.50 PITCH 1.10 1.80 0.80 DIMENSIONS: MILLIMETERS DIMENSIONS: MILLIMETERS UDFN8, DFN8, 4.30 2.21 2.39 4.20 0.63 0.71 0.40 3.20 0.80 PITCH 6.30 0.35 0.95 2.75 0.64 1.27 PITCH DIMENSIONS: MILLIMETERS DIMENSIONS: MILLIMETERS DFN8, DFN8, 0.15 0.50 0.0197 0.07 0.30 0.012 0.0394 SCALE inches 0.50 0.0197 SIZE VARY 0.265 0.01 SCALE 20:1 8-Bump (Flip-Chip) http://onsemi.com 3.30 0.35 1.15 0.65 PITCH 0.52 0.50 0.0197 inches SOLDERRM Footprints Soldering (continued) 0.50 0.0197 1.04 0.041 0.32 0.0126 0.50 0.0197 3.20 0.126 4.24 0.167 5.28 0.208 0.265 0.01 SCALE 20:1 inches 9-Bump (1.550 1.550 0.50 0.0196 SCALE inches Micro10 1.700 0.0669 0.663 0.0261 0.200 0.0079 0.225 0.0089 2.50 0.95 0.58 1.700 0.0669 0.400 0.0157 PITCH 1.13 0.30 0.50 PITCH 0.05 0.225 0.0089 SCALE 20:1 inches 0.73 DIMENSIONS: MILLIMETERS UQFN10/WQFN10, WDFN10, 3.31 0.130 1.65 0.065 2.6016 0.500 0.0196 0.280 0.011 2.1746 2.50 0.098 1.8508 3.3048 0.630 0.025 SCALE 10:1 0.5651 inches 0.3008 0.5000 PITCH DIMENSIONS: MILLIMETERS DFN10, UDFN10 http://onsemi.com SOLDERRM Footprints Soldering (continued) 2.00 2.50 1.25 0.85 0.40 PITCH 3.30 1.70 2.30 0.22 0.32 0.69 DIMENSIONS: MILLIMETERS 0.55 0.20 0.40 PITCH DIMENSIONS: MILLIMETERS UQFN12, DFN12, 3.30 1.75 0.55 2.352 0.093 0.30 0.351 0.014 3.35 0.50 PITCH 0.265 0.01 DIMENSIONS: MILLIMETERS 0.479 0.019 SCALE 16:1 inches WDFN12, DFN12 7.04 9.305 5.652 1.054 1.52 0.551 0.58 7.652 1.270 PITCH 1.27 PITCH DIMENSIONS: MILLIMETERS DIMENSIONS: MILLIMETERS PLLP-12 SOIC-14 http://onsemi.com SOLDERRM Footprints Soldering (continued) 0.562 0.0221 7.06 2.900 0.1142 0.65 PITCH 0.463 0.0182 1.200 0.0472 2.100 0.0827 SCALE 20:1 inches 0.400 0.0157 0.225 0.0089 0.36 1.26 DIMENSIONS: MILLIMETERS TSSOP-14 UQFN16/WQFN16, 0.575 0.022 3.25 0.128 0.30 0.012 4.30 EXPOSED 0.40 0.50 3.25 0.128 1.50 0.059 2.80 4.30 0.65 0.50 0.02 0.30 0.012 SCALE 10:1 inches PITCH 2.80 DIMENSIONS: MILLIMETERS QFN-16, QFN16, 0.350 0.175 1.12 0.200 1.27 PITCH 0.074 0.050 6.40 Exposed 0.58 0.188 0.376 DIMENSIONS: MILLIMETERS 0.024 0.145 DIMENSIONS: INCHES SOIC-16 SOIC16-EP http://onsemi.com SOLDERRM Footprints Soldering (continued) 7.06 4.10 0.50 PITCH 0.50 1.91 0.65 PITCH 0.28 0.51 DIMENSIONS: MILLIMETERS 0.36 1.26 DIMENSIONS: MILLIMETERS DFN16 7.06 TSSOP-16 0.22 0.78 2.30 0.65 PITCH 0.88 0.40 PITCH DIMENSIONS: MILLIMETERS 0.36 1.26 DIMENSIONS: MILLIMETERS TSSOP-20 4.05 UDFN20, 4.300 0.169 0.980 0.039 0.25 0.80 PITCH 2.63 1.95 0.45 0.35 0.80 PITCH 1.20 0.35 5.770 0.227 3.10 4.60 3.130 0.123 0.340 0.013 0.35 2.10 3.70 DIMENSIONS: MILLIMETERS 0.500 0.020 0.280 0.011 SCALE LLGA-20, DFN22, inches http://onsemi.com SOLDERRM Footprints Soldering (continued) 5.30 0.40 PITCH 0.63 0.63 3.20 0.30 2.94 3.20 5.30 0.20 4.60 DIMENSIONS: MILLIMETERS 0.28 0.50 PITCH DIMENSIONS: MILLIMETERS TLLGA32, 2.032 0.08 QFN32, 2.362 0.093 0.635 0.025 PITCH 0.457 0.018 0.66 0.026 Basic ChipFET inches http://onsemi.com SOLDERRM Footprints Soldering (continued) 2.032 0.08 0.457 0.018 2.032 0.08 2.362 0.093 1.727 0.068 1.092 0.043 2.362 0.093 0.635 0.025 PITCH 0.457 0.018 0.66 0.026 0.66 0.026 inches 1.118 0.044 inches Styles Style 2.032 0.08 0.66 0.026 2.032 0.08 1.092 0.043 2.362 0.093 2.362 0.093 1.092 0.043 0.66 0.026 0.635 0.025 PITCH 0.635 0.025 PITCH 0.457 0.018 1.118 0.044 1.118 0.044 inches 0.457 0.018 Style Style inches ChipFET (continued) http://onsemi.com SOLDERRM AND8211/D Board Level Application Notes Packages Prepared Steve Germain Semiconductor http://onsemi.com APPLICATION NOTE INTRODUCTION Various Semiconductor components packaged advanced Dual Quad Flat-Pack No-Lead package (DFN/QFN). DFN/QFN platform represents latest surface mount packaging technology, important that design Mounting Pads Printed Circuit Board (PCB), Soldermask Stencil pattern, along with assembly process, follow suggested guidelines outlined this document. DFN/QFN Package Overview DFN/QFN platform offers versatility which allows either single multiple semiconductor devices connected together within leadless package. This packaging flexibility illustrated Figure where four devices packaged together with custom configuration. Figure Underside Single-Chip Package Wirebond Leadframe Figure Cross-Section Single-Chip Package Figure Underside 4-Chip Package Figure illustrates single site semiconductor device package which allows large device. Figure illustrates package height reduced minimum having both wirebond pads same plane. When mounted, leads directly attached board without space-consuming standoff, which inherent leaded package. Figure also illustrates ends leads flush with edge package. This configuration allows maximum size within given footprint, while maximizing board space efficiency. addition these features, DFN/QFN package excellent thermal dissipation reduced electrical parasitics efficient compact design. http://onsemi.com SOLDERRM Printed Circuit Board Solder Design Guidelines Refer case outline (specification sheet) drawing specific DFN/QFN package mounted. Based nominal package footprint dimensions from case drawing. mounting pads need larger than nominal package footprint (see Figure 10). Note: occasion that there enough room grow mounting pads these guidelines, recommendation would come close these guidelines possible. 0.0127-0.0254 (0.0005-0.001) 0.0508-0.0762 (0.002-0.003) their titles describe, NSMD contact pads have solder mask pulled away from solderable metallization, while pads have solder mask over edge metallization, shown Figure With Pads, solder mask restricts flow solder paste metallization which prevents solder from flowing along side metal pad. This different from NSMD configuration where solder will flow around both sides metallization. Typically, NSMD pads preferred over configuration since defining location size copper easier control than solder mask. This based fact that copper etching process capable tighter tolerance than solder masking process. This also allows visual inspection solder fillet. addition, pads will inherently create stress concentration point where solder wets lead. This stress concentration point reduced when solder allowed flow down sides leads NSMD configuration. Printed Circuit Board Solder Mask Design Guidelines When dimensionally possible, solder mask should located within range 0.0762-0.1270 (0.003-0.005 away from edge mounting (see Figure 12). This spacing used compensate registration tolerances solder mask, well insure that solder inhibited mask reflows along sides metal pad. solder mask (between openings) controlling factor pattern, needs held minimum 0.1016 (0.004 in). This minimum current suppliers standard minimum manufacturability. Because this restriction, solder mask openings around pads need less than recommended shown. Whenever possible, keeping range given will provide best results. Mounting Pads 0.0762-0.1270 (0.003-0.005) around larger than mounting pads 0.1524 (0.006) 0.0762 (0.003) Device Footprint Nominal Device Footprint Mounting Pads Figure Package Footprint Shown with Mounting Pads Printed Circuit Board Solder Mask Design Guidelines NSMD Configurations There different types configurations commonly used surface mount leadless DFN/QFN style packages. different configurations are: Solder Masked Defined (NSMD) Solder Masked Defined (SMD) Solder Mask Opening 0.1016 (0.004) Minimum Soldermask Solderable Soldermask Openings shown with Mounting Pads Soldermask Openings Mounting Pads NSMD 0.1016 Minimum (0.004) Soldermask Solder Mask Overlay Figure Comparison NSMD Pads Figure Typical Package Mounting Pads Shown with Soldermask Openings http://onsemi.com SOLDERRM DFN/QFN Board Mounting Process DFN/QFN board mounting process optimized first defining controlling following. Solderable metallization contacts. Choice proper solder paste. Solder paste PCB. Package placement. Reflow solder paste. Final solder joint inspection. Recommendations each these processes located below. Solderable Metallization Solder Screening onto There currently three common solderable coatings which used surface mount devices. case, imperative that coating uniform, conforming, free impurities insure consistant solderable system. first coating consists Organic Solderability Protectant (OSP) applied over bare copper feature. coating assists reducing oxidation order preserve copper metallization soldering. allows multiple passes through reflow ovens without degradation solderability. coating dissolved flux when solder paste applied metal features. Coating thickness recommended manufacturers between 0.25 0.35 microns. second coating metalized coating which consists plated electroless nickel over copper pad, followed coat immersion gold. thickness electroless nickel layer determined allowable internal material stresses temperature excursions board will subjected throughout lifetime. Even though gold metallization typically self-limiting process, thickness should least 0.05 thick, consist more than overall solder volume. Having excessive gold solder joint create gold embitterment which affect reliability joint. third tin-lead coating, commonly called Solder Level (HASL).This type finish recommended DFN/QFN type packages. major issue inability consistently control amount solder coating applied each pad. This results dome-shaped pads various heights. industry drives finer finer pitch, solder bridging becomes common problem between mounting pads. Solder Type Stencil screening solder paste onto commonly used industry. recommended stencil thickness used 0.075 0.127 (0.003 0.005 in). sidewalls stencil openings should tapered approximately facilitate release paste when stencil removed from PCB. stencil opening should same size mounting pad. exception when there large center flag device. Then stencil opening should allow 70-80% coverage mounting pad. This opening should also divided into smaller cavities flow solder during reflow process (see Figure 13). Dividing larger pads into smaller screen openings reduces risk solder voiding allows solder joints smaller terminal pads same height larger ones. Center Mounting Same Size Mounting Package Outline Stencil Pattern Over Mounting Pads Package Outline Center Mounting Pads Stencil Opening 70-80% center mounting broken into smaller openings Figure Typical Package with Stencil Openings Shown Over Mounting Pads Package Placement onto Pick place equipment with standard tolerance "0.05 (0.002 better recommended. package will tend center itself correct slight placement errors during reflow process surface tension solder. Solder Reflow Solder paste such Cookson Electronics' WS3060 with Type smaller sphere size recommended. WS3060 water-soluble flux cleaning. Cookson Electronics' PNC0106A used no-clean flux preferred. Once package placed board along with solder paste, standard surface mount reflow process used mount part. Figures examples standard reflow profiles standard eutectic lead free solder alloys. http://onsemi.com SOLDERRM exact profile will determined, available, manufacture paste since chemistry viscosity flux matrix will vary. These variations will require small changes profile order achieve optimized process. Less than 2°C/sec Soak Zone Time Above Liquidus Temperature (°C) Peak 225°C required, removal residual solder flux completed using recommended procedures forth flux manufacturer. Final Solder Inspection inspection solder joints commonly performed with X-ray inspection system. With this tool, locate defects such shorts between pads, open contacts, voids within solder well extraneous solder. addition searching defects, mounted device should rotated side inspect sides solder joints with X-ray inspection system. solder joints should have enough solder volume with proper stand-off height that "Hour Glass" shaped connection formed shown below Figure "Hour Glass" solder joints reliability concern must avoided. Preferred Solder Joint Undesirable "Hour Glass'' Solder Joint Time (sec) Figure Typical Reflow Profile Eutectic Tin/Lead Solder Less than °C/sec Time (sec) Soak Zone 60-180 Time above liquidus 60-150 Temperature (°C) Peak 260°C Figure Side View Illustrating Preferred Undesirable Solder Joints Figure Typical Reflow Profile Pb-Free Solder general, temperature part should raised more than 2°C/sec during initial stages reflow profile. soak zone then occurs when part approximately 150°C should last seconds Pb-free profiles (30-120 Eutectic profiles). Typically, extending time soak zone will reduce risk voiding within solder. temperature then raised will above liquidus solder seconds Pb-free profiles (30-100 Eutectic profiles) depending mass board. peak temperature profile should between 260°C Pb-free solder alloys (205-225°C) eutectic solders. Rework Procedure fact that DFN/QFN's leadless devices, entire package must removed from board there issue with solder joints. important minimize chance overheating neighboring devices during removal package since devices typically close proximity with each other. Standard rework systems recommended this procedure since airflow temperature gradients carefully controlled. also recommend that board placed oven 125°C four eight hours prior heating parts remove excess moisture from packages. order control region which will exposed reflow temperatures, board should heated 100_C conduction through backside board location device. Typically, heating nozzles then used increase temperature locally. Once device's solder joints heated above their liquidus temperature, package quickly removed pads board cleaned. cleaning pads typically performed with blade-style conductive tool with desoldering braid. clean flux used during this process order simplify procedure. http://onsemi.com SOLDERRM Solder paste then deposited screened onto site preparation mounting device. close proximity neighboring packages most board configurations, miniature stencil individual component typically required. same stencil design that originally used mount package applied mini-stencil redressing pads. small configurations DFN/QFN, since pads underside package, manual pick place procedure without magnification recommended. dual image optical system where underside package aligned board should used instead. Reflowing component onto board accomplished either passing board through original reflow profile, selectively heating package with same process that used remove benefit with subjecting entire board second reflow that part will mounted consistently profile that already defined. disadvantage that other devices mounted with same solder type will reflowed second time. subjecting parts second reflow either concern unacceptable specific application, than localized reflow option would recommended procedure. http://onsemi.com SOLDERRM AN1040/D Mounting Considerations Power Semiconductors Prepared Bill Roehr http://onsemi.com INTRODUCTION Current power ratings semiconductors inseparably linked their thermal environment. Except lead-mounted parts used currents, heat exchanger required prevent junction temperature from exceeding rated limit, thereby running risk high failure rate. Furthermore, semiconductor industry's field history indicated that failure rate most silicon semiconductors decreases approximately one-half decrease junction temperature from 160°C 135°C.(1) Guidelines designers military power supplies impose 110°C limit upon junction temperature.(2) Proper mounting minimizes temperature gradient between semiconductor case heat exchanger. Most early life field failures power semiconductors traced faulty mounting procedures. With metal packaged devices, faulty mounting generally causes unnecessarily high junction temperature, resulting reduced component lifetime, although mechanical damage occurred occasion from improperly mounting warped surface. With widespread various plastic-packaged semiconductors, prospect mechanical damage very significant. Mechanical damage impair case moisture resistance crack semiconductor die. Figure shows example doing nearly everything wrong. mount TO-220 package shown being used replacement TO-213AA (TO-66) part which socket mounted. socket, leads bent operation which, properly done, crack package, break internal bonding wires, crack die. package fastened with sheet-metal screw through hole containing fiber-insulating sleeve. force used tighten screw tends pull package into hole, possibly causing enough distortion crack die. addition contact area small because area consumed large hole bowing package; result much higher junction temperature than expected. rough heatsink surface and/or burrs around hole were displayed illustration, most poor mounting practices would covered. APPLICATION NOTE PLASTIC BODY LEADS PACKAGE HEATSINK MICA WASHER EQUIPMENT HEATSINK SOCKET TO-213AA PACKAGE SHEET METAL SCREW SPEED (PART SOCKET) Figure Extreme Case Improperly Mounting Semiconductor (Distortion Exaggerated) many situations case semiconductor must electrically isolated from mounting surface. isolation material some extent, thermal isolator well, which raises junction operating temperatures. addition, possibility arc-over problems introduced high voltages present. Various regulating agencies also impose creepage distance specifications which further complicates design. Electrical isolation thus places additional demands upon mounting procedure. Proper mounting procedures usually necessitate orderly attention following: Preparing mounting surface Applying thermal grease required) Installing insulator electrical isolation desired) Fastening assembly Connecting terminals circuit http://onsemi.com SOLDERRM this note, mounting procedures discussed general terms several generic classes packages. newer packages developed, probable that they will into generic classes discussed this note. Unique requirements given data sheets pertaining particular package. following classes defined: Stud Mount Flange Mount Pressfit Plastic Body Mount Mount Surface Mount Appendix contains brief review thermal resistance concepts. Appendix discusses measurement difficulties with interface thermal resistance tests. Appendix indicates type accessories supplied number manufacturers. MOUNTING SURFACE PREPARATION general, heatsink mounting surface should have flatness finish comparable that semiconductor package. lower power applications, heatsink surface satisfactory appears flat against straight edge free from deep scratches. high-power applications, more detailed examination surface required. Mounting holes surface treatment must also considered. Surface Flatness Mounting Holes Surface flatness determined comparing variance height test specimen that reference standard indicated Figure Flatness normally specified fraction Total Indicator Reading (TIR). mounting surface flatness, i.e., h/TlR, less than mils inch, normal extruded aluminum, satisfactory most cases. Surface Finish Mounting holes generally should only large enough allow clearance fastener. larger thick flange type packages having mounting holes removed from semiconductor location, such TO-3, successfully used with larger holes accommodate insulating bushing, many plastic encapsulated packages intolerant this condition. these packages, smaller screw size must used such that hole bushing does exceed hole package. Punched mounting holes have been source trouble because properly done, area around punched hole depressed process. This "crater" heatsink around mounting hole cause problems. device damaged distortion package mounting pressure attempts conform shape heatsink indentation, device only bridge crater leave significant percentage heat-dissipating surface contact with heatsink. first effect often detected immediately visual cracks package plastic), usually unnatural stress imposed, which results early-life failure. second effect results hotter operation manifested until much later. Although punched holes seldom acceptable relatively thick material used extruded aluminum heatsinks, several manufacturers capable properly utilizing capabilities inherent both fine-edge blanking sheared-through holes when applied sheet metal commonly used stamped heatsinks. holes pierced using Class progressive dies mounted four-post sets equipped with proper pressure pads holding fixtures. TOTAL INDICATOR READING REFERENCE PIECE http://onsemi.com DEVICE MOUNTING AREA Surface finish average deviations both above below mean value surface height. minimum interface resistance, finish range microinches satisfactory; finer finish costly achieve does significantly lower contact resistance. Tests conducted Thermalloy, Inc., using copper TO-204 (TO-3) package with typical 32-microinch finish, showed that heatsink finishes between caused less than 2.5% difference interface thermal resistance when voids scratches were filled with thermal joint compound.(3) Most commercially available cast extruded heatsinks will require spotfacing when used high-power applications. general, milled machined surfaces satisfactory prepared with tools good working condition. SAMPLE PIECE Figure Surface Flatness Measurement SOLDERRM When mounting holes drilled, general practice with extruded aluminum, surface cleanup important. Chamfers must avoided because they reduce heat transfer surface increase mounting stress. However, edges must broken remove burrs which cause poor contact between device heatsink puncture isolation material. Surface Treatment avoid using grease, manufacturers have developed conductive insulating pads replace more traditional materials. These pads conformal therefore partially fill voids when under pressure. Thermal Compounds (Grease) Many aluminum heatsinks black-anodized improve radiation ability prevent corrosion. Anodizing results significant electrical negligible thermal insulation. need only removed from mounting area when electrical contact required. Heatsinks also available which have nickel plated copper insert under semiconductor mounting area. treatment this surface necessary. Another treated aluminum finish iridite, chromateacid dip, which offers resistance because thin surface, good electrical properties because resists oxidation. need only cleaned oils films that collect manufacture storage sinks, practice which should applied heatsinks. economy, paint sometimes used sinks; removal paint where semiconductor attached usually required because paint's high thermal resistance. However, when necessary insulate semiconductor package from heatsink, hard anodized painted surfaces allow easy installation voltage applications. Some manufacturers will provide anodized painted surfaces meeting specific insulation voltage requirements, usually volts. also necessary that surface free from foreign material, film, oxide (freshly bared aluminum forms oxide layer seconds). Immediately prior assembly, good practice polish mounting area with steel wool, followed acetone alcohol rinse. INTERFACE DECISIONS When significant amount power being dissipated, something must done fill voids between mating surfaces thermal path. Otherwise interface thermal resistance will unnecessarily high quite dependent upon surface finishes. several years, thermal joint compounds, often called grease, have been used interface. They have resistivity approximately 60°C/W/in whereas 1200°C/W/in. Since surfaces highly pock-marked with minute voids, compound makes significant reduction interface thermal resistance joint. However, grease causes number problems, discussed following section. Joint compounds formulation fine zinc other conductive particles silicone other synthetic base fluid which maintains grease-like consistency with time temperature. Since some these compounds spread well, they should evenly applied very thin layer using spatula lintless brush, wiped lightly remove excess material. Some cyclic rotation package will help compound spread evenly over entire contact area. Some experimentation necessary determine correct quantity; little will fill voids, while much permit some compound remain between well mated metal surfaces where will substantially increase thermal resistance joint. determine correct amount, several semiconductor samples heatsinks should assembled with different amounts grease applied evenly side each mating surface. When amount correct very small amount grease should appear around perimeter each mating surface assembly slowly torqued recommended value. Examination dismantled assembly should reveal even wetting across each mating surface. production, assemblers should trained slowly apply specified torque even though excessive amount grease appears edges mating surfaces. Insufficient torque causes significant increase thermal resistance interface. prevent accumulation airborne particulate matter, excess compound should wiped away using cloth moistened with acetone alcohol. These solvents should contact plastic-encapsulated devices, they enter package cause leakage path carry substances which might attack semiconductor chip. silicone used most greases been found evaporate from surfaces with time become deposited other cooler surfaces. Consequently, manufacturers must determine whether microscopically thin coating silicone entire assembly will pose problems. necessary enclose components using grease. newer synthetic base greases show less tendency migrate creep than those made with silicone base. However, their currently observed working temperature range less, they slightly poorer thermal conductivity dielectric strength their cost higher. http://onsemi.com SOLDERRM Data showing effect compounds several package types under different mounting conditions shown Figure rougher surface, more valuable grease becomes lowering contact resistance; therefore, when mica insulating washers used, grease generally mandatory. joint compound also improves breakdown rating insulator. Conductive Pads Because difficulty assembly using grease evaporation problem, some equipment manufacturers will not, cannot, grease. minimize need grease, several vendors offer conductive pads which approximate performance obtained with grease. Data greased bare joint joint using Grafoil®, graphite compound, shown data Figure through Figure Grafoil claimed replacement grease when electrical isolation required; data indicates does indeed perform well grease. Another conductive available from Aavid called Kon-Duxt. made with unique, grain oriented, flake-like structure (patent pending). Highly compressible, becomes formed surface roughness both heatsink semiconductor. Manufacturer's data shows provide interface thermal resistance better than metal interface with filled silicone grease. Similar conductive pads available from other manufacturers. They fairly recent development; long term problems, they exist, have become evident. Table Approximate Values Interface Thermal Resistance Data from Measurements Performed Semiconductor Applications Engineering Laboratory interface values subject wide variation because extreme dependence upon surface conditions. Unless otherwise noted case temperature monitored thermocouple located directly under reached through hole heatsink. (See Appendix discussion Interface Thermal Resistance Measurements.) Interface Thermal Resistance (°C/W) Package Type Data JEDEC Outlines DO-203AA, TO-210AA TO-208AB DO-203AB, TO-210AC TO-208 DO-208AA TO-204AA (TO-3) TO-213AA (TO-66) TO-126 TO-220AB Description 10-32 Stud 7/16 1/4-28 Stud 11/16 Pressfit, Diamond Flange Diamond Flange Thermopad Thermowatt Test Torque In-Lb Metal-to-Metal 0.15 Lubed With Insulator Lubed 0.36 Type Mica Mica Mica Mica Mica Mica Note NOTES: Figure through Figure additional data TO-3 TO-220 packages. Screw insulated. Figure INSULATION CONSIDERATIONS Since most power semiconductors vertical device construction common manufacture power semiconductors with output electrode (anode, collector drain) electrically common case; problem isolating this terminal from ground common one. lowest overall thermal resistance, which quite important when high power must dissipated, best isolate entire heatsink/semiconductor structure from ground, rather than insulator between semiconductor heatsink. Heatsink isolation always possible, however, because requirements, safety reasons, instances where chassis serves heatsink where heatsink common several isolated packages. these situations insulators used isolate individual components from heatsink. Newer packages, such Semiconductor FULLPAKt modules, contain electrical isolation material within, thereby saving equipment manufacturer burden addressing isolation problem. Insulator Thermal Resistance When insulator used, thermal grease greater importance than with metal-to-metal contact, because interfaces exist instead some materials, such mica, have hard, markedly uneven surface. With many isolation materials reduction interface thermal resistance between typical when grease used. http://onsemi.com SOLDERRM Data obtained Thermalloy, showing interface resistance different insulators torques applied TO-204 (TO-3) TO-220 packages, shown Figure through Figure bare greased surfaces. Similar materials those shown available from several manufacturers. obvious that with some arrangements, interface thermal resistance exceeds that semiconductor (junction case). Referring Figure through Figure conclude that when high power handled, beryllium oxide unquestionably best. However, expensive choice. should abraded, dust THERMAL RESISTANCE FROM TRANSISTOR CASE MOUNTING SURFACE, C/WATT) Thermafilm, .002 (.05) thick. Mica, .003 (.08) thick. Mica, .002 (.05) thick. Hard anodized, .020 (.51) thick. Aluminum oxide, .062 (1.57) thick. Beryllium oxide, .062 (1.57) thick. Bare joint finish. Grafoil, .005 (.13) thick.* *Grafoil insulating material. highly toxic.) Thermafilmt filled polymide material which used isolation (variation Kapton®). popular material power applications because cost ability withstand high temperatures, ease handling contrast mica which chips flakes easily. number other insulating materials also shown. They cover wide range insulation resistance, thermal resistance ease handling. Mica been widely used past because offers high breakdown voltage fairly thermal resistance cost certainly should used with grease. MOUNTING SCREW TORQUE (IN-LBS) INTERFACE PRESSURE (psi) MOUNTING SCREW TORQUE (IN-LBS) INTERFACE PRESSURE (psi) THERMAL RESISTANCE FROM TRANSISTOR CASE MOUNTING SURFACE, C/WATT) Figure TO-204AA (TO-3) Without Thermal Grease Thermafilm, .002 (.05) thick. Mica, .003 (.08) thick. Mica, .002 (.05) thick. Hard anodized, .020 (.51) thick. Thermasil .009 (.23) thick. Thermasil III, .007`6 (.15) thick. Bare joint finish. Grafoil, .005 (.13) thick.* Figure TO-204AA (TO-3) With Thermal Grease THERMAL RESISTANCE FROM TRANSISTOR CASE MOUNTING SURFACE, C/WATT) THERMAL RESISTANCE FROM TRANSISTOR CASE MOUNTING SURFACE, C/WATT) MOUNTING SCREW TORQUE (IN-LBS) *Grafoil insulating material. (IN-LBS) MOUNTING SCREW TORQUE (IN-LBS) Figure TO-220 Without Thermal Grease Figure TO-220 With Thermal Grease INTERFACE THERMAL RESISTANCE TO-204, TO-3 TO-220 PACKAGES USING DIFFERENT INSULATING MATERIALS FUNCTION MOUNTING SCREW TORQUE (DATA COURTESY THERMALLOY) http://onsemi.com SOLDERRM Silicone rubber insulators have gained favor because they somewhat conformal under pressure. Their ability fill most metal voids interface reduces need thermal grease. When first introduced, they suffered from cut-through after years service. ones presently available have solved this problem having imbedded pads Kapton fiberglass. comparing Figure Figure noted that Thermasilt, filled silicone rubber, without grease, about same interface thermal resistance greased mica TO-220 package. number manufacturers offer silicone rubber insulators. Figure shows measured performance number these insulators under carefully controlled, nearly identical conditions. interface thermal resistance extremes over various materials. also clear that some insulators much more tolerant than others out-of-flat surfaces. Since tests were performed, newer products have been introduced. Bergquist K-10® pad, example, described having about interface resistance Pad® 1000 which would place performance close Chomerics 1671 pad. Aavid also offers isolated called Rubber-Duct, however only available vulcanized heatsink therefore included comparison. Published data from Aavid shows below 0.3°C/W pressures above psi. However, surface flatness other details specified comparison cannot made with other data this note. Table Thermal Resistance Silicone Rubber Pads Manufacturer Wakefield Bergquist Stockwell Rubber Bergquist Thermalloy Shin-Etsu Bergquist Chomerics Wakefield Bergquist Ablestik Thermalloy Chomerics Product Delta 173-7 K-4® 1867 400-9® Thermasil TC-30AG 400-7® 1674 Delta 174-9 1000® Thermal Wafers Thermasil 1671 Mils* .790 .752 .742 .735 .680 .664 .633 .592 .574 .529 .500 .440 .367 Mils* 1.175 1.470 1.015 1.205 1.045 1.260 1.060 1.190 .755 .935 .990 1.035 .655 mica, total surface flatness must under mils, situation that requires spot finishing. INTERFACE THERMAL RESISTANCE C/W) Thermasil .009 inches (.23) thick. Thermasil III, .006 inches (.15) thick. 0.002 0.004 0.006 0.008 0.01 TOTAL JOINT DEVIATION FROM FLAT OVER TO-3 HEADER SURFACE AREA (INCHES) Data courtesy Thermalloy Figure Effect Total Surface Flatness Interface Resistance Using Silicon Rubber Insulators *Test Fixture Deviation from flat from Thermalloy EIR86-1010. thermal resistance some silicone rubber insulators sensitive surface flatness when used under fairly rigid base package. Data TO-204AA (TO-3) package insulated with Thermasil shown Figure Observe that "worst case" encountered (7.5 mils) yields results having about twice thermal resistance "typical case" mils), more conductive insulator. order Thermasil exceed performance greased Silicon rubber insulators have number unusual characteristics. Besides being affected surface flatness initial contact pressure, time factor. example, study Cho-Therm® 1688 thermal interface impedance dropped from 0.90°C/W 0.70°C/W 1000 hours. Most change occurred during first hours where measured 0.74°C/W. torque conventional mounting hardware decreased in-lb from initial in-lb. With nonconformal materials, reduction torque would have increased interface thermal resistance. Because difficulties controlling variables affecting tests interface thermal resistance, data from different manufacturers good agreement. Figure shows data obtained from sources. relative performance same, except mica which varies widely thickness. Appendix discusses variables which need controlled. time this writing ASCommittee developing standard interface measurements. conclusions drawn from this data that some types silicon rubber pads, mounted dry, will perform commonly used mica with grease. Cost determining factor making selection. http://onsemi.com SOLDERRM Table Performance Silicon Rubber Insulators Tested MIL-I-49456 Measured Thermal Resistance (°C/W) Material Bare Joint, greased BeO, greased Cho-Therm, 1617 (non-insulated) Pad, K-10 Thermasil Mica, greased 1000 Cho-Therm 1674 Thermasil From Thermalloy 87-1030 From Bergquist Data Sheet Thermalloy Data(1) 0.033 0.082 0.233 0.263 0.267 0.329 0.400 0.433 0.500 0.533 0.583 Bergquist Data(2) 0.008 0.009 0.200 0.400 0.300 0.440 0.440 newer insulated packages grouped into categories. first insulation between semiconductor chips mounting base; exposed area mounting base used secure part. (Energy Management Series) Modules, shown Figure Case (ICePAKt) Case 388A (TO-258AA) (see Figure examples parts this category. second category contains parts which have plastic overmold covering metal mounting base. isolated, Case 221C, illustrated Figure example parts second category. Parts first category those with exposed metal flange mounted same their non-insulated counterparts. However, with mounting system where pressure bearing plastic, overmolded type should used with conical compression washer, described later this note. FASTENER HARDWARE CHARACTERISTICS Characteristics fasteners, associated hardware, tools secure them determine their suitability mounting various packages. Since many problems have arisen because improper choices, basic characteristics several types hardware discussed next. Compression Hardware Insulation Resistance When using insulators, care must taken keep mating surfaces clean. Small particles foreign matter puncture insulation, rendering useless seriously lowering dielectric strength. addition, particularly when voltages higher than encountered, problems with creepage occur. Dust other foreign material shorten creepage distances significantly; having clean assembly area important. Surface roughness humidity also lower insulation resistance. thermal grease usually raises withstand voltage insulation system excess must removed avoid collecting dust. Because these factors, which amenable analysis, hi-pot testing should done prototypes large margin safety employed. Insulated Electrode Packages Because nuisance handling installing accessories needed insulated semiconductor mounting, equipment manufacturers have longed cost-effective insulated packages since 1950's. first appear were stud mount types which usually have layer beryllium oxide between stud can. Although effective, assembly costly requires manual mounting lead wire soldering terminals case. late eighties, number electrically isolated parts became available from various semiconductor manufacturers. These offerings presently consist multiple chips integrated circuits well more conventional single chip devices. Normal split ring lock washers best choice mounting power semiconductors. typical washer flattens about pounds, whereas pounds needed good heat transfer interface. very useful piece hardware conical, sometimes called Belleville washer, compression washer. shown Figure ability maintain fairly constant pressure over wide range physical deflection generally 80%. When installing, assembler applies torque until washer depresses half original height. (Tests should prior setting assembly line determine proper torque fastener used achieve deflection.) washer will absorb cyclic expansion package, insulating washer other materials caused temperature changes. Conical washers successful mounting devices requiring strict control mounting force when plastic hardware used mounting scheme. They used with large face contacting packages. variation conical washer includes part assembly. Called "sync nut," patented device soldered board semiconductor mounted with 6-32 machine screw.(4) http://onsemi.com SOLDERRM PRESSURE PACKAGE (LB-F) DEFLECTION WASHER DURING MOUNTING result. When standard sheet metal screws used, they must used clearance hole engage speednut. self tapping process desired, screw type must used which roll-forms machine screw threads. Rivets Figure Characteristics Conical Compression Washers Designed with Plastic Body Mounted Semiconductors Clips Fast assembly accomplished with clips. When only watts being dissipated, small board-mounted free-standing heat dissipaters with integral clip, offered several manufacturers, result cost assembly. When higher power being handled, separate clip used with larger heatsinks. order provide proper pressure, clip must specially designed particular heatsink thickness semiconductor package. Clips especially popular with plastic packages such TO-220 TO-126. addition fast assembly, clip provides lower interface thermal resistance than other assembly methods when designed proper pressure bear plastic over die. TO-220 package usually lifted under location when mounted with single fastener through hole because high pressure end. Machine Screws Rivets recommended fastener plastic packages. When rugged metal flange-mount package module being mounted directly heatsink, rivets used provided press-riveting used. Crimping force must applied slowly evenly. Pop-riveting should never used because high crimping force could cause deformation most semiconductor packages. Aluminum rivets much preferred over steel because less pressure required rivet thermal conductivity improved. hollow rivet, eyelet, preferred over solid rivets. adjustable, regulated pressure press used such that gradually increasing pressure used eyelet. sharp blows could damage semiconductor die. Solder Until advent surface mount assembly technique, solder considered suitable fastener power semiconductors. However, user demand development packages this application. Acceptable soldering methods include conventional belt-furnace, irons, vapor-phase reflow, infrared reflow. important that semiconductor temperature exceed specified maximum (usually 260°C) bond case could damaged. degraded bond excessive thermal resistance which often leads failure under power cycling. Adhesives Machine screws, conical washers, nuts sync nuts) form trouble-free fastener system types packages which have mounting holes. However, proper torque necessary. Torque ratings apply when dry; therefore, care must exercised when using thermal grease prevent from getting threads inconsistent torque readings result. Machine screw heads should directly contact surface plastic packages types screw heads sufficiently flat provide properly distributed force. Without washer, cracking plastic case occur. Self-Tapping Screws Adhesives available which have coefficients expansion compatible with copper aluminum.(5) Highly conductive types available; layer approximately 0.3°C/W interface thermal resistance. Different types offered: high strength types non-field serviceable systems strength types field serviceable systems. Adhesive bonding attractive when case mounted parts used wave soldering assembly because thermal greases compatible with conformal coatings used greases foul solder process. Plastic Hardware Under carefully controlled conditions, sheet-metal screws acceptable. However, during tapping process with standard screw, volcano-like protrusion will develop metal being threaded; unacceptable surface that could increase thermal resistance Most plastic materials will flow, differ widely this characteristic. When plastic materials form parts fastening system, compression washers highly valuable assure that assembly will loosen with time temperature cycling. previously discussed, loss contact pressure will increase interface thermal resistance. http://onsemi.com SOLDERRM FASTENING TECHNIQUES Each various classes packages requires different fastening techniques. Details pertaining each type discussed following sections. Some general considerations follow. prevent galvanic action from occurring when devices used aluminum heatsinks corrosive atmosphere, many devices nickel- gold-plated. Consequently, precautions must taken finish. Another factor considered that when copper based part rigidly mounted aluminum heatsink, bimetallic system results which will bend with temperature changes. only thermal coefficient expansion different copper aluminum, temperature gradient through each metal also causes each component bend. bending excessive package mounted more screws semiconductor chip could damaged. Bending minimized Mounting component parallel heatsink fins provide increased stiffness. Allowing heatsink holes oversized that some slip between surfaces occur temperature changes. Using highly conductive thermal grease mounting between heatsink semiconductor minimize temperature gradient allow movement. Stud Mount Parts which fall into stud-mount classification shown Figure through Figure Mounting errors with non-insulated stud-mounted parts generally confined application excessive torque tapping stud into threaded heatsink hole. Both these practices cause warpage base which crack semiconductor die. only recommended fastening method washer; details shown Figure CASE (DO-5) CASE 56-03 DO-203AA (DO-4) CASE (DO-4) CASE DO-203AB (DO-5) CASE 263-04 CASE 311-02 Figure Standard Non-Isolated Types Figure Isolated Type CASE 144B-05 (.380 STUD) CASE 145A-09 (.380 STUD) CASE 145A-10 (.500 STUD) CASE 244-04 (.280 STUD) CASE 305-01 (.204 STUD) CASE 332-04 (.380 STUD) Figure Stripline Opposed Emitter (SOE) Series VARIETY STUD-MOUNT PARTS http://onsemi.com SOLDERRM CHAMFER SHOULDER RING 0.501 0.505 DIA. INSULATOR TEFLON BUSHING 0.24 0.0499 0.001 DIA. 0.01 NOM. 0.01 NOM. HEATSINK HEATSINK MOUNTING CHASSIS INSULATOR FLAT STEEL WASHER SOLDER TERMINAL INTIMATE CONTACT AREA COMPLETE KNURL CONTACT AREA RIVET ADDITIONAL HEATSINK PLATE THIN CHASSIS THIN-CHASSIS MOUNTING CONICAL WASHER hole edge must chamfered shown prevent shearing knurled edge case during press-in. pressing force should applied evenly shoulder ring avoid tilting canting case hole during pressing operation. Also, thermal joint compound will considerable aid. pressing force will vary from 1000 pounds, depending upon heatsink material. Recommended hardnesses are: copper-less than Rockwell scale; aluminum-less than Brinell scale. heatsink thin used, interface thermal resistance will increase direct proportion contact area. thin chassis requires addition backup plate. Figure Isolating Hardware Used Non-Isolated Stud-Mount Package Insulated electrode packages stud mount base require less hardware. They mounted same their non-insulated counterparts, care must exercised avoid applying shear tension stress insulation layer, usually beryllium oxide (BeO) ceramic. This requirement dictates that leads must attached circuit with flexible wire. addition, stud should used hold part while torqued. transistors stud-mount stripline opposed emitter (SOE) package impose some additional constraints because unique construction package. Special techniques make connections stripline leads mount part tension shear forces applied ceramic metal interface discussed section entitled "Connecting Handling Terminals." Press Figure Press-Fit Package Flange Mount most applications, press-fit case should mounted according instructions shown Figure special fixture meeting necessary requirements must used. large variety parts into flange mount category shown Figure through Figure known mounting difficulties exist with smaller flange mount packages, such TO-204 (TO-3). rugged base distance between mounting holes combine make extremely difficult cause warpage unless mounted surface which badly bowed unless side tightened excessively before other screw started. therefore good practice alternate tightening screws that pressure evenly applied. After screws finger-tight hardware should torqued final specification least sequential steps. typical mounting installation popular flange type part shown Figure Machine screws (preferred) self-tapping screws, eyelets, rivets used secure package using guidelines previous section, "Fastener Hardware Characteristics." http://onsemi.com SOLDERRM copper flange Energy Management Series (EMS) Modules very thick. Consequently, parts rugged indestructible practical purposes. special precautions necessary when fastening these parts heatsink. Some packages specify tightening procedure. example, with Power package, Figure final torque should applied first center position. power modules (MHW series) more sensitive flatness heatsink than other packages because ceramic (BeO) substrate attached relatively thin, fairly long, flange. maximum allowable flange bending avoid mechanical damage been determined presented detail Engineering Bulletin EB107/D "Mounting Considerations Semiconductor Power Modules." Many parts handle combined heatsink flange deviation from flat mils which commonly available. Others must held mils, which requires that heatsink have nearly perfect flatness. CASE TO-204AA (TO-3) CASE 383-01 CASE 357C-03 CASE 211-07 CASE 211-11 CASE 215-02 Figure TO-3 Variations Figure Plastic Power CASE 316-01 CASE 373-01 CASE 807-03 CASE 807A-03 CASE 808-01 CASE 319-07 (CS-12) CASE 328A-03 CASE 333-04 CASE 809-02 CASE 812-02 CASE 813-02 CASE 333A-02 (MAAC PAC) CASE 336-03 CASE 814-02 CASE 816-02 CASE 819-02 CASE 337-02 CASE 368-03 (HOG PAC) CASE 744A-01 Figure Energy Management Series (Isolated Base Plate) Figure Stripline Isolated Output Opposed Emitter (SOE) Series LARGE ARRAY PARTS INTO FLANGE-MOUNT CLASSIFICATION Specific mounting recommendations critical devices isolated packages because internal ceramic substrate. large area Case 368-03 (HOG PAC) will used illustrate problem areas. more sensitive proper mounting techniques than most other power devices. Although data sheets contain information recommended mounting procedures, experience indicates that they often ignored. example, recommended maximum torque 4-40 mounting screws in/lbs. Spring flat washers recommended. Over torquing common problem. some parts returned failure analysis, indentions mils deep mounting screw areas have been observed. Calculations indicate that length flange increases excess mils with temperature change 75°C. such cases, mounting screw torque excessive, flange prevented from expanding length, instead bends upwards mid-section, cracking die. similar result also occur during initial mounting device excessive amount thermal compound applied. With http://onsemi.com SOLDERRM sufficient torque, thermal compound will squeeze mounting hole areas, will remain under center flange, deforming Deformations mils have been measured between center ends under such conditions (enough crack internal ceramic). Another problem arises because thickness flange changes with temperature. 75°C temperature excursion mentioned, increased amount around 0.25 mils which results further tightening mounting screws, thus increasing effective torque from initial value. With decrease temperature, opposite effect occurs. Therefore thermal cycling only causes risk structural damage often causes assembly loosen which raises interface resistance. compression hardware eliminate this problem. SHEET METAL SCREWS mounting hole exceeds 0.140 inch (6-32 clearance). Larger holes needed accommodate lower insulating bushing when screw electrically connected case; however, holes should larger than necessary provide hardware clearance should never exceed diameter 0.250 inch. Flange distortion also possible excessive torque used during mounting. maximum torque inch-pounds suggested when using 6-32 screw. Care should exercised assure that tool used drive mounting screw never comes contact with plastic body during driving operation. Such contact result damage plastic body internal device connections. minimize this problem, Semiconductor TO-220 packages have chamfer end. TO-220 packages other manufacturers need spacer combination spacer isolation bushing raise screw head above surface plastic. POWER TRANSISTOR INSULATOR CASE 221A-04 (TO-220AB) CASE 221B-03 (TO-220AC) INSULATING BUSHING HEAT SINK CASE 314B TO-220) CASE 314D CASE SOCKET CASE 340-02 (TO-218) Figure Hardware Used TO-204AA (TO-3) Flange Mount Part Mount CASE 387-01 (TO-254AA) CASE 388A-01 (TO-258AA) CASE 806-05 (ICePAK) Figure Several Types Tab-Mount Parts mount class composed wide array packages illustrated Figure Mounting considerations varieties similar that popular TO-220 package, whose suggested mounting arrangements hardware shown Figure rectangular washer shown Figure used minimize distortion mounting flange; excessive distortion could cause damage semiconductor chip. washer only important when size popular TO-220 Package others similar construction lift mounting surface pressure applied end. (See Appendix Figure 52.) counter this tendency, least hardware manufacturer offers hard plastic cantilever beam which applies more even pressure tab.(6) addition, separates mounting screw from metal tab. mount parts also effectively mounted with clips shown Figure http://onsemi.com SOLDERRM obtain high pressure without cracking case, pressure spreader should used under clip. Interface thermal resistance with cantilever beam clips lower than with screw mounting. ICePAK (Case 806-05) basically elongated TO-220 package with isolated chips. mounting precautions TO-220 consequently apply. addition, since mounting screws required, alternate tightening procedure described flange mount package should used. situations where mount package making direct contact with heatsink, eyelet used, provided sharp blows impact shock avoided. Preferred Arrangement Isolated Non-isolated Mounting. Screw Semiconductor Case Potential. 6-32 Hardware Used. Choose from Parts Listed Below 4-40 HEAD SCREW 6-32 HEAD SCREW Plastic Body Mount Alternate Arrangement Isolated Mounting when Screw must Heatsink Potential. 4-40 Hardware Used. Parts Listed Below Thermopadt isolated plastic power packages shown Figure typical packages this group. They have been designed feature minimum size with compromise thermal resistance. Thermopad (Case parts this accomplished die-bonding silicon chip side thin copper sheet; opposite side exposed mounting surface. copper sheet hole mounting; plastic molded enveloping chip leaving mounting hole open. thermal resistance this construction obtained expense requirement that strict attention paid mounting procedure. isolated (Case 221C-02) similar TO-220 except that encased plastic. Because mounting force applied plastic, mounting procedure differs from standard TO-220 similar that Thermopad. CASE TO-225AA/TO-126 (THERMOPAD) FLAT WASHER INSULATING BUSHING CASE 221C-02 (FULLY ISOLATED) RECTANGULAR STEEL WASHER SEMICONDUCTOR (CASE 221, 221A) SEMICONDUCTOR (CASE 221, 221A) RECTANGULAR INSULATOR HEATSINK RECTANGULAR INSULATOR BUSHING FLAT WASHER COMPRESSION WASHER CONICAL WASHER 6-32 4-40 HEATSINK CASE 221D-02 (FULLY ISOLATED) CASE 340B-03 (FULLY ISOLATED) Figure Plastic Body-Mount Packages Used with thin chassis and/or large hole. Used when isolation required. Required when nylon bushing used. Figure Mounting Arrangements Mount TO-220 Several types fasteners used secure these packages; machine screws, eyelets, clips preferred. With screws eyelets, conical washer should used which applies proper force package over fairly wide range deflection distributes force over fairly large surface area. Screws should tightened with type air-driven torque equipment which cause high impact. Characteristics suitable conical washer shown Figure http://onsemi.com SOLDERRM Figure through Figure shows details mounting Case devices. Clip mounting fast requires minimum hardware, however, clip must properly chosen insure that proper mounting force applied. When electrical isolation required with screw mounting, bushing inside mounting hole will insure that screw threads contact metal base. isolated, (Case 221C, 221D 340B) permits mounting procedure greatly simplified over that standard TO-220. shown Figure properly chosen clip, inserted into slotted holes heatsink, hardware needed. Even though clip pressure much lower than obtained with screw, thermal resistance about same either method. This occurs because clip bears directly holds package flat while screw causes package lift somewhat under die. (See Figure Appendix interface should consist layer thermal grease highly conductive thermal pad. course, screw mounting shown Figure also used conical compression washer should included. Both methods afford major reduction hardware compared conventional mounting method with TO-220 package which shown Figure Surface Mount Although many mount parts have been surface mounted, special small footprint packages mounting power semiconductors using surface mount assembly techniques have been developed. DPAK, shown Figure example, will accommodate mils mils, typical thermal resistance around 2°C/W junction case. thermal resistance values solder interface well under 1°C/W. printed circuit board also serves heatsink. http://onsemi.com SOLDERRM MACHINE SCREW SHEET METAL SCREW 4-40 SCREW PLAIN WASHER INSULATING BUSHING HEATSINK SURFACE COMPRESSION WASHER THERMOPAD PACKAGE INSULATING WASHER (OPTIONAL) MACHINE SPEED INSULATOR HEATSINK COMPRESSION WASHER Figure Machine Screw Mounting EYELET Figure Screw-Mounted TO-220 6-32 SCREW PLAIN WASHER COMPRESSION WASHER INSULATING WASHER (OPTIONAL) HEATSINK COMPRESSION WASHER Figure Eyelet Mounting Figure Screw-Mounted Isolated Package CLIP Figure Clips HEATSINK RECOMMENDED MOUNTING ARRANGEMENTS TO-225AA (TO-126) THERMOPAD PACKAGES Figure Clip-Mounted Isolated Package MOUNTING ARRANGEMENTS ISOLATED PACKAGE COMPARED CONVENTIONAL http://onsemi.com SOLDERRM encountered where heatsink used. leads should short possible increase vibration resistance reduce thermal resistance. general practice however, better support package. plastic support TO-220 Package other similar types offered heatsink accessory vendors. many situations, because leads fairly heavy, Case (TO-225AA) (TO-127) package supported small heatsink; however, definitive data available. When using small heatsink, good practice have sink rigidly mounted such that sink board providing total support semiconductor. possible arrangements shown Figure Figure arrangement Figure could used with plastic package, scheme Figure more practical with Case Thermopad devices. With other package types, mounting transistor heatsink more practical. HEATSINK CASE 369-07 CASE 369A-13 Figure Surface Mount D-PAK Parts Standard Glass-Epoxy 2-ounce boards make very good heatsinks because thin foil high thermal resistance. Figure shows, thermal resistance asymptotes about 20°C/W square inches board area, although point diminishing returns occurs about square inches. Boards offered that have thick aluminum copper substrates. dielectric coating designed thermal resistance overlaid with ounce copper foil preparation printed conductor traces. Tests such product indicate that case substrate thermal resistance vicinity 1°C/W, exact values depending upon board type.(7) substrate effective heatsink itself, attached conventional finned heatsink improved performance. Since DPAK other surface mount packages designed compatible with surface mount assembly techniques, special precautions needed other than insure that maximum temperature/time profiles exceeded. THERMAL RESISTANCE C/W) PCB, 1/16 THICK G10/FR4, OUNCE EPOXY GLASS BOARD, DOUBLE SIDED TO-225AA CASE HEATSINK SURFACE CIRCUIT BOARD TWIST LOCKS SOLDERABLE LEGS Figure Simple Plate, Vertically Mounted HEATSINK AREA (IN2) TO-225AA CASE HEATSINK SURFACE CIRCUIT BOARD Figure Effect Footprint Area Thermal Resistance DPAK Mounted Glass-Epoxy Board FREE SOCKET MOUNTING applications where average power dissipation order watt most power semiconductors mounted with little heatsinking. leads various metal power packages designed support packages; their cases must firmly supported avoid possibility cracked seals around leads. Many plastic packages supported their leads applications where high shock vibration stresses Figure Commercial Sink, Horizontally Mounted METHODS USING SMALL HEATSINKS WITH PLASTIC SEMICONDUCTOR PACKAGES http://onsemi.com SOLDERRM certain situations, particular where semiconductor testing required prototypes being developed, sockets desirable. Manufacturers have provided sockets many packages available from Semiconductor. user urged consult manufacturers' catalogs specific details. Sockets with Kelvin connections necessary obtain accurate voltage readings across semiconductor terminals. CONNECTING HANDLING TERMINALS Pins, leads, tabs must handled connected properly avoid undue mechanical stress which could cause semiconductor failure. Change mechanical dimensions result thermal cycling over operating temperature extremes must considered. Standard metal, plastic, stripline packages each have some special considerations. Metal Packages greater than pounds result permanent damage device. mounting arrangement imposes axial stress leads, condition which caused thermal cycling, some method strain relief should devised. When wires used connections, care should exercised assure that movement wire does cause movement lead lead-to-plastic junctions. Highly flexible braided wires good providing strain relief. Wire-wrapping leads permissible, provided that lead restrained between plastic case point wrapping. leads soldered; maximum soldering temperature, however, must exceed 260°C must applied more than seconds distance greater than inch from plastic case. Stripline Packages pins lugs metal packaged devices using glass metal seals designed handle significant bending stress. abused, seals could crack. Wires attached using sockets, crimp connectors solder, provided data sheet ratings observed. When wires attached directly pins, flexible braided leads recommended order provide strain relief. Modules screw terminals modules look deceptively rugged. Since flange base mounted rigid heatsink, connection terminals must allow some flexibility. rigid buss should bolted terminals. Lugs with braid preferred. Plastic Packages leads plastic packages somewhat flexible reshaped although this recommended procedure. many cases, heatsink chosen which makes lead-bending unnecessary. Numerous lead tab-forming options available from Semiconductor large quantity orders. Preformed leads remove users risk device damage caused bending. however, lead-bending done user, several basic considerations should observed. When bending lead, support must placed between point bending package. forming small quantities units, pair pliers used clamp leads case, while bending with fingers another pair pliers. production quantities, suitable fixture should made. following rules should observed avoid damage package. leadbend radius greater than 1/16 inch advisable TO-225AA (Case 1/32 inch TO-220. twisting leads should done case. axial motion lead should allowed with respect case. leads plastic packages designed withstand excessive axial pull. Force this direction leads stripline packages normally soldered into board while case recessed contact heatsink shown Figure through Figure following rules should observed: device should never mounted such manner place ceramic-to-metal joints tension. device should never mounted such manner apply force strip leads vertical direction towards cap. When device mounted printed circuit board with copper stud portion header passing through hole circuit boards, adequate clearance must provided prevent shear forces from being applied leads. Some clearance must allowed between leads circuit board when device secured heatsink. device should properly secured into heatsinks before leads attached into circuit. leads stud type devices must used prevent device rotation during stud torque application. wrench flat provided this purpose. Figure shows cross-section printed circuit board heatsink assembly mounting stud type stripline device. distance from surface printed circuit board D-flat heatsink surface. less than minimum distance from bottom lead material mounting surface package, there possibility tensile forces copper stud ceramic joint. however, greater than package dimension, considerable force applied joint stud joint. occurrences possible this point. first joint failure when structure heated, might occur during lead-soldering operation; while second stud failure force generated high enough. Lack contact between device heatsink surface will occur differences between package dimension become larger, this result device failure power applied. http://onsemi.com SOLDERRM CERAMIC TRANSISTOR CHIP LEADS METALLIC PATTERN SURFACE DISC WRENCH FLAT CLEANING CIRCUIT BOARDS important that solvents cleaning chemicals used process degreasing flux removal affect reliability devices. Alcohol unchlorinated Freon solvents generally satisfactory with plastic devices, since they damage package. Hydrocarbons such gasoline chlorinated Freon cause encapsulant swell, possibly damaging transistor die. When using ultrasonic cleaner cleaning circuit boards, care should taken with regard ultrasonic energy time application. This particularly true packages free-standing without support. THERMAL SYSTEM EVALUATION Assuming that suitable method mounting semiconductor without incurring damage been achieved, important ascertain whether junction temperature within bounds. applications where power dissipated semiconductor consists pulses duty cycle, instantaneous peak junction temperature, average temperature, limiting condition. this case, must made transient thermal resistance data. full explanation use, Semiconductor Application Note, AN569/D. Other applications, notably power amplifiers switches driving highly reactive loads, create severe current crowding conditions which render traditional concepts thermal resistance transient thermal impedance invalid. this case, transistor safe operating area, thyristor di/dt limits, equivalent ratings applicable, must observed. Fortunately, many applications, calculation average junction temperature sufficient. based concept thermal resistance between junction temperature reference point case. (See Appendix fine wire thermocouple should used, such AWG, determine case temperature. Average operating junction temperature computed from following equation: Figure Component Parts Stud Mount Stripline Package. Flange Mounted Packages Similarly Constructed FLAT PRINTED CIRCUIT BOARD HEAT SINK SURFACE FLAT VIEW PRINTED CONDUCTOR PATTERN METAL HEAT SINK SIDE VIEW CROSS SECTION Figure Typical Stud Type Transistor Mounting Method MOUNTING HOLES METAL HEATSINK SURFACE CIRCUIT BOARD ALIGNMENT SPACER METAL HEAT SINK SURFACE SIDE VIEW CROSS SECTION VIEW COPPER CONDUCTORS where Figure Flange Type Transistor Mounting Method MOUNTING DETAILS TRANSISTORS Figure shows typical mounting technique flange-type stripline transistors. Again, defined distance from printed circuit board heatsink surface. distance less than minimum distance from bottom transistor lead bottom surface flange, tensile forces various joints package avoided. However, distance exceeds package dimension, problems similar those discussed stud type devices occur. junction temperature (°C) case temperature (°C) thermal resistance junction-to case specified data sheet (°C/W) power dissipated device difficulty applying equation often lies determining power dissipation. commonly used empirical methods graphical integration substitution. http://onsemi.com SOLDERRM Graphical Integration Substitution Graphical integration performed taking oscilloscope pictures complete cycle voltage current waveforms, using limit device. pictures should taken with temperature stabilized. Corresponding points then read from each photo suitable number time increments. Each pair voltage current values multiplied together give instantaneous values power. results plotted linear graph paper, number squares within curve counted, total divided number squares along time axis. quotient average power dissipation. Oscilloscopes available perform these measurements make necessary calculations. This method based upon substituting easily measurable, smooth source complex waveform. switching arrangement provided which allows operating load with device under test, until stabilizes temperature. Case temperature monitored. throwing switch "test" position, device under test connected power supply, while another pole switch supplies normal power load keep operating full power level. supply adjusted that semiconductor case temperature remains approximately constant when switch thrown each position about seconds. voltage current values multiplied together obtain average power. generally necessary that Kelvin connection used device voltage measurement. http://onsemi.com SOLDERRM APPENDIX THERMAL RESISTANCE CONCEPTS basic equation heat transfer under steady-state conditions generally written rate heat transfer power dissipation (PD) heat transfer coefficient, area involved heat transfer, temperature difference between regions heat transfer. However, electrical engineers generally find easier work terms thermal resistance, defined ratio temperature power. From Equation thermal resistance, 1/hA where coefficient depends upon heat transfer mechanism used various factors involved that particular mechanism. analogy between Equation Ohm's often made form models heat flow. Note that could thought voltage thermal resistance corresponds electrical resistance (R); and, power analogous current (I). This gives rise basic thermal resistance model semiconductor indicated Figure equivalent electrical circuit analyzed using Kirchoff's following equation results: where (RJC RSA) power dissipation semiconductor thermal resistance (junction case), interface thermal resistance (case heat-sink), heat sink thermal resistance (heatsink ambient), ambient temperature. thermal resistance junction ambient individual components. Each component must minimized lowest junction temperature result. value interface thermal resistance, RCS, significant compared other thermal resistance terms. proper mounting procedure minimize RCS. thermal resistance heatsink absolutely constant; thermal efficiency increases ambient temperature increases also affected orientation sink. thermal resistance semiconductor also variable; function biasing temperature. Semiconductor thermal resistance specifications normally conditions where current density fairly uniform. some applications such power amplifiers short-pulse applications, current density uniform localized heating semiconductor chip will controlling factor determining power handling ability. junction temperature, JUNCTION TEMPERATURE INSULATORS HEATSINK CASE TEMPERATURE HEATSINK TEMPERATURE AMBIENT TEMPERATURE FLAT WASHER SOLDER TERMINAL REFERENCE TEMPERATURE Figure Basic Thermal Resistance Model Showing Thermal Electrical Analogy Semiconductor http://onsemi.com SOLDERRM APPENDIX MEASUREMENT INTERFACE THERMAL RESISTANCE Measuring interface thermal resistance appears deceptively simple. that's apparently needed thermocouple semiconductor case, thermocouple heatsink, means applying measuring power. However, proportional amount contact area between surfaces consequently affected surface flatness finish amount pressure surfaces. fastening method also factor. addition, placement thermocouples have significant influence upon results. Consequently, values interface thermal resistance presented different manufacturers good agreement. Fastening methods thermocouple locations considered this Appendix. When fastening test package place with screws, thermal conduction take place through screws, example, from flange TO-3 package directly heatsink. This shunt path yields values which artificially insulation material dependent upon screw head contact area screw material. MIL-I-49456 allows screws used tests interface thermal resistance probably because argued that this "application oriented." Thermalloy takes pains insulate possible shunt conduction paths order more accurately evaluate insulation materials. Semiconductor fixture uses insulated clamp arrangement secure package which also does provide conduction path. described previously, some packages, such TO-220, mounted with either screw through clip bearing plastic body. These methods often yield different values interface thermal resistance. Another discrepancy occur package exposed ambient where radiation convection take place. avoid this, package should covered with insulating foam. been estimated that error incurred from this source. Another significant cause measurement discrepancies placement thermocouple measure semiconductor case temperature. Consider TO-220 package shown Figure mounting pressure causes other where located lift mounting surface slightly. improve contact, Semiconductor TO-220 Packages slightly concave. spreader under screw lessens lifting, some inevitable with package this structure. Three thermocouple locations shown: Semiconductor location directly under reached through hole heatsink. thermocouple held place spring which forces thermocouple into intimate contact with bottom semi's case. JEDEC location close surface package base reached through blind hole drilled through molded body. thermocouple swaged place. Thermalloy location portion between molded body mounting screw. thermocouple soldered into position. E.I.A. THERMALLOY Semiconductor Figure JEDEC TO-220 Package Mounted Heatsink Showing Various Thermocouple Locations Lifting Caused Pressure Temperatures three locations generally same. Consider situation depicted figure. Because only area direct contact around mounting screw, nearly heat travels horizontally along from contact area. Consequently, temperature JEDEC location hotter than Thermalloy location Semiconductor location even hotter. Since junction-to-sink thermal resistance must constant given test setup, calculated junction-to-case thermal resistance values decrease case-to-sink values increase "case" temperature thermocouple readings become warmer. Thus choice reference point "case" temperature quite important. There examples where relationship between thermocouple temperatures different from previous situation. mica washer with grease installed between semiconductor package heatsink, tightening screw will package; instead, mica will deformed. primary heat conduction path from through mica heatsink. this case, small temperature drop will exist across vertical dimension package mounting base that thermocouple location will hottest. thermocouple temperature Thermalloy location will lower close temperature location lateral heat flow generally small. Semiconductor location will coolest. http://onsemi.com SOLDERRM location chosen obtain highest temperature case. significance because power ratings supposed based this reference point. Unfortunately, placement thermocouple tedious leaves semiconductor condition unfit sale. Semiconductor location chosen obtain highest temperature case point where, hopefully, case making contact heatsink. Once special heatsink accommodate thermocouple been fabricated, this method lends itself production testing does mark device. However, this location easily accessible user. Thermalloy location convenient often chosen equipment manufacturers. However, also blemishes case yield results differing 1°C/W TO-220 package mounted heatsink without thermal grease insulator. This error small when compared thermal resistance heat dissipaters often used with this package, since power dissipation usually watts. When compared specified junction-to-case values some higher power semiconductors becoming available, however, difference becomes significant important that semiconductor manufacturer equipment manufacturer same reference point. Another method establishing reference temperatures utilizes soft copper washer (thermal grease used) between semiconductor package heatsink. washer flat within mil/inch, finish better than -inch, imbedded thermocouple near center. This reference includes interface resistance under nearly ideal conditions therefore application-oriented. also easy become widely accepted. good improve confidence choice case reference point also test junction-to-case thermal resistance while testing interface thermal resistance. junction-to-case values remain relatively constant insulators changed, torque varied, etc., then case reference point satisfactory. APPENDIX Sources Accessories Insulators Manufacturer Aavid AHAM-TOR Asheville- Schoonmaker Astrodynamis Delbert Blinn IERC Staver Thermalloy Tran-tec Wakefield Joint Compound Adhesives AlO2 Anodize Mica Plastic Film Silicone Rubber Heatsinks Clips Other Sources silicone rubber pads: Chomerics, Bergquist Suppliers Addresses Aavid Engineering, Inc., P.O. 400, Laconia, Hampshire 03247 (603) 524-1478 AHAM-TOR Heatsinks, 27901 Front Street, Rancho, California 92390 (714) 676-4151 Asheville-Schoonmaker, Jefferson Ave., Newport News, 23607 (804) 244-7311 Astro Dynamics, Inc., Gill St., Woburn, Massachusetts 01801 (617) 935-4944 Bergquist, 5300 Edina Industrial Blvd., Minneapolis, Minnesota 55435 (612) 835-2322 Chomerics, Inc.,16 Flagstone Drive, Hudson, Hampshire 03051 1-800-633-8800 Delbert Blinn Company, P.O. 2007, Pomona, California 91769 (714) 623-1257 International Electronic Research Corporation, West Magnolia Boulevard, Burbank, California 91502 (213) 849-2481 Staver Company, Inc., 41-51 Saxon Avenue, Shore, Long Island, York 11706 (516) 666-8000 Thermalloy, Inc., P.O. 34829, 2021 West Valley View Lane, Dallas, Texas 75234 (214) 243-4321 Tran-tec Corporation, P.O. 1044, Columbus, Nebraska 68601 (402) 564-2748 Wakefield Engineering, Inc., Wakefield, Massachusetts 01880 (617) 245-5900 http://onsemi.com SOLDERRM PACKAGE INDEX PREFACE When JEDEC registration system package outlines started 1957, numbers were assigned sequentially whenever manufacturers wished establish package industry standard. minor variations developed from these industry standards, either new, non-related number issued JEDEC manufacturers would attempt relate part industry standard some appended description. attempt ease confusion, JEDEC established present system late 1968 which packages assigned into category, based their general physical appearance. Differences between specific packages category denoted suffix letters. older package designations were re-registered system time permitted. example venerable TO-3 many variations. heights differ available with pins, with without lugs. classified TO-204 family. TO-204AA conforms original outline TO-3 having pins while TO-204AE pins, example. numbers parts really haven't caught very well. seems that DO-4, DO-5 TO-3 still convey sufficient meaning general verbal communication. Case Number 011A 042A 61-04 63-02 63-03 086L 144B-05 145A-09 145A-10 145C 160-03 174-04 JEDEC Outline Original System TO-3 TO-3 TO-61 TO-3 TO-3 TO-3 TO-60 DO-5 DO-4 TO-3 DO-4 DO-5 TO-64 TO-64 TO-126 TO-66 Revised System TO-204AA TO-210AC TO-204AA TO-210AB DO-203AB DO-203AA TO-208AB TO-2088AB TO-225AA TO-213AA TO-208 TO-298 Mounting Notes Class Flange Flange Stud Flange Flange Flange Stud Stud Stud Flange Stud Stud Flange Stud Stud Plastic Flange Stud Stud Stud Stud Stud Stud Stud Stud Stud Pressfit Case Number 175-03 211-07 211-11 215-02 221C-02 221D-02 235-03 244-04 257-01 263-04 305-01 310-02 311-02 311-02 311-02 314B-03 JEDEC Outline Original System Revised System TO-204AE Mounting Class Notes Stud Flange Flange Flange Flange Plastic Plastic Case Number 314D-03 316-01 319-06 328A-03 332-04 333-04 333A-02 336-03 337-02 340A-02 340B-03 342-01 357B-01 361-01 368-02 369-06 369A-12 373-01 383-01 387-01 388A-01 744-02 744A-01 043-07 JEDEC Outline Original System Revised System Notes Mounting Class Flange Flange Flange Stud Flange Flange Flange Flange Plastic Plastic DO-4 DO-5 DO-4 TO-220AB TO-208 TO-208 TO-208 TO-208 TO-209 Isolated TO-220 TO-232 TO-59 DO-203 TO-210AA DO-203 Stud Stud Stud Stud Stud Stud Stud Stud Stud Stud Stud Stud Pressfit Isolated Stud Pressfit Stud TO-218AC Isolated TO-218 DO-21 Flange Flange Flange Flange Insertion TO-251 Surface TO-252 Isolated Flange Isolated Flange TO-254AA Isolated TO-258AA Isolated Flange Flange Pressfit DO-208AA Notes: Would within this family outline registered with JEDEC. within JEDEC dimensions. http://onsemi.com SOLDERRM MIL-HANDBOOK 2178, SECTION 2.2. "Navy Power Supply Reliability Design Manufacturing Guidelines" NAVMAT P4855-1, Dec. 1982 NAVPUBFORCEN, 5801 Tabor Ave., Philadelphia, 19120. Catalog #87-HS-9, (1987), page Thermalloy, Inc., P.O. 810839, Dallas, Texas 75381-0839. Shakeproof, Charles Road, Elgin, 60120. Robert Batson, Elliot Fraunglass James Moran, "Heat Dissipation Through Thermalloy Conductive Adhesives," EMTAS '83. Conference, February Phoenix, Society Manufacturing Engineers, Drive, P.O. 930, Dearborn, 48128. http://onsemi.com SOLDERRM AND8081/D Flip Chip Packages Prepared Denise Thienpont Semiconductor Staff Engineer http://onsemi.com APPLICATION NOTE Introduction Chip Scale Packaging This application note provides guidelines Chip Scale Packages related mounting devices PCB. Included information layout Systems Engineers, manufacturing processes Manufacturing Process Engineers. Package Overview Flip Chip "Package" Overview Package Construction Process Description Chip Scale packages offered Semiconductor represent smallest footprint size since package same size die. Semiconductor offers types CSPs, bumped Flip Chip Standard Bump. This application note covers only Flip Chip CSPs with larger bumps. Flip Chip bumped created attaching solder spheres pads active side wafer. layout either peripheral array. redistribution layer used. 63/37 SnPb solder bumps allow compatibility package connections with standard surface mount technology pick place reflow processes standard flip chip mounting systems. larger solder bumps Flip Chip requires underfill increase reliability performance. Devices designed with smaller standard bumps generally have peripheral layout tighter spacing than that Flip Chip CSPs. Underfill recommended increase board level solder joint reliability. Flip Chip wafer level processing technique. Upon completion standard wafer processing, polymeric passivation layer applied wafer, leaving bonding pads exposed. sputtered thin film underbump Al/NiV/Cu metallization (UBM) applied device bonding bonds provide interface between metallization solder bump. Solder spheres placed each exposed reflowed create interconnection system ready board assembly. Once bumps reflowed, wafers electrically tested, laser marked, sawn into individual die, packed tape reel, bumps down. typical Flip Chip represented Figure Total device thickness will vary, depending customer requirements. Pitch Bump Diameter Figure Daisy Chain Flip Chip http://onsemi.com SOLDERRM Printed Circuit Board Design Recommended Layout Table Assembly Recommendations Parameter Size Shape Type Solder Mask Opening Solder Stencil Thickness Stencil Aperture Solder Flux Ratio Solder Paste Type Trace Finish Trace Width Pitch Solder Ball Round NSMD 50/50 Clean Type Finer types land patterns commonly used surface mount packages non-solder mask defined (NSMD) solder mask defined (SMD), Figure With configured pads, solder mask covers outside perimeter circular contact pads, thus limiting solder attach just surface exposed pads. With NSMD configured pads, there between solder mask circular contact pad. NSMD pads preferred better control copper etch process compared with solder mask etch process definition. solder bumps will attach NSMD wall well surface, which provides additional mechanical strength solder joint fatigue life. definition introduces increased levels stress near solder mask overlap region which results solder joint fatigue cracking extreme temperature cycling conditions. smaller NSMD pads also provide more room escape routing since they smaller diameter than pads. Copper Solder mask Contacts Surface Finish Characteristics Organic solderability preservative (OSP) finish recommended optimum solder joint reliability. Electroless nickel-immersion gold finish with gold thickness ranging from 0.05 0.127 also used, although solder joint integrity suffer presence brittle gold/tin intermetallics. Solder Leveled finish (HASL) recommended because process does give consistent solder volumes each pad. Solder Assembly Recommendations Process Flow Surface mount assembly operations include printing solder paste onto PCB. Solder Paste Characteristics NSMD Figure NSMD copper layer thickness less than recommended maintain maximum stand-off height consequently maximum solder joint fatigue life. Micro-via pads should NSMD ensure adequate wetting area copper pad. summary recommended design parameters found Table Type powder), Type powder) Type powder) ANSI/J-STD-005 compliant solder paste suggested. No-clean solder paste recommended. water soluble (OA) solder paste flux also used. Metal load range from wt%. Solder flux ratio should 50/50 volume. Solder Stencil Printing Stainless steel, brass, nickel plated stencils with laser metal additive apertures recommended. Five degree tapered walls suggested laser stencils facilitate release paste when screen removed from PCB. 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