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Preliminary Product Overview 10.99 Revision History: Previous Ver


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DUAL CHANNEL SLICOFI-2, SLIC DuSLIC 3265 Version 4265 Version 4266 Version
Preliminary Product Overview 10.99
Revision History: Previous Version: Page Page previous current Version) Version)
Current Version: 10.99
Subjects (major changes since last revision)
questions technology, delivery prices please contact Infineon Technologies Offices Germany Infineon Technologies Companies Representatives worldwide: webpage http://www.infineon.com
November 1999
ABM®, AOP®, ARCOFI®, ARCOFI®-BA, ARCOFI®-SP, DigiTape®, EPIC®-1, EPIC®-S, ELIC®, FALC®54, FALC®56, FALC®-E1, FALC®-LH, IDEC®, IOM®, IOM®-1, IOM®-2, IPAT®-2, ISAC®-P, ISAC®-S, ISAC®-S ISAC®-P ITAC®, IWE®, MUSAC®-A, OCTAT®-P, QUAT®-S, SICAT®, SICOFI®, SICOFI®-2, SICOFI®-4, SICOFI®-4µC, SLICOFI® registered trademarks Infineon Technologies ACETM, ASMTM, ASPTM, POTSWIRETM, QuadFALCTM, SCOUTare trademarks Infineon Technologies Edition 10.99 Published Infineon Technologies 81541 Infineon Technologies 1999. Rights Reserved. Attention please! patents other rights third parties concerned, liability only assumed components, applications, processes circuits implemented within components assemblies. information describes type component shall considered assured characteristics. Terms delivery rights change design reserved. technical requirements components contain dangerous substances. information types question please contact your nearest Infineon Technologies Office. Infineon Technologies approved CECC manufacturer. Packing Please recycling operators known you. also help touch with your nearest sales office. agreement will take packing material back, sorted. must bear costs transport. packing material that returned unsorted which obliged accept, shall have invoice costs incurred. Components used life-support devices systems must expressly authorized such purpose! Critical components1 Infineon Technologies only used life-support devices systems2 with express written approval Infineon Technologies critical component component used life-support device system whose failure reasonably expected cause failure that life-support device system, affect safety effectiveness that device system. Life support devices systems intended implanted human body, support and/or maintain sustain human life. they fail, reasonable assume that health user endangered.
DuSLIC
Table Contents 2.3.1 2.3.2 2.3.3 2.3.4 2.3.5 2.3.6 2.3.7 2.4.1 2.4.2 2.4.3 2.4.4 2.5.1 2.5.2 2.5.3 2.5.4 2.5.5 2.5.6 2.5.7 2.6.1 2.6.2 2.6.2.1 2.8.1 2.8.2 2.8.3 2.8.4 2.10 2.11
Page
Overview Features Typical Applications Logic Symbols Functional Description Functional Overview BORSCHT Functions Feeding Constant Current Zone Resistive Zone Constant Voltage Zone Programmable Voltage Current Range Characteristic Programmable Voltage Reserve 2-11 Extended Battery Feeding 2-12 SLIC Power Dissipation 2-12 Transmission Characteristics 2-13 Transmit Path 2-14 Receive Path 2-14 Impedance Matching 2-15 Transhybrid Balance 2-16 Ringing 2-16 Ringer Load 2-17 Ring Trip 2-17 Ringing Methods 2-18 DuSLIC Ringing Options 2-19 Internal Balanced Ringing SLICs 2-20 Internal Unbalanced Ringing with SLIC-P 2-21 External Unbalanced Ringing 2-22 Metering 2-22 Metering 12/16 Sinusoidal Bursts 2-22 Metering Polarity Reversal 2-24 Soft reversal 2-24 Signaling (Supervision) 2-25 DuSLIC Enhanced Signalprocessing Capabilities 2-26 DTMF Generation Detection 2-26 Caller Generation 2-28 Line Echo Cancelling (LEC) 2-30 Universal Tone Detection (UTD) 2-31 Message Waiting Indication 2-33 Three-party Conferencing 2-34 Modes Highway 2-35
Preliminary Product Overview
10.99
DuSLIC
Table Contents 3.4.1 3.4.2 3.4.3 3.4.3.1 3.4.3.2 3.4.3.3 3.4.3.4 3.4.3.5 3.5.1 3.5.2 3.5.3 3.5.4 4.1.1 4.1.2 5.1.1 5.1.2 5.2.1 5.2.2 6.1.1 6.2.1
Page
Operational Description Operating Modes DuSLIC Chipset Operating Modes SLICOFI-2 SLIC-E Operating Modes SLICOFI-2 SLIC-P Operating Modes Power Management Introduction Power Dissipation SLICOFI-2 Power Dissipation SLIC Power Down Modes Active Mode SLIC Power Consumption Calculation Active Mode 3-10 Ringing Modes 3-15 SLIC Power Consumption Calculation Ringing Mode 3-17 Test Modes 3-21 Introduction 3-21 Conventional Line Testing 3-22 DuSLIC Line Testing 3-22 Test Loops 3-25 Interfaces Interface with Serial Microcontroller Interface Interface Serial Microcontroller Interface IOM-2 Interface TIP/RING Interface SLICOFI-2 SLIC-E Interface SLICOFI-2 SLIC-P Interface 4-10 Electrical Characteristics Electrical Characteristics 4265 (SLIC-E) Absolute Maximum Ratings 4265 Operating Range 4265 Electrical Characteristics 4266 (SLIC-P) Absolute Maximum Ratings 4266 Operating Range 4266 Transmission DuSLIC Characteristics Application Circuits Balanced Ringing Protection Circuit SLIC-E SLIC-S Unbalanced Ringing Protection Circuit SLIC-P External Unbalanced Ringing with DuSLIC-S/E/P
10.99
Preliminary Product Overview
DuSLIC
List Figures Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure 2-10 Figure 2-11 Figure 2-12 Figure 2-13 Figure 2-14 Figure 2-15 Figure 2-16 Figure 2-17 Figure 2-18 Figure 2-19 Figure 2-20 Figure 2-21 Figure 2-22 Figure 2-23 Figure 2-24 Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure
Page
DuSLIC-E DuSLIC-P Chip Logic Symbol SLIC-E Logic Symbol SLIC-P Logic Symbol SLICOFI-2 Typical Line Circuit Functions Signal Paths Feeding Feeding Characteristic Constant Current Zone Resistive Zone Constant Voltage Zone Characteristic (Detailed Description) Voltage Reserve Schematic 2-11 Feeding Characteristics (ACTH, ACTR) 2-12 Power Dissipation 2-12 Signal Paths Transmission 2-13 Signal Flow Voice Channel 2-14 2/4-wire Conversion Hybrid Circuit. 2-16 Typical Ringer Loads used 2-17 Balanced Ringing SLIC-E SLIC-P 2-20 Unbalanced Ringing Signal 2-21 Teletax Injection Metering 2-23 Soft Reversal (Example Open Loop) 2-24 DuSLIC Signal Path 2-26 Bellcore On-hook Caller Physical Layer Transmission 2-30 Line Echo Cancellation Unit Block Diagram 2-31 Functional Block Diagram 2-32 Circuitry with Glow Lamp 2-33 Conference Block DuSLIC Channel 2-34 Circuit Diagram Power Consumption 3-10 SLIC-E Power Dissipation with switched Battery Voltage 3-12 SLIC-P Power Dissipation (Switched Battery Voltage, Long loops). 3-13 SLIC-P Power Dissipation (Switched Battery Voltage, Short Loops). 3-15 Circuit Diagram Ringing 3-17 Capacitance Measurement 3-21 Resistance Measurement 3-21 SLICOFI-2 Testloops 3-25 General Interface Timing Serial Int. Write Acc. Data Bytes Single Byte Com.) Serial Interface Read Acc. Data Bytes Transfered) IOM-2 Int. Timing Voice Channels (Per Frame) IOM-2 Interface Timing (DCL=4096 kHz, Frame) IOM-2 Interface Timing (DCL 2048 kHz, Frame)
10.99
Preliminary Product Overview
DuSLIC
List Figures Figure Figure Figure Figure Figure Figure Figure Figure Figure
Page
Minimal Application Circuit SLICOFI-2 SLIC-E Minimal Application Circuit SLICOFI-2 SLIC-P 4-10 Overload Compression 5-10 Application Circuit, Internal Balanced Ringing Typical Overvoltage Protection SLIC-E SLIC-S. Application Circuit, Unbalanced Ringing with SLIC-P (PEB 4266) Typical Overvoltage Protection SLIC-P Application Circuit, External Unbalanced Ringing Application Circuit, External Unbalanced Ringing Long Loops.
Preliminary Product Overview
10.99
DuSLIC
Preface
DuSLIC chip consists programmable dual channel SLICOFI®-2 CODEC single channel high-voltage SLIC chips. Organization this Document This Preliminary Product Overview divided into chapters. organized follows: Chapter Overview general description product, list features some typical applications. Chapter Functional Description main functions presented following functional block diagram. Chapter Operational Description brief description three operating modes: power down, active ringing (plus signal monitoring techniques). Chapter Interfaces Connection information including standard IOM®-2 interface timing frames pins. Chapter Electrical Characteristics Parameters, symbols limit values. Chapter Application Circuits Illustrations balanced ringing, unbalanced ringing protection circuits.
Preliminary Product Overview
10.99
DuSLIC
Overview
Overview
DuSLIC chip set, comprising dual channel SLICOFI-2 CODEC singlechannel SLIC chips. highly flexible CODEC/SLIC solution analog line circuit widely programmable. Users access different markets with single hardware design that meets different standards worldwide. interconnections between single channel high-voltage SLIC (170 process) dual channel SLICOFI-2 CODEC (advanced CMOS process) seamless fit. This guarantees maximum transmission performance with minimum necessary components. Currently there three DuSLIC chip sets available: DuSLIC-S (Standard), DuSLIC-E (Extended) DuSLIC-P (Power Management). Optimized different applications main differences ringing features, power management additional functions like DTMF recognition, Caller generation Universal Tone Detection (UTD). DuSLIC-E DuSLIC-S additionally different performance versions DuSLIC-E2 DuSLIC-S2 available. This document describes DuSLIC-E DuSLIC-P chip sets. other chip sets "DuSLIC Chip Selection Guide". line circuit functions implemented chip set: BORSCHT functions Max. VRMS sinusoidal ringing generation Metering Polarity Reversal 12/16 Sinusoidal Bursts Dual-Tone Multifrequency (DTMF) detection generation Caller generation. Universal Tone Detection (UTD) unit fax-/modemtone detection Line Echo Cancellation unit
Integrated battery switches guarantee minimum power consumption during off-hook, on-hook ringing modes. Test diagnosis functions have been integrated simplify testing. external test equipment except relay needed either subscriber line testing field board testing during production field. employment SLIC-E SLIC-P depends application. SLIC-E (PEB 4265) optimized access network requirements, while power management SLIC-P (PEB 4266) enhanced version extremely power-sensitive applications when internal unbalanced ringing required. DuSLIC Architecture Unlike traditional designs, DuSLIC splits SLIC function into high-voltage SLIC functions low-voltage SLIC functions. voltage functions handled SLICOFI-2 device. partitioning functions shown Figure 1-1. further information Chapter 2.2.
Preliminary Product Overview
10.99
DuSLIC
Overview
SLIC SLICOFI-2 SLIC
IOM®-2
SLIC Functions Voltage feed Transversal current sensing Longitudinal current sensing Overload protection Battery switching Ring amplification On-hook transmission Polarity reversal
SLIC Functions Programmable feed Ring generation Supervision Teletax generation Teletax Notch filter Ring trip detection Ground detection Hook switch detection
CODEC Filter Functions Filtering compression/expansion Programmable gain Programmable frequency Impedance matching Hybrid balance DTMF generation DTMF detection generation (caller Linear mode support (16-bit uncompressed voice data) IOM-2 PCM/µC interface Integrated test diagnosis functions (IDTF) Line echo cancelling (LEC) Universal tone detection (UTD) Three party conferencing Message waiting lamp support
ezm14034.wmf
Figure
DuSLIC-E DuSLIC-P Chip
Preliminary Product Overview
10.99
DUAL CHANNEL SLICOFI-2, SLIC DuSLIC
3265 4265 4266
Version
Features
Internal unbalanced/balanced ringing capability VRMS/85 VRMS Programmable Teletax (TTX) generation Programmable battery feed with cabability driving longer loops Fully programmable dual-channel CODEC Ground/loop start signaling P-MQFP-64-1 Polarity reversal Integrated test diagnosis functions On-hook transmission Integrated DTMF generator Integrated DTMF decoder Integrated caller (FSK) generator Optimized filter structure modem transmission Integrated Line Echo Cancellation unit Integrated fax/modem detection P-DSO-20-5 Three party conferencing PCM/µC mode) Message waiting lamp support (PBX) Power optimized architecture Power Management capability (integrated battery switches) Transmission Specification accordance with ITU-T Recommendation Q.552 Z-interface applicable LSSGR
Type 3265 (SLICOFI-2) 4265 (SLIC-E) 4266 (SLIC-P)
Preliminary Product Overview
Package P-MQFP-64-1 P-DSO-20-5 P-DSO-20-5
10.99
DuSLIC
Overview
Typical Applications
Infineon Technologies DuSLIC family particularily designed access network applications adresses major telephone applications including:
Digital Loop Carrier Wireless Local Loop Fiber Loop Private Branch Exchange Intelligent (Network Terminations) ISDN ISDN Terminal Adapters Central Office Voice over
Preliminary Product Overview
10.99
DuSLIC
Overview
Logic Symbols
Tip/Ring Interface
RING
VCMS CEXT
Line current
4265
AGND
Power supply
Feeding
BGND VBATL VBATH
Logic control
ezm14094.emf
Figure
Logic Symbol SLIC-E
Tip/Ring Interface
RING
VCMS CEXT
Line current
AGND
Power supply
4266
BGND VBATL VBATH VBATR
Feeding
Logic control
ezm14095.emf
Figure
Logic Symbol SLIC-P
10.99
Preliminary Product Overview
DuSLIC
Overview
Line current
ITACA ITACB VCMITA VCMITB DCPA DCPB DCNA DCNB CDCPA CDCNA CDCPB CDCNB VCMS ACPA ACPB ACNA ACNB IO1A IO2A IO3A IO4A IO1B IO2B IO3B IO4B
PCM/IOM-2 TS0/DIN TS1/DCLK TS2/CS DU/DOUT DD/DRB SEL24/DRA DCL/PCLK MCLK
IOM-2 Interface µC-Interface
Loop
Interface
3265
Loop
RSYNC RESET TEST CREF SELCLK VDDA VDDB GNDA GNDB VDDR GNDR VDDD GNDD VDDPLL GNDPLL
Logic control
Power supply
Feeding
ezm14096.emf
Figure
Logic Symbol SLICOFI-2
Preliminary Product Overview
10.99
DuSLIC
Functional Description
Functional Description
Functional Overview
DuSLIC chip cost-effective, high-performance solution that provides BORSCHT functions analog line circuit. DuSLIC advantage offering functions integrated single channel high-voltage SLIC dual channel DSP-based CODEC. important feature DuSLIC design fact that SLIC CODEC functions programmable dual-channel CODEC device. Conventional designs need number external components adapt circuit different countries applications. contrast, configuration software DuSLICOS used program following functions DuSLIC chip set: (battery) feed characteristics impedance matching Transmit gain Receive gain Hybrid balance Frequency response transmit receive direction Ring frequency amplitude Hook thresholds DTMF Universal Tone Detection Line Echo Cancellation Testfunctions modes
main challenges linecard development adapt above-mentioned functions country-specific requirements. These adaptations used handled hardware, approach that required different linecard board every modification specification. Because signal processing within SLICOFI-2 completely digital, possible adapt requirements listed above simply updating coefficients that control processing data. This means, example, that changing impedance matching hybrid balance longer requires hardware modifications. same hardware capable meeting requirements different markets. digital nature filters gain stages also assures high reliability, drifts (over temperature time) minimal variations between different lines. characteristics voice channels within SLICOFI-2 programmed independently each other. DuSLICOS software provided automate calculation coefficients match different requirements. DuSLICOS also verifies calculated coefficients.
Preliminary Product Overview 10.99
DuSLIC
Functional Description
BORSCHT Functions
Battery feed Overvoltage protection Ringing Signaling (supervision) Coding Hybrid 2/4-wire conversion Testing Figure shows BORSCHT functions with other function blocks normally required analog line circuit.
Current Sensor Offhook Detection RING VBAT/VH switch Control Logic Gain
SLIC
Supervision Level Metering Metering Generation DTMF
SLICOFI-2
Channel Prefilter Postfilter Hardware Filters Programmable Filters Gain Digital Signal Processing (DSP) Hardware Filters Programmable Filters Gain A-Law µ-Law Compander A-Law µ-Law IOM-2 Interface
Interface IOM-2 Interface
Channel Current Sensor Offhook Detection RING VBAT/VH switch Control Logic Gain SLIC Interface Control Ringing
SLIC
Prefilter Postfilter
Controller
DCCTL
Serial Interface
SLICOFI-2 channel
both SLICOFI-2 channels
ezm22007.emf
Figure
Typical Line Circuit Functions
following paragraphs explain advantages using DuSLIC implement BORSCHT functions. Battery Feed analog line circuit provides voltage current subscriber equipment. conventional line circuits, extra hardware needed adapt battery feed characteristics requirements different applications countries. With DuSLIC chip set, battery feed (DC) characteristics programmed SLICOFI-2 (low-voltage SLIC function, Figure 1-1) applied line SLIC.
Preliminary Product Overview
10.99
DuSLIC
Functional Description Overvoltage Protection Overvoltage protection indispensable prevent damage line circuit system exposed high voltages that result from power lines crossing lightning strikes. robust SLIC technology together with external cost protection network, consisting varistors, resistors thyristor diodes, form reliable overvoltage protection solution. overvoltage occurs, protection network separates DuSLIC from Ring lines. Ringing ringing signal low-frequency, high-voltage signal subscriber equipment. conventional line circuits, ringing voltage VRMS VRMS) generated external ringing generator applied Ring lines relay. With DuSLIC chip set, ringing generator integrated this relay needed. This saves space costs line circuit design. ringing signal generated low-voltage SLICOFI-2 amplified high-voltage SLIC. DuSLIC supports balanced unbalanced ringing. With balanced ringing, ringing voltage applied differentially Ring lines. With unbalanced ringing, ringing voltage applied single-ended either Ring line against potential which near ground (for details "Ringing Modes" page 3-15). Balanced ringing generated SLIC-E, while SLIC-P generate both balanced unbalanced ringing. Signaling (Supervision) DuSLIC must detect when subscriber changes from on-hook mode off-hook mode both non-ringing (hook switch detection) ringing modes (ring trip detection). With this chip set, thresholds ring trip detection programmed SLICOFI-2 suit applications without using external components. Coding SLICOFI-2 encodes analog input signal digital signal decodes signal analog signal. Both A-law µ-law coding supported selected software. Hybrid 2/4-wire Conversion subscriber equipment connected 2-wire interface (Tip Ring) where information transmitted bidirectionally. digital transmission through switching network, information must split into separate transmit receive paths wires). avoid generating echoes, hybrid function requires balanced network matched line impedance. Hybrid balancing programmed DuSLIC device without using external components.
Preliminary Product Overview
10.99
DuSLIC
Functional Description Testing Access analog loop necessary perform regular measurements involved monitoring local loop. Line circuit functions must also tested. conventional line circuit solutions, test units have switched perform loop line circuit tests. remote testing unit relays normally necessary perform full range tests. DuSLIC already offers number internal test features check both local loop line circuit. Additional Line Circuit Functions: Teletax Metering many countries, Teletax metering signals (TTX signals) sent subscriber billing purposes. 12/16 sinusoidal metering burst transmitted. soon metering pulses applied subscriber line, they also divert transmit signal path which means that notch filter block 12/16 signal prevent overloading transmit converter. contrast conventional line circuits, DuSLIC chip generates metering signal internally. fact that notch filter integrated advantages DuSLIC. DTMF DTMF signal used touchtone signaling from subscriber Central Office. Each digit represented pair tones. DuSLIC integrated DTMF decoder. decoder monitors transmit path valid tone pairs outputs corresponding digital code each pair. DuSLIC also integrated DTMF generator comprising tone generators. Caller Frequency Shift Keying (FSK) Modulator Caller used provide caller information subscriber during on-hook transmission. DuSLIC integrated modulator capable sending caller information. caller modulator complies with requirements ITU-T recommendation V.23 Bell 202. Universal Tone Detection Unit (UTD) Universal Tone Detection unit used detect special tones, e.g. fax- modem-tones. This e.g. useful activating optimized filter coefficient modem transmission. Line Echo Cancellation Unit (LEC) adaptive Line Echo Cancellation unit used cancellation near echos.
Preliminary Product Overview 10.99
DuSLIC
Functional Description
Feeding
Analog telephones need current off-hook state. speech signals receive transmit directions superimposed this current. Once off-hook state been detected, SLIC must supply current subscriber line. current typically range depending local country specifications. Conventional linecard solutions require additional hardware adjust feed current meet different country specifications. contrast, feeding with SLICOFI-2 fully programmable. Special digital filter technology offers extremely cost-effective solution that more flexible than analog feeding circuits. feeding characteristic SLICOFI-2 programmed using software coefficients. Figure shows signal paths feeding between SLICOFI-2:
Transmit path
RIT1A
ITACA
SLIC
Channel
IT2A CVCMITA
VCMITA DCPA DCNA ACPA ACNA
(data upstream)
RING
SLICOFI-2
IT1B ITACB
IOM-2 Interface
(data downstream)
SLIC
RING Channel
IT2B CVCMITB
VCMITB DCPB DCNB ACPB ACNB
Receive path
ezm140374.emf
Figure
Signal Paths Feeding
10.99
Preliminary Product Overview
DuSLIC
Functional Description Characteristic Feeding Zones DuSLIC feeding characteristic three different zones: constant current zone, resistive zone constant voltage zone. programmable voltage reserve selected avoid clipping high signals (e.g. TTX) take into account voltage drop SLIC (see Chapter 2.3.5). feeding characteristic shown Figure 2-3.
ITIP/RING Constant current zone ILIM Resistive zone
Constant voltage zone
Programmable voltage reserve VRES |VBAT| VTIP/RING
ezm14017.emf
Figure
Feeding Characteristic
simplified diagram shows constant current zone ideal current source with infinite internal resistance, while constant voltage zone shown ideal voltage source with internal resistance specification internal resistances Chapter 2.3.4
Preliminary Product Overview
10.99
DuSLIC
Functional Description
2.3.1
Constant Current Zone
off-hook state, feed current must usually kept constant value independent load (see Figure 2-4). SLIC senses current supplies this information SLICOFI-2 (input control). SLICOFI-2 compares actual current with programmed value adjusts SLIC drivers necessary. ITIP/RING constant current zone programmable from
ITIP/RING RLOAD ILIM RK12
VRES |VBAT|
Figure Constant Current Zone
VTIP/RING
ezm14016.emf
Depending load, operating point determined VTIP/RING between Ring pins. operating point calculated from: VTIP/RING RLOAD ITIP/RING where RLOAD RPRE RLINE RPHONE,OFFHOOK RPRE RPROT RSTAB (see Figure 6-1, page Figure 6-2, page 6-2).
lower load resistance, lower voltage between Ring pins.
Preliminary Product Overview
10.99
DuSLIC
Functional Description
2.3.2
Resistive Zone
programmable resistive zone SLICOFI-2 provides extra flexibility over wide range applications. resistive zone used very long lines where battery incapable feeding constant current into line. operating point this case crosses from constant current zone medium impedance loops resistive zone high impedance loops (see Figure 2-5). resistance zone RK12 programmable from RPRE 1000
ITIP/RING RLOAD RK12 ILIM
VRES |VBAT|
Figure Resistive Zone
VTIP/RING
ezm14035.emf
Preliminary Product Overview
10.99
DuSLIC
Functional Description
2.3.3
Constant Voltage Zone
constant voltage zone used some applications supply current through line. this case VTIP/RING constant (see Figure 2-6) current depends load between Ring pins.
ITIP/RING
ILIM
RK12 VRES RLOAD
|VBAT|
Figure Constant Voltage Zone
VTIP/RING
ezm14036.emf
2.3.4
Programmable Voltage Current Range Characteristic
above chapters idealized characteristics were shown. detailed description given Figure 2-7.
ITIP/RING
RK12 RPRE RPROT RSTAB
VLIM
Figure Characteristic (Detailed Description)
VTIP/RING
ezm22009.wmf
Preliminary Product Overview
10.99
DuSLIC
Functional Description constant current zone finite resistor value typically usually applied stability reasons. constant voltage zone internal resistor value applied. external resistors RPRE RStab RProt necessary stability protection define resistance seen RING wires application. programmable range parameters IK1, VK1, RK12 VLIM given Table 2-1.
Table Symbol
Characteristic Programmable Range VLIM RK12 VLIM VLIM RK12 only (VK1, IK1) (VK1, IK1) (VK2, IK2) Condition
RK12 VLIM
1000
VLIM
only (VK1, IK1)
Preliminary Product Overview
2-10
10.99
DuSLIC
Functional Description
2.3.5
Programmable Voltage Reserve
avoid clipping speech signals well metering pulses, programmable voltage reserve VRES (see Figure 2-3) provided. VRES consists Voltage reserve SLIC output buffers: this voltage drop depends output current through Ring pins. standard output current this voltage reserve volts (see Table 3-5). Voltage reserve speech signals: Voltage reserve metering pulses: signal amplitude VTTX depends local specifications varies from VRMS several VRMS load obtain VTTX VRMS load RPRE (RPRE RPROT RSTAB (see Figure 6-2, page 6-2)), VRMS 4.24 VPEAK needed SLIC output. VRES must therefore programmed 10.24 (SLIC drop peak current speech TTX) speech signals) 4.24 (TTX-signal)).
RPRE
SLIC
RPRE
VTTX
ezm14032.wmf
Figure
Voltage Reserve Schematic
Preliminary Product Overview
2-11
10.99
DuSLIC
Functional Description
2.3.6
Extended Battery Feeding
battery voltage sufficient supply minimum required current through line even resistive zone, auxiliary positive battery voltage used expand possible voltage amplitude between Ring. With this voltage (VHR VBATH), possible supply constant current through very long lines. Figure shows feeding impedances RMAX,ACTH ACTH mode RMAX,ACTR ACTR mode (for ACTH ACTR modes Chapter 3.1).
ITIP/RING
ACTH Normal Mode
ACTR Boosted Mode
RMAX, ACTH RMAX, ACTR RK12, ACTR
ILIM IMIN
RK12, ACTH
VK1, ACTH
|VBATH|
DuSLIC-S/-E,
VK1, ACTR
DuSLIC-P
|VHR VBATH|1) |VBATR|2)
VTIP/RING
ezm23019.emf
Figure
Feeding Characteristics (ACTH, ACTR)
2.3.7
SLIC Power Dissipation
power dissipation SLIC estimated power dissipation output stages (see Chapter 3.4.3). power dissipation calculated from: PSLIC (VBAT VTIP/RING) ITIP/RING
ITIP/RING
SLIC output stage power dissipation constant current zone
ILIM
SLIC output stage power dissipation constant voltage zone
VBAT
VTIP/RING
ezm14021.wmf
Figure 2-10 Power Dissipation
Preliminary Product Overview 2-12 10.99
DuSLIC
Functional Description
Transmission Characteristics
SLICOFI-2 connects digital world either IOM-2 interface. SLIC performs high voltage functions. receive direction, SLICOFI-2 converts data from network outputs differential analog signal (ACP ACN) SLIC, that amplifies signal applies subscriber line. transmit direction, transversal (IT) longitudinal (IL) currents line sensed SLIC SLICOFI-2. capacitor separates transversal line current into (IT) (ITAC) components. ITAC sensed transversal (also called metallic) current line, includes both receive transmit components. SLICOFI-2 separates receive transmit components digitally, transhybrid circuit (see Figure 2-13). Figure 2-11 shows signal paths transmission between SLIC SLICOFI-2:
Transmit path
RIT1A
ITACA
SLIC
Channel
IT2A CVCMITA
VCMITA DCPA DCNA ACPA ACNA
(data upstream)
RING
SLICOFI-2
IT1B ITACB
IOM-2 Interface
(data downstream)
SLIC
RING Channel
IT2B CVCMITB
VCMITB DCPB DCNB ACPB ACNB
Receive path
ezm140373.emf
Figure 2-11 Signal Paths Transmission signal flow within SLICOFI-2 voice channel shown Figure 2-12 following schematic circuitry. With exception analog filter functions, signal processing performed digitally SLICOFI-2.
Preliminary Product Overview 2-13 10.99
DuSLIC
Functional Description
SLIC
SLICOFI-2 Channel Channel
SLIC
Transmission Prog. Filter Impedance Matching Teletax Adapter Teletax Generator Prog. Filter Transhybrid Balancing
Level Metering Compressor
Current Sensor
Tone Generators Expander Caller
Transmission Ring/Tip Level Metering Polarity Reversal Ring Generator Ramp Generator Characteristic
ezm34000.wmf
Figure 2-12 Signal Flow Voice Channel
2.4.1
Transmit Path
current sense signal (ITAC) converted voltage external resistor. This voltage first filtered simple anti-aliasing filter (Prefilter, Figure 2-1) that stops producing noise voiceband from signals near sampling frequency. conversion done 1-bit sigma-delta converter. digital signal down-sampled further routed through programmable gain filter stages. coefficients filter gain stages programmed meet specific requirements. processed digital signal goes through compander (CMP) that converts voice data into A-law µ-law codes. time slot assignment unit outputs voice data programmed time slot. SLICOFI-2 also operate 16-bit linear mode processing uncompressed voice data. this case, time slots used voice channel.
2.4.2
Receive Path
digital input signal received IOM-2 interface. Expansion (EXP), low-pass filtering, frequency response correction gain correction performed DSP. digital data stream up-sampled converted corresponding analog signal. After smoothing post-filters SLICOFI-2 (Postfilter, Figure 2-1), signal SLIC, where superimposed
Preliminary Product Overview
2-14
10.99
DuSLIC
Functional Description signal. signal been processed separate path. signal, generated digitally within SLICOFI-2, also added.
2.4.3
Impedance Matching
SLIC outputs voice signal line (receive direction) also senses voice signal coming from subscriber. impedance SLIC load impedance need matched order maximize power transfer minimize 2-wire return loss. 2-wire return loss measure impedance matching between transmission line termination DuSLIC. actual line impedance however vary considerably, depending loop length, loaded/unloaded lines, cable type, etc. Reference networks have therefore been defined represent average characteristics country's local loop. These reference networks differ from country country need reflected linecard being used that country. Impedance matching done digitally within SLICOFI-2 providing three impedance matching feedback loops. loops feed transmit signal back receive signal simulating programmed impedance through SLIC. When calculating feedback filter coefficients, external resistors between protection network SLIC (RPRE RPROT RSTAB, Figure 6-2, page 6-2) have taken into account. Impedance programmed appropriate value (real complex impedance values). This means device adapted requirements anywhere world without hardware changes that necessary with conventional line card designs.
Preliminary Product Overview
2-15
10.99
DuSLIC
Functional Description
2.4.4
Transhybrid Balance
Digital switching systems handle voice data only receive transmit data separated distinctive channels. analog voice signal local loop 2-wire full duplex, needs converted from 2-wire 4-wire wires each receive transmit). circuitry, that performs this task, commonly referred hybrid circuit (see Figure 2-13)
Transmit signal
2-wire transmit
2-wire subscriber line
Hybrid circuit
Unwanted echo path
2-wire receive
Receive signal
ezm14012.wmf
Figure 2-13 2/4-wire Conversion Hybrid Circuit prevent receive voice signal being looped back (echoed) directly into transmit voice path, hybrid circuit separate receive path signal from transmit path signal. contrast with conventional line card designs, echo cancellation implemented digitally within SLICOFI-2. Figure 2-13 shows transhybrid loop that subtracts receive signal from transmit signal. hybrid function also dependent loop condition. adapted country-specific requirements. conventional line card designs, this done external hardware adaptation. With SLICOFI-2, adaptation simply matter updating coefficients. hardware changes necessary.
Ringing
With technology used SLIC, ringing voltage VRMS generated on-chip without need external ringing generator. SLICOFI-2 generates sinusoidal ringing signal that causes less noise cross-talk neighboring lines than trapezoidal ringing signal. ringing frequency programmable from advantage over traditional applications with central ringing generator decoupling resistors (approx. very source impedance DuSLIC (approx. without RPROT). Thus possible supply subscriber line with lower ringing voltage from SLIC. SLIC-E SLIC-P support different ringing methods (see Chapter 2.5.3).
Preliminary Product Overview 2-16 10.99
DuSLIC
Functional Description
2.5.1
Ringer Load
typical ringer load thought resistor series with capacitor. Ringer loads usually described (Ringer Equivalence Number) value. used describe on-hook impedance terminal equipment, actually dimensionless ratio that reflects certain load. definitions vary from country country. commonly used described part that defines single either impedance impedance n-multiple equivalent parallel connection single RENs. this manual, references assume model. example, load would
6930
1386
ezm14024.wmf
Figure 2-14 Typical Ringer Loads used
2.5.2
Ring Trip
Once subscriber gone off-hook, ringing signal must removed within specified time, power must start feeding subscriber's phone. There ring trip methods: ring trip detection: applying voltage together with ringing signal, transversal loop current starts flow when subscriber goes off-hook. This current sensed this used hook criterion. threshold ring trip current internally SLICOFI-2, programmed digital interface. voltage ring trip detection generated DuSLIC chip internal ring trip function used, even external ringing generator used. ring trip detection: short lines loop length) power applications, offset avoided reduce battery voltage given ring amplitude. Ring trip detection then performed interpreting impedance without using offset voltage. Most applications with DuSLIC using ring trip detection, which more reliable than ring trip detection.
Preliminary Product Overview
2-17
10.99
DuSLIC
Functional Description
2.5.3
Ringing Methods
There methods ringing: Balanced ringing (bridged ringing) Unbalanced ringing (divided ringing)
Table
Unbalanced versus Balanced Ringing Balanced Ringing: opposite-phase ringing signal applied both Ring lines. resulting ringing signal differential signal between Ring line. vRING VDC,RING then vRING VDC,RING= VDC,RING
Unbalanced Ringing: ringing signal applied only either Ring line, whereas applied other line.
SLIC
SLIC
ezm140311.wmf
ezm140312.wmf
VDC,RING VRING
ezm140313.wmf
VDC,RING
BGND
ezm140317.wmf
resulting ringing amplitude balanced mode twice amplitude This advantage over unbalanced mode because ringing generator circuit balanced mode handle voltages only half amplitude generate same amplitude ringing signal. SLIC process technology used capable generating balanced ringing signals with amplitudes VRMS. Internal balanced ringing generally offers more benefits compared unbalanced ringing:
Preliminary Product Overview
2-18
10.99
DuSLIC
Functional Description Balanced ringing produces much less longitudinal voltage, which results lower amount noise coupled into adjacent cable pairs using differential ringing signal, lower supply voltages become possible phone itself cannot distinguish between balanced unbalanced ringing. Where unbalanced ringing still used, often simply historical leftover. comparison between balanced unbalanced ringing also ANSI document T1.401-1993. Additionally, integrated ringing with DuSLIC offers following advantages: Internal ringing need external ringing generator relays) Reduction board space because much higher integration fewer external components Programmable ringing amplitude, frequency ringing offset without hardware changes Programmable ring trip thresholds Switching ringing signal zero-crossing
2.5.4
DuSLIC Ringing Options
Application requirements differ with regard ringing amplitudes, power requirements, loop length loads. DuSLIC options include different SLICs select most appropriate ringing methods (see Table 2-3):
Table
Ringing Options with SLIC-E SLIC-P SLIC-E 4265 VRMS SLIC-P 4266 VRMS
SLIC Version Ringing facility, battery voltages Internal balanced ringing voltage VRMS (sinusoidal) used ring trip detection DC-voltage balanced ringing1) Internal unbalanced ringing Max. voltage VRMS (sinusoidal) DC-voltage unbalanced ringing Required SLIC supply voltages maximum ringing amplitude (typ.) Number battery voltages power saving
programmable typically 0.50
programmable typically 0.50 VRMS VBATR -150 (internal ringing used) (external ringing used)
most applications sufficient reliable ring detection. higher voltage will reduce achievable maximum ringing voltage. special applications full range voltage (VHR VBATH -10V) used programmable.
Preliminary Product Overview
2-19
10.99
DuSLIC
Functional Description SLIC-E used long-haul exchange requirements integrated facility balanced ringing VRMS. low-power SLIC-P optimized power-critical applications (e.g. intelligent ISDN network termination). Internal ringing used VRMS balanced VRMS unbalanced. lowest power applications where external ringing preferred, three different battery voltages used optimizing power consumption application. SLIC-E SLIC-P differ supply voltage configuration ring voltages (vT, SLICOFI-2. External ringing supported programmable I/Os RSYNC SLICOFI-2 both
2.5.5
Internal Balanced Ringing SLICs
SLIC-E SLIC-P support internal balanced ringing VRMS. ringing signal generated digitally within SLICOFI-2.
VDROP,T VRING,pp=
BGND
VDC,RING VDROP,R VBATH VBATR
SLIC-E SLIC-P
ezm140315.wmf
Figure 2-15 Balanced Ringing SLIC-E SLIC-P ringing mode, feeding active. programmable offset voltage applied line instead. During ring bursts, ringing offset ringing signal summed digitally within SLICOFI-2 accordance with programmed values. This signal then converted analog signal applied SLIC. SLIC amplifies signal supplies line with ringing voltages VRMS. balanced ringing mode, SLICs additional supply voltage (VHR SLIC-E, VBATR SLIC-P). total supply span VBATH SLIC-E -VBATR SLIC-P. maximum ringing voltage that achieved
Preliminary Product Overview
2-20
10.99
DuSLIC
Functional Description SLIC-E: VRING,RMS (VHR VBATH VDROP, VDC,RING) 1.41 SLIC-P: VRING,RMS VBATR VDROP,RT VDC,RING) 1.41 where: VDROP,RT VDROP,T VDROP,R With DUSLIC ringing voltages VRMS sinusoidal applied, also other ringing waveforms with other CREST-factors programmed. SLIC senses transversal current line supplies this information SLICOFI-2 pin. current monitored SLICOFI-2. current exceeds programmed ring trip threshold, SLICOFI-2 generates interrupt. Ring trip reliably detected reported within ring signal periods. ringing signal switched during zero crossing SLICOFI-2. detailed application diagram internal balanced ringing refer chapter "Application Circuits" (see Figure page 6-1).
2.5.6
Internal Unbalanced Ringing with SLIC-P
internal unbalanced ringing together with SLIC-P used ringing voltages VRMS. SLICOFI-2 integrated ringing generator used ringing signal applied either Ring line. Ringing signal generation same described above balanced ringing. Since only line used ringing, technology limits ringing amplitude about half value balanced ringing, maximum VRMS.
VDROP,R,BGND VDROP,T VDROP,T VDC,RING
BGND
VBATR VRING,p VDROP,R,VBATR vRING
VBATR
ezm140316.wmf
Figure 2-16 Unbalanced Ringing Signal above diagram shows example with ring line used ringing line fixed VDROP,T which drop output buffer line SLIC-P (typ. ring line fixed voltage VBATR used ring trip detection. maximum ringing voltage VRING,RMS VBATR VDROP,R,VBATR- VDROP,T) 2.82
Preliminary Product Overview
2-21
10.99
DuSLIC
Functional Description When called subscriber goes off-hook, path established from Ring line. current recognized SLICOFI-2 because monitors pin. interrupt indicates ring trip line current exceeds programmed threshold. same hardware used integrated balanced unbalanced ringing. balanced unbalanced modes configured software. maximum achievable amplitudes depend values selected VBATR. both balanced unbalanced ringing modes, SLICOFI-2 automatically applies removes ringing signal during zero-crossing. This reduces noise cross-talk adjacent lines.
2.5.7
External Unbalanced Ringing
SLICOFI-2 supports external ringing higher unbalanced ringing voltage requirements above VRMS with both SLICs. detailed application diagram unbalanced ringing Figure Figure page page 6-8. Since high voltages involved, external relay should used switch RING line switch external ringing signal together with voltage ring trip line. This results offset between Ring lines. SLICOFI-2 external ringing mode. synchronisation signal external ringer applied SLICOFI-2 RSYNC pin. external relay switched synchronously this signal SLICOFI-2 according actual mode DuSLIC. interrupt generated current exceeds programmed ring trip threshold.
Metering
There different metering methods: Metering sinusoidal bursts with either Polarity reversal Ring.
2.6.1
Metering 12/16 Sinusoidal Bursts
required amplitude sinusoidal metering signals varies from hundred millivolts VRMS even more, depending country specifications application (long loop short loop application). These signals superimposed onto speech signal. soon metering pulses applied subscriber line, they also divert transmit signal path which means that notch filter block 12/16 signal, prevent overloading transmit converter. contrast conventional line circuits, DuSLIC chip generates metering signal internally. fact that adaptive notch filter integrated advantages DuSLIC.
Preliminary Product Overview
2-22
10.99
DuSLIC
Functional Description Teletax Metering Filtering satisfy worldwide application requirements, SLICOFI-2 offers integrated metering injection either signals with programmable amplitudes. SLICOFI-2 also integrated adaptive notch filter switch signal line smooth way. When switching signal line, switching noise less than Figure 2-17 shows bursts certain points signal flow within SLICOFI-2.
ZL/2
Transmit-path Adaptive filter Gen.
SLIC
IMFilter
ZL/2 SLICOFI®-2
Receive-path
ezm14027.emf
Figure 2-17 Teletax Injection Metering integrated, adaptive notch filter guarantees attenuation external components filtering bursts required.
Preliminary Product Overview
2-23
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DuSLIC
Functional Description
2.6.2
Metering Polarity Reversal
SLICOFI-2 also supports metering changing actual polarity voltages TIP/RING lines. Metering with polarity reversal usually used phones (coin lines). Every time polarity changes, magnet phone releases coin.
2.6.2.1
Soft reversal
Some applications require smooth polarity reversal (soft reversal), shown Figure 2-18. Soft reversal helps prevent negative effects like non-required ringing. Soft reversal deactivated SOFT-DIS register BCR2. SOFT-DIS SOFT-DIS Immediate reversal performed (hard reversal) Soft reversal performed. Transition time (time from START SREND1, Figure 2-18) programmable CRAM-coefficients, default value
VTIP/RING
START
SR-END1
SR-END2 1/16*SR-END1 [ms]
ezm14038.wmf
Figure 2-18 Soft Reversal (Example Open Loop) START: soft ramp starts setting REVPOL register BCR1 characteristic switched off. SR-END1: soft reversal point, characteristic switched again. Programmable DuSLICOS software, e.g. U/8. SR-END2: soft reversal point, soft ramp switched off. Programmable DuSLICOS software, e.g. 1/16*SR-END1.
Preliminary Product Overview
2-24
10.99
DuSLIC
Functional Description
Signaling (Supervision)
Signaling subscriber loop monitored internally DuSLIC chip set. Supervision performed sensing longitudinal transversal line currents Ring wires. scaled values these currents generated SLIC SLICOFI-2 pins. Transversal line current: Longitudinal line current: where loop currents Ring wires.
Off-hook Detection Loop start signaling most common type signaling. subscriber loop closed hook switch inside subscriber equipment. active mode, resulting transversal loop current sensed internal current sensor SLIC. SLIC indicates subscriber loop current SLICOFI-2. external resistor (RIT1, RIT2, Figure 6-1) converts current information voltage ITB) pin. analog information first converted digital value. then filtered processed further which effectively suppresses line disturbances. result exceeds programmable threshold, interrupt generated indicate off-hook detection. similar mechanism used Power Down mode. this mode, internal current sensor switched minimize power consumption. loop current therefore sensed through resistors. information made available interpreted SLICOFI-2. applications using ground start loop signaling, DuSLIC ground start mode. this mode, wire switched high impedance mode. Ring ground detection performed internal current sensor SLIC transferred SLICOFI-2 pin.
Ground Detection scaled longitudinal current information transferred from SLIC external resistor SLICOFI-2. This voltage compared with fixed threshold value. specified (1.6 application circuit Figure 6-1) this threshold corresponds (positive negative). After further post-processing, this information generates interrupt ground detection indicated. post-processing performed guarantee ground detection, even longitudinal currents with frequencies 2/3, superimposed. time delay between triggering ground function registering ground interrupt will most cases less than Power Down mode, SLIC's internal current sensors switched ground detection disabled.
Preliminary Product Overview
2-25
10.99
DuSLIC
Functional Description
DuSLIC Enhanced Signalprocessing Capabilities
signal processing capabilities described this chapter realized Extended Digital Signal Processor (EDSP) except DTMF generation. Each function individually enabled disabled each DuSLIC channel. Therefore power consumption reduced according needs application. Figure 2-19 shows signal path DuSLIC with ADCs DACs, impedance matching loop, thranshybrid filter, gain stages connection EDSP.
HPX2
HPX1
XOUT
TTXA TTXG
Switch
DTMF
EDSP
VOUT
HPR2
HPR1
duslic_0005_ACsignal_path.emf
Figure 2-19 DuSLIC Signal Path
2.8.1
DTMF Generation Detection
Dual Tone Multi-Frequency (DTMF) signaling scheme using voice frequency tones signal dialing information. DTMF signal tones, from group (697-941 from high group (1209-1633 Hz), with each group containing four individual tones. This scheme allows unique combinations. these codes represent numbers from zero through nine telephone keypad, remaining codes (*,#,A,B,C,D) reserved special signaling. buttons arranged matrix, with rows determining group tones, columns determining high group tone each button. SLICOFI-2, standard DTMF tone pairs generated independent each channel integrated tone generators. Alternatively frequency amplitude tone generators programmed individually digital interface. Each tone generator switched off. generated DTMF tone signals meet frequency variation tolerances specified ITU-T Q.23 recommendation. Both channels SLICOFI-2 have powerful built-in DTMF decoder that will meet most national requirements. receiver algorithm performance meets quality criteria central office exchange applications. complies with requirements ITU-T Q.24, "Deutsche Telekom" network (BAPT Approval Specification
Preliminary Product Overview 2-26 10.99
DuSLIC
Functional Description Federal Office Post Telecommunications, Germany) Bellcore GR-30-CORE (TR-NWT-000506). performance algorithm adapted according needs application digital interface (detection level, twist, bandwith center frequency notch filter). Table shows performance characteristics DTMF decoder algorithm:
Table
Performance Characteristic SLICOFI-2 DTMF Decoder Algorithm Value dBm0 valid signal detection level Programmable Programmable Notes Programmable
Characteristics Valid input signal detection level Input signal rejection level Positive twist accept Negative twist accept Frequency deviation accept Frequency deviation reject DTMF noise tolerance (could same Minimum tone accept duration Maximum tone reject duration Signaling velocity Minimum inter-digit pause duration Maximum tone drop-out duration Interference rejection valid DTMF recognition
(1.5 Related center <±1.8 frequency Related center frequency referenced lowest amplitude tone
ms/digit
Level frequency referenced range Hz.480 lowest amplitude Level DTMF tone frequency
Gaussian noise influence Error rate better than Signal level dBm0, 10000 Pulse noise influence Impulse noise tape Error rate better than 10000
Preliminary Product Overview
2-27
10.99
DuSLIC
Functional Description event pauses pause followed tone pair with same frequencies before, this interpreted drop-out. pause followed tone pair with different frequencies other conditions valid, this interpreted different numbers. DTMF decoders switched individually reduce power consumption. normal operation, decoder monitors Ring wires ITAC pins (transmit path). Alternatively decoder switched also receive path. detecting valid DTMF tone pair, SLICOFI-2 generates interrupt appropriate indicates change status. DTMF code information provided register read digital interface. DTMF decoder also excellent speech-rejection capabilities complies with Bellcore TR-TSY-000763. algorithm been fully tested with speech sample sequences Series-1 Digit Simulation Test Tapes DTMF decoders from Bellcore.
2.8.2
Caller Generation
generator send calling line identification (Caller CID) integrated DuSLIC chip set. Caller generic name service provided telephone utilities that supply information like telephone number name calling party called subscriber start call. call waiting, Caller service supplies information about second incoming caller subscriber already busy with phone call. typical Caller (CID) systems, coded calling number information sent from central exchange called phone. This information shown display subscriber telephone set. this case, Caller information usually displayed before subscriber decides answer incoming call. line connected computer, caller information used search databases additional services offered. There methods used sending information depending application country specific requirements: Caller generation using DTMF signaling (see Chapter 2.8.1) Caller generation using DuSLIC contains DTMF generation units generation units which used both channels simultaneously.
Preliminary Product Overview
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10.99
DuSLIC
Functional Description DuSLIC Generation Different countries different standards send Caller information. SLICOFI2 chip compatible with widely used standards, Bellcore GR-30-CORE, British Telecom (BT) SIN227, SIN242 Cable Communications Association (CCA) specification TW/P&E/312. continuous phase binary frequency shift keying (FSK) modulation used coding which compatible with BELL (see Table 2-5) ITU-T V.23, most common standards. SLICOFI-2 easily adapted these requirements programming microcontroller interface. Coefficient sets provided most common standards.
Table
Modulation Characteristics ITU-T V.23 1300 2100 1200 baud Serial binary asynchronous Bell 1200 2200
Characteristic Mark (Logic Space (Logic Modulation: Transmission rate: Data format:
Caller data calling party transferred microcontroller interface into SLICOFI-2 buffer register. enable signal, together with first write operation into buffer register, will start sending data when amount data buffer register exceeds buffer request size plus two. data transfer into buffer register handled SLICOFI-2 interrupt signal. Caller data transferred from buffer interface pins SLIC Ring wires. DuSLIC offers different levels framing: basic level framing mode data necessary implement data stream including channel seizure, mark sequence framing data packet checksum configured firmware. SLICOFI-2 transmits data stream same order which data written buffer register. high level framing mode number cannel seizure mark bits programmed automatically sent DuSLIC. Only data packet information written into buffer. example below shows signaling on-hook data transmission accordance with Bellcore specifications. Caller information applied Ring sent during period between first second ring burst.
Preliminary Product Overview 2-29 10.99
DuSLIC
Functional Description
Bellcore On-hook Caller Physical Layer Transmission
First Ring Burst
Channel Seizure
Mark
Data Packet
Second Ring Burst
Parameter Message Parameter Header Parameter Body
Message Type Message Lenght1 Parameter Type Parameter Length Parameter Byte More Parameter Bytes More Parameter Messages
Checksum
Message Header Message
Message Body
Message length equals number bytes follow message body, excluding checksum. 0.2-3 second ring burst. 0.5-1.5 seconds between first ring burst start data transmission. alternating mark space bits. mark bits. seconds. 200ms 1.8-3 second ring burst
ezm14014.wmf
Figure 2-20 Bellcore On-hook Caller Physical Layer Transmission
2.8.3
Line Echo Cancelling (LEC)
DuSLIC contains adaptive line echo cancellation unit cancellation near echoes. With adaptive balancing unit transhybrid loss improved value about maximum echo length considered cancellation available each channel only when further signal processing functions EDSP used. line echo cancellation unit especially useful front DTMF detection unit. critical situations performance DTMF detection improved. both DuSLIC channels DTMF detection used maximum line echo lenght reduced DuSLIC line echo canceller compatible with applicable standards ITU-T G.165 G.168 with restriction that longer echo cancelling path than cannot realized. unit consists basically filter shadow filter coefficient adaption mechanism between these filters shown Figure 2-21.
Preliminary Product Overview
2-30
10.99
DuSLIC
Functional Description
SLEC, Echo
adapt coeff. Shadow Filter
SLEC,
copy coeff.
Filter
SLEC,
duslic_0004_LECunit.emf
Figure 2-21 Line Echo Cancellation Unit Block Diagram adaption process controlled three parameters PowLECR (Power Detection Level Receive), DeltaPLEC (Delta Power) DeltaQ (Delta Quality). Adaption takes place only both following conditions hold: SLEC, PowLECR SLEC, SLEC, DeltaPLEC With first condition, adaption small signals avoided. second condition avoids adaption during double talk. parameter DeltaPLEC represents echo loss provided external circuitry. adaption shadow filter performed better than adaption actual filter value more than DeltaQ then shadow filter coefficients will copied actual filter. start adaption process coefficients unit default initial values coefficient values. freezing coefficients also performed.
2.8.4
Universal Tone Detection (UTD)
DuSLIC Universal Tone Detection (UTD) unit which used detect special tones receive transmit path especially modem tones (e.g. modem startup sequence described recommendation ITU-T V.8). This allows modem optimized filter coefficients V.34 V.90 connection takes place. DuSLIC detects that modem connection will take place, optimized
Preliminary Product Overview 2-31 10.99
DuSLIC
Functional Description filter coefficients modem connection downloaded before modem connection With this mechanism implemented DuSLIC chipset always optimum modem transmission rate achieved. Figure 2-22 shows functional block diagram unit:
Programmable Band-pass
SUTD
Limit Evaluation Logic Limit
Figure 2-22 Functional Block Diagram Initially, input signal filtered programmable band-pass (center frequency band width fBW). Both in-band signal (upper path) out-of-band signal (lower path) determined absolute value calculated. Both signals furthermore filtered limiter low-pass. signal samples (absolute values) below programmable limit LevN (Noise Level) zero other signal samples diminished LevN. purpose this limiter increase noise robustness. After limiter stages both signals filtered fixed pass. evaluation logic block determines when tone interval silence interval detected interrupt generated receive transmit path. status will both following conditions hold least time RTime without breaks exceeding time AGAPTime: in-band signal exceeds programmable level LevS difference in-band out-of-band signal levels exceeds DeltaUTD status will reset least these conditions violated least time RGAPTime without breaks exceeding ABREAKTime. times AGAPTime ABREAKTime help reduce effects sporadic dropouts. Bandwith parameter programmed negative value unit used detection silence intervals whole frequency range. DuSLIC unit compatible with ITU-T G.164. resistent against modulation with sinusoidal signals phase reversal able detect modulation phase reversal.
Preliminary Product Overview
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10.99
DuSLIC
Functional Description
Message Waiting Indication
Message Waiting function that required applications. Message Waiting Indication (MWI) lamp activated indicating subscriber that message arrived. DuSLIC Message Waiting function uses glow lamp subscriber phone. Current does flow through glow lamp until voltage reaches threshold value approximately this threshold, neon lamp will start glow. When voltage reduced, current falls under certain threshold lamp extinguished. DuSLIC high-voltage SLIC technology (170 which able activate glow lamp without external components. hardware circuitry shown Figure 2-23 below. figure shows typical telephone circuit with hook switch on-hook mode, together with impedances on-hook (ZR) off-hook (ZL) modes.
Lamp
Impedance Ringer Impedance Resistor Message Waiting
ezm14066.wmf
Figure 2-23 Circuitry with Glow Lamp glow lamp circuit also requires resistor (RMW) lamp Lamp) built into phone. When activated, lamp must able either blink remain constantly non-DuSLIC solutions, telephone ringer respond briefly signal slope steep, which desirable. DuSLIC's integrated ramp generator increases voltage slowly, ensure activating lamp ringer.
Preliminary Product Overview
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10.99
DuSLIC
Functional Description
2.10
Three-party Conferencing
Each DuSLIC channel three-party conferencing facility consisting four registers, adders gain stages microprogram corresponding control registers (see Figure 2-24). Three-party conferencing available PCM/µC-mode only.
Highways Subscribers channel
CONF_EN
CONF_EN
Subscriber
ezm14069.emf
Figure 2-24 Conference Block DuSLIC Channel Note: G.Gain Stage (Gain Factor), X1-X4.PCM transmit channels, R1-R4.PCM receive channels, S.examples voice data channels X1-X4, R1-R4 Table shows possible three party conferencing modes corresponding selection transmit receive channels (see also Figure 2-24). timeslot assignment, PCM-highway selection, line drivers behaviour conferencing facility itself controled various registers1). programmable gain stage able adjust gain conferencing voice data range prevent overload signals.
explained this document.
Preliminary Product Overview
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10.99
DuSLIC
Functional Description
Table
Conference Modes
Receive Channels Transmit Channels Subscriber
Mode Active External Conference External Conference Active Internal conference
After reset power down mode communication performed highways. Also when selecting timeslots recommended switch line drivers setting control bits zero. Active This normal operating mode without conferencing. Only channels voice data transferred from subscriber analog subscriber vice versa. External Conference this mode, SLICOFI-2 acts server three-party conference subscribers from device connected highways. SLICOFI-2 channel remain Power Down mode lower power consumption. External Conference Active with external conference mode, external three-party conference performed. same time internal phone call active using channels Internal Conference analog subscriber conference partners, internal conference mode selected. partners need conference facility their own, since SLICOFI-2 performs necessary additions.
2.11
Modes Highway
addition standard 8-kHz transmission PCM-interface modes, there also 16kHz modes high data transmission performance. Table shows configuration channels different interface modes.
Preliminary Product Overview
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10.99
DuSLIC
Functional Description
Table Config. Bits
PCM16K
PCM/µC Interface Modes Receive Channels
Transmit Channels
Mode
Depends conference mode
Mode
A-HB A-LB S-HB S-LB Depends conference mode
PCM16 Mode
LIN16 Mode
DS1HB
DS1LB
DS2HB
DS2LB
DS1HB
DS1LB
DS2HB
DS2LB
Empty cells table indicate unused data receive channels switched-off line drivers transmit channels
configuration bits PCM16K used select following interface modes: mode: Normal mode used voice transmission channels (receive transmit). input channels always active different conference configurations. status output channels depends conference mode configuration. mode: Similar mode, 16-bit linear data 8-kHz sample rate channels (receive) (transmit). PCM16 Mode: Mode higher data transmission rate PCM-encoded data using 16-kHz sample rate (only PCM/µC interface mode). this mode, channels (X1, used receive (transmit) samples data (DS1, DS2) each 8-kHz frame. LIN16 Mode: Like PCM16 mode 16-kHz sample rate linear data. channels used receiving (transmitting) high bytes linear data samples DS2.
Preliminary Product Overview
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DuSLIC
Operational Description
Sleep (SL)
Operational Description
Operating Modes DuSLIC Chipset
Sleep mode, off-hook detected analog comparator SLICOFI-2 transferred DU-pin. system clock stopped this mode. This mode should applied only lines with less interference because sleep mode hook information filtering take place SLICOFI-2. Power Down Resistive (PDR) Power Down resistive mode standard mode non-active lines. Off-hook detected current value DSP, compared with programmable threshold filtered data upstream persistence checker. power management SLIC-P switched Power-Down-Resistive-High Power-Down-Resistive-Ring mode. HIRT HIRT mode, SLICOFI-2 able perform input offset measurement current sensors. linedrivers SLIC shut down resistors switched line. Off-hook detection possible. Power Down High Impedance (PDH) Power Down High Impedance mode, SLIC totally powered down. offhook sensing performed. This mode used emergency shutdown line. Active High (ACTH) regular call performed, voice metering pulses transferred telephone line dc-loop operational Active High mode. Active (ACTL) Active mode similar Active High mode. only difference that SLIC uses lower battery voltage VBATL (bit ACTL Active Ring (ACTR) Active Ring mode different SLIC-E SLIC-P. SLIC-E uses addiitional positive voltage extended feeding SLIC-P will switch negative battery voltage VBATR.
Preliminary Product Overview 10.99
DuSLIC
Operational Description Ringing SLICOFI-2 switched ringing mode, SLIC switched ACTR mode. With SLIC-P connected SLICOFI-2, Ring Ring (ROR) mode allows unbalanced internal ringing Ring wire. wire battery ground. ring signal will superimposed VBATR Ring (ROT) mode equivalent mode. Active with This test mode where wire high impedance mode. used special line testing. only available with Active SLICOFI-2 enable necessary test features. Active with equivalent mode with ring wire high impedance. Active with Metering allowed active mode used metering either with Reverse Polarity with Signals. Ground Start wire High-Impedance Ground Start Mode. current drawn ring wire leads Signal indicating off-hook. Ring Pause ring Burst switched ring Pause, SLIC remains specified mode off-hook recognition behaves like ringing Mode (Ring Trip).
Preliminary Product Overview
10.99
DuSLIC
Operational Description
Table
Operating Modes SLICOFI-2 SLIC-E
4265 Operating Modes
SLIC internal supply voltages (+/-) [VHI VBI] Open VBATH Open VBATH System functionality Active circuits Tip/Ring output voltage
SLICOFI-2 SLIC mode mode
Sleep
PDRH
None
None
High Impedance BGND VBATH (via
Off-hook detect Off-hook, analog off-hook comparator comparator
Power Down resistive
PDRH
Open VBATH
Off-hook detect Off-hook, DC-transmit BGND VBATH active path (via mode (DSP) Off-hook detect Off-hook, DC-transmit BGND VBATH active path (via mode (DSP) Voice and/or transmission Voice and/or transmission Voice and/or transmission Buffer, Sensor, DC+AC-Loop,TTXgenerator (opt.) Buffer, Sensor, DC+AC-Loop, TTXgenerator (opt.) Buffer, Sensor, DC+AC-Loop, TTXgenerator (opt.) Tip:
(VBATL+VAC+VDC)
PDRHL
Open VBATH
Active ACTL (ACTL)
BGND VBATL
Ring:
(VBATL-VAC-VDC)
Active High (ACTH) Active Ring (ACTR)
ACTH
BGND VBATH
Tip:
(VBATH+VAC+VDC)
Ring:
(VBATH-VAC-VDC)
ACTR
VBATH
Tip:
(VBATH +VHR +VAC +VDC)
Ring:
(VBATH+VHR-VAC -VDC)
Ringing (Ring)
ACTR
VBATH
Balanced Ring Buffer, Sensor, DCsignal feed Loop, ring generator (incl. DC-offset)
Tip:
(VBATH+VHR+VDC +VAC)
Ring:
(VBATH+VHR-VDC -VAC)
Ring Pause
ACTR
VBATH
DC-offset feed
Buffer, Sensor, DCLoop, ramp generator
Tip:
(VBATH+VHR+VDC +VAC)
Ring:
(VBATH+VHR-VDC -VAC)
Preliminary Product Overview
10.99
DuSLIC
Operational Description Table 4265 Operating Modes
SLIC internal supply voltages (+/-) [VHI VBI] VBATH System functionality Active circuits Tip/Ring output voltage
SLICOFI-2 SLIC mode mode
HIRT
HIRT
E.g. sensor offset calibration E.g. line test (Tip)
Sensor, DC-transmit path Tip-Buffer, Sensor, DC+AC-Loop
High Impedance Tip:
(VBATH+VHR+VAC +VDC)
Active with
VBATH
Ring: high impedance Active with VBATH E.g. line test (Ring) Ring-Buffer, Sensor, DC+AC-Loop Ring:
(VBATH+VHR- -VDC)
Tip: high impedance
load ext. switching from PDRH ACTH onhookmode
VAC.Tip Ring Voltage VDC.Tip Ring Voltage
Preliminary Product Overview
10.99
DuSLIC
Operational Description
Table
Operating Modes SLICOFI-2 SLIC-P
4266 Operating Modes
SLIC internal supply voltages (+/-) System functionality Active circuits Tip/Ring output voltage
SLICOFI-2 SLIC mode mode
Sleep
PDRH
VBATR VBATH
None
None
High Impedance BGND VBATH (via BGND VBATH (via
Off-hook detect Off-hook, analog off-hook comparator comparator Off-hook detect Off-hook, analog off-hook comparator comparator
Sleep
PDRR
VBATR
Power Down resistive
PDRH
VBATH
Off-hook detect Off-hook, DC-transmit BGND VBATH active path (via mode (DSP) Off-hook detect Off-hook, DC-transmit BGND VBATH active path (via mode (DSP) Off-hook detect Off-hook, analog active comparator mode (DSP) BGND VBATR (via
PDRHL VBATH
PDRR
VBATR
PDRRL VBATR
Off-hook detect Off-hook, DC-transmit BGND VBATR active path (via mode (DSP) Voice and/or transmission Voice and/or transmission Voice and/or transmission Buffer, Sensor, DC+AC-Loop,TTXgenerator (opt.) Buffer, Sensor, DC+AC-Loop, TTXgenerator (opt.) Buffer, Sensor, DC+AC-Loop, TTXgenerator (opt.) Tip:
(VBATL+VAC+VDC)
Active ACTL (ACT)
VBATL
Ring:
(VBATL-VAC-VDC)
Active ACTH High (ACT)
VBATH
Tip:
(VBATH+VAC+VDC)
Ring:
(VBATH-VAC-VDC)
Active ACTR Ring (ACT)
VBATR
Tip:
(+VBATR+VAC+VDC)
Ring:
(+VBATR-VAC-VDC)
Ringing (Ring)
ACTR
VBATR
Balanced ring Buffer, Sensor, DCsignal feed Loop, ring generator (incl. DC-offset)
Tip:
(VBATR+VDC+VAC)
Ring:
(VBATR-VDC-VAC)
Preliminary Product Overview
10.99
DuSLIC
Operational Description Table 4266 Operating Modes
SLIC internal supply voltages (+/-) System functionality Active circuits Tip/Ring output voltage
SLICOFI-2 SLIC mode mode
Ringing (Ring) Ringing (Ring) Ring Pause
VBATR
Ring signal ring, BGND Ring signal ring, BGND DC-offset feed
Buffer, Sensor, DCLoop, ring generator Buffer, Sensor, DCLoop, ring generator Buffer, Sensor, DCLoop, ramp generator
Ring:
(VBATR-VDC-VAC)
Tip: Ring:
(VBATR+VDC+VAC)
VBATR
Tip: Tip:
(VBATR+VDC+VAC)
ACTR, ROR, HIRT
VBATR
Ring:
(VBATR-VDC-VAC)
HIRT
VBATR
E.g. sensor offset calibration E.g. line test (Tip)
Sensor, DC-transmit path Tip-Buffer, Sensor, DC+AC-Loop
High Impedance
Active with
VBATR
Tip:
(VBATR+VAC+VDC)
Ring: high impedance Active with
VBATR
E.g. line test (Ring)
Ring-Buffer, Sensor, DC+AC-Loop
Ring:
(VBATR-VAC-VDC)
Tip: high impedance
load ext. switching from PDRH ACTH onhookmode load ext. switching from PDRR ACTR onhookmode
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10.99
DuSLIC
Operational Description
Operating Modes Power Management
many applications, power dissipated line card critical parameter. larger systems, mean power value (taking into account traffic statistics line length distribution) determines cooling requirements. Particularly remotely systems, maximum power line must exceed given limit.
3.4.1
Introduction
Generally, system power dissipation determined mainly high-voltage part. most effective power-saving method limit SLIC functionality reduce supply voltage line with requirements. This achieved using different operating modes. three main modes Power Down, Active Ringing correspond main system states: on-hook, signal transmission (voice and/or TTX) Ring signal feed. power critical applications SLEEP mode used even lower power consumption than Power Down Mode. Power Down Off-hook detection only function available. realized resistors applied SLIC from VBGND Ring VBAT, respectively. simple sensing circuit supervises current through these resistors (zero on-hook non-zero offhook state). This scaled transversal line current transferred compared with programmable current threshold SLICOFI-2. Only loop SLICOFI-2 active. Sleep mode, functions SLICOFI-2 switched except Off-hook detection which still available analog comparator. Both loops inactive. achieve lowest power consumption DuSLIC chip clock cycles MCLK PCLK pins have shut (see Table 3-3). changing into another state DuSLIC waked Active Both loops operative. SLIC provides low-impedance voltage feed line. SLIC senses, scales separates transversal (metallic) longitudinal line currents. voltages Ring always symmetrical with reference half battery voltage ground reference!). integrated switch makes possible choose between (PEB 4265) even three (PEB 4266) different battery voltages. With these voltages selected according certain loop lengths, power optimized solutions achieved.
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DuSLIC
Operational Description Ringing SLIC-E, auxiliary positive supply voltage used give total supply range SLIC-P whole supply range provided VBATR. impedance line feed output impedance, RSTAB included) with balanced sinusoidal Ring signal VRMS, plus offset sufficient supply very long lines kind ringer load reliable detect Ring trip. Unbalanced ringing supported applying Ring signal only line, while Ground applied other line. overview DuSLIC operating modes Table 4265 Table 4266.
3.4.2
Power Dissipation SLICOFI-2
optimized power consumption unused EDSP functions have switched off. Table shows typical power dissipation values different operating modes SLICOFI-2. more detailed characteristics, DuSLIC Data Sheet.
Table Mode
SLICOFI-2 Power Dissipation (Typical Values) Value Condition with clock rate pins MCLK, PCLK (fMCLK fPCLK MHz) without EDSP (EDSP-EN with EDSP MIPS (DTMF detection channel) with EDSP MIPS (DTMF detection channels) without EDSP (EDSP-EN with EDSP MIPS
Sleep (both channels) Power Down both channels
Active channel (non active channel Sleep Mode) Active both channels
Table Mode
SLICOFI-2S Power Dissipation (Typical Values) Value Condition with clock rate pins MCLK, PCLK (fMCLK fPCLK MHz) (non active channel Sleep Mode)
Sleep (both channels) Power Down both channels Active channel Active both channels
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DuSLIC
Operational Description
3.4.3
Power Dissipation SLIC
SLIC power dissipation mainly comes from internal bias currents buffers output stage less extent from sensor) where additional power dissipated whenever current line.
3.4.3.1
Power Down Modes
Power Down modes, internal bias currents reduced minimum value current line (see Table 3-7, Table Table 3-11). Even with active off-hook detection power dissipation SLIC-P) negligible. Note that this dominant factor mean power value large systems, large percentage lines always inactive.
3.4.3.2
Active Mode
Active mode, selected battery voltage VBAT strongest influence power dissipation. power dissipation output stage determined difference between VBAT Tip-Ring voltage VTIP/RING. constant line current ITrans, shortest lines (lowest cause lowest VTIP/RING, accordingly exhibit highest onchip power dissipation. However, minimum battery voltage required determined longest line therefore maximum line resistance RL,MAX including RPROT RSTAB. VBAT,min ITrans (RL,MAX RPROT RSTAB) VAC,P VDROP VAC,P.Peak value signal VDROP .Sum voltage drop SLIC buffers (Table 3-5) Table Mode SLIC-E/S ACTL ACTH ACTR ROR, HIR, ITRANS 0.096 ITRANS (ITRANS 0.1) 0.048) Typical Buffer Voltage Drops (Sum) (for ITRANS [mA]) Total voltage drop VDROP SLIC-P ITRANS 0.088 ITRANS ITRANS 0.092 ITRANS 0.092 0.052
most efficient reduce short loop power dissipation second battery voltage lower value (VBATL), whenever line resistance small enough. This method
Preliminary Product Overview
10.99
DuSLIC
Operational Description supported 4265 integrating battery switch. With standard battery voltage long lines driven line current. SLIC-P 4266 "low-power" version even allows three battery voltages (typically most negative one, e.g. used active mode Hook) power down mode). DuSLIC contains mechanism which used indication battery switching: threshold voltage Tip/Ring generating interrupt change between constant current resistive feeding will generate interrupt
3.4.3.3
SLIC Power Consumption Calculation Active Mode
scheme typical calulation shown Figure 3-1.
Circuit Diagram
RLINE RPROT RSTAB
RPHONE VSUBSCRIBER VPHONE SLIC
HOOK
ezm14049.emf
Figure
Circuit Diagram Power Consumption
RProt RStab RPhone VPhone Conditions: VVoice peak iVoice peak VTTX,rms (see example below) Typical Power Consumption Calculation with SLIC-E Assuming typical application where following battery voltages used: VBATL VBATH line feeding guaranteed 1900 longer lines 1900 extended battery feeding option used (Mode ACTR). Requirement TTX: VTTX Vrms load
Preliminary Product Overview
3-10
10.99
DuSLIC
Operational Description Table shows line currents output voltages different operating modes.
Table
Line Feed Conditions Power Calculation SLIC-E Line Currents ITRANS ITRANS ITRANS ITRANS Output Voltages VTIP/RING VTIP/RING VTIP/RING
Operating Mode PDRH, PDRHL ACTL ACTH ACTR extended battery feeding higher loop length 1900
With line feed conditions given above table total power consumption PTOT shares different operating modes shown Table 3-7. output voltage Ring calculated longest line 1900 ACTH, ACTL). Table Operating Mode PDRH ACTL ACTH ACTR
SLIC-E 4265 Typical Total Power Dissipation PQ1) [mW] [mW] 51.3 72.2 96.2 [mW] 27.1 32.8 [mW] PTOT [mW] 1266
formulas calculation power shares found DuSLIC Data Sheet.
Figure shows total power dissipation PTOT SLIC-E Active Mode (ACTH ACTL) with switched Battery Voltage (VBATH, VBATL) function RLine. power dissipation SLIC strongly reduced short lines.
Preliminary Product Overview
3-11
10.99
DuSLIC
Operational Description
1000 PTOT [mW]
Figure
SLIC-E Power Dissipation with switched Battery Voltage
Typical Power Consumption Calculation with SLIC-P (Internal Ringing) Assuming typical application where following battery voltages used: VBATL VBATH VBATR -108 line feeding guaranteed 1200 Requirement TTX: VTTX Vrms load Table shows line currents output voltages different operating modes. Table Line Feed Conditions Power Calculation SLIC-P Line Currents ITRANS ITRANS ITRANS ITRANS Output Voltages VTIP/RING 25.2 VTIP/RING 36.0 VTIP/RING Operating Mode PDRH, PDRHL ACTL ACTH ACTR
With line feed conditions given above table total power consumption PTOT shares different operating modes shown Table 3-9. output voltage Ring calculated longest line 1200 ACTH, ACTL)
Preliminary Product Overview
3-12
RLine
duslic_0002_powerdiss.emf
10.99
DuSLIC
Operational Description
Table Operating Mode PDRH PDRR ACTL ACTH ACTR (Boosted)
SLIC-P 4266 Power Dissipation PQ1) [mW] 81.7 [mW] 43.6 56.8 [mW] 15.3 [mW] PTOT [mW]
ROR, (Ring Pause)
formulas calculation power shares found DuSLIC Data Sheet
Figure shows total power dissipation PTOT SLIC-P Active Mode (ACTH ACTL) with switched Battery Voltage (VBATH, VBATL) function RLine.
PTOT [mW]
RLine
duslic_0001_powerdiss.emf
Figure
SLIC-P Power Dissipation (Switched Battery Voltage, Long loops)
Preliminary Product Overview
3-13
10.99
DuSLIC
Operational Description Typical Power Consumption Calculation with SLIC-P (External Ringing) Assuming typical application where following battery voltages used: VBATL VBATH VBATR line feeding guaranteed Requirement TTX: VTTX,rms This typical lowest power application, where VBATR used just Hook state VBATH VBATL used active modes with battery switching. Table 3-10 shows line currents output voltages different operating modes. Table 3-10 Line Feed Conditions Power Calculation SLIC-P Line Currents ITRANS ITRANS ITRANS ITRANS Output Voltages VTIP/RING 19.2 VTIP/RING VTIP/RING Operating Mode PDRH, PDRHL ACTL ACTH ACTR
With line feed conditions given above table total power consumption PTOT shares different operating modes shown Table 3-11. output voltage Ring calculated longest line ACTH, ACTL)
Table 3-11 Operating Mode PDRH PDRR ACTL ACTH ACTR ROR,
SLIC-P 4266 Power Dissipation PQ1) [mW] 57.7 88.7 [mW] 31.5 38.1 56.8 [mW] -28.6 -87.2 -68.8 [mW] PTOT [mW] 88.7
formulas calculation power shares found DuSLIC Data Sheet
Preliminary Product Overview
3-14
10.99
DuSLIC
Operational Description Figure shows total power dissipation PTOT SLIC-P Active Mode (ACTH ACTL) with switched Battery Voltage (VBATH, VBATL) function RLine (Lowest Power Applications).
PTOT [mW]
RLine
duslic_0003_powerdiss.emf
Figure
SLIC-P Power Dissipation (Switched Battery Voltage, Short Loops)
3.4.3.4
Ringing Modes
Internal Balanced Ringing (SLIC-E SLIC-P) SLIC internal balanced ringing facility requires higher supply voltage (auxiliary voltage VHR). highest share total power dissipated output stage SLIC. output stage power dissipation (see Table 3-12, Table 3-13) depends Ring amplitude (VRNG,PEAK), equivalent ringer load (RRNG CRNG), ring frequency (via line length (RL). minimum auxiliary voltage necessary required ring amplitude calculated using: VBATH VRNG,PEAK VRNG,DC VDROP VRNG,RMS crest factor VRNG,DC VDROP crest factor defined peak value divided value (here always 1.41 because sinusoidal ringing assumed).
Preliminary Product Overview
3-15
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DuSLIC
Operational Description VRNG,DC VDROP VRNG,PEAK Superimposed voltage Ring trip detection voltage drops SLIC buffers (Table 3-5) Peak ring voltage Tip/Ring
strong influence ringer load impedance number ringers demonstrated formula current sensor power dissipation Table 3-12 Table 3-13. ringer load impedance calculated follows: ZLD= |ZLD| RRNG jCRNG with RRNG CRNG Load impedance Ringer Resistance Ringer Capacitance Line Resistance
Internal Unbalanced Ringing with SLIC-P ring signal present just line (modes ROR, ROT), while other line connected potential GND. minimum battery voltage VBATR necessary required ring amplitude calculated using: VBATR VDROP VRNG, PEAK VRNG,RMS crest factor External Ringing (SLIC-E SLIC-P) When external ring generator ring relays used, SLIC switched Power Down mode. "low-power" SLIC-P optimized extremely power-sensitive applications (see Table 3-11). This SLIC three different battery voltages. VBATR used onhook, while VBATH VBATL normally used off-hook mode.
Preliminary Product Overview
3-16
10.99
DuSLIC
Operational Description
3.4.3.5
SLIC Power Consumption Calculation Ringing Mode
average power consumption ringing cadence sec. seconds given PTOTaverage PTOTRinging (1-k) PTOTRingPause with 0.20 typical circuit ringing shown Figure 3-5.
Circuit Diagram Ringing
RRNG
RLINE
RPROT RSTAB
ZRNG
SLIC
CRNG
vRNG
HOOK
ezm35004.emf
Figure
Circuit Diagram Ringing
Preliminary Product Overview
3-17
10.99
DuSLIC
Operational Description Power Consumption Calculation SLIC-E Balanced Ringing Mode With example above calulation SLIC-E (see Chapter 3.4.3.3) typical ringer load. RRNG CRNG required ringing voltage VRNG Vrms ringing frequency fRNG Offset Voltage ring trip detection Table 3-12 shows power calculation total power dissipation PTOT SLIC-E balanced ringing mode consisting quiescent power dissipation current sensor power dissipation gain stage power dissipation output stage power dissipation
Table 3-12
SLIC-E Balanced Ringing Power Dissipation (typical) 2481 mW1) 1653
PTOTRingPause (ITrans= PTOTRinging VDD*IDD IVBATHI*IBATH IVBATLI*IBATL VHR*IHR 0,015*ITrans,rms*VHR 0,055*ITrans,rms*|VBATH| 0,04*ITrans,rms*VDD with ITrans,rms VTIP/RING, IZLDI (VHR |VBATH|)*(SQRT((VHR VBATH VDC-offset)2 (VTIP/RING2)/2) IVHR VBATHI)/60k (VHR2 VBATH2 482)*(1/60k 1/216k) (VHR IVBATHI)*ITrans,rms*2*SQRT(2)/ VTIP/RING, rms*ITrans,rms*cos(Load)
Values
VBATL VBATH
Preliminary Product Overview
3-18
10.99
DuSLIC
Operational Description Power Consumption Calculation SLIC-P Balanced Ringing Mode With example above calulation with 1200 line length SLIC-P (see Chapter 3.4.3.3) when internal ringing feature will used. Typical Ringer load: RRNG 1000 CRNG Required ringing voltage VRNG Vrms ringing frequency fRNG Offset Voltage ring trip detection Table 3-13 shows power calculation total power dissipation PTOT SLIC-P balanced ringing mode consisting quiescent power dissipation current sensor power dissipation gain stage power dissipation output stage power dissipation
Table 3-13
SLIC-P Balanced Ringing Power Dissipation (typical) 1618 mW1) 1019
PTOTRingPause (ITrans= PTOTRinging VDD*IDD IVBATRI*IBATR IVBATHI*IBATH IVBATLI*IBATL 0,055*ITrans,rms*IVBATRI 0,04*ITrans,rms*VDD with ITrans,rms VTIP/RING, IZLDI (VBATR2 802)*(1/60k 1/216k) IVBATRI*ITrans,rms*2*SQRT(2)/ VTIP/RING, rms*ITrans,rms*cos(Load)
Values
VBATL VBATH VBATR -108
Preliminary Product Overview
3-19
10.99
DuSLIC
Operational Description Power Consumption Calculation SLIC-P Unbalanced Ringing Mode similar power calculation valid internal unbalanced ringing mode, which only available SLIC-P. With following example: VBATL VBATH VBATR -150 line feeding guaranteed Typical Ringer load RRNG 1000 CRNG VRNG Vrms ringing frequency fRNG required ringing voltage
Table 3-14 shows power calculation total power dissipation PTOT SLIC-P unbalanced ringing mode.
Table 3-14
SLIC-P Unbalanced Ringing Power Dissipation (typical) 2756 mW1) 1952
PTOTRingPause (ITrans= PTOTRinging VDD*IDD IVBATRI*IBATR+ IVBATHI*IBATH IVBATLI*IBATL 0,055*ITrans,rms*IVBATRI 0,04*ITrans,rms*VDD with ITrans,rms VTIP/RING, IZLDI (0,5*VTIP/RING2 (VBATR/2)2)/60k (VBATR2 802)*(1/60k 1/216k) IVBATRI*ITrans,rms*2*SQRT(2)/ VTIP/RING, rms*ITrans,rms*cos(Load)
Values
VBATL VBATH VBATR -150
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3-20
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DuSLIC
Operational Description
3.5.1
Test Modes Introduction
Subscriber loops subject many types failure therefore have monitored. This requires easy access subscriber loop perform regular measurements. tests involve resistance, leakage capacitance measurements measurements interfering currents voltages.
ITRANS RIT1A RILA
CITA
ITACA
SLIC
Channel
RIT2A CVCMITA
SLICOFI-2
VCMITA DCPA DCNA
Ring Generator
ezm14015.emf
Figure
Capacitance Measurement
ITRANS RIT1A RILA
CITA
ITACA
SLIC
RIT2A CVCMITA
SLICOFI-2
VCMITA DCPA DCNA
Channel
Ring Generator
ezm14023.emf
Figure
Resistance Measurement
Preliminary Product Overview
3-21
10.99
DuSLIC
Operational Description
3.5.2
Conventional Line Testing
Conventional analog line cards Central Office applications usually include relays channel. relay normally required switch external ring generator line some applications need additional relay polarity reversal. test relays used monitor local loop (test-out relay) verify line circuit itself (testin relay). test-out relay switches external test unit subscriber line. external test unit performs capacitance, resistance leakage measurements detect changes line condition detect line failures. test-in relay switches test impedance SLIC separates subscriber line from SLIC. With test tone, possible check entire loop plus CODEC including SLIC. With external test unit, every line connected separately test unit tests have performed line time. Testing thousands lines takes several hours. Because time factor, these tests typically carried once week once month. test cycle specific subscriber line therefore very long failures usually detected very late stage. This reduces network quality.
3.5.3
DuSLIC Line Testing
With Integrated Test Diagnosis Functions (ITDF), DuSLIC perform tests without external test unit. ITDF reduces testing time manufacturing costs, accelerates test flow field, provides more flexibility. ITDF opens dimension test service system manufacturers their customers. features provided silicon, eliminating need additional expensive test equipment. external relay resistor used calibrate DuSLICs integrated Test Diagnosis functions. Whereas testing used carried once week once month, DuSLIC's integrated test functions make possible test subscriber lines every night. integrated test diagnosis functions test line CODEC described sections "Subscriber Line Testing" "Board Testing Subscriber Line Testing DuSLIC chipset offers approach linetesting. Test capabilities provided line basis, allowing almost continuously monitor line. Therefore line problems detected before customer gets notice appropriate actions taken. Also special hardware test equipment required perform linetest functions. This results cost savings linecard itself well improved system reliability problems detected very early stage.
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DuSLIC
Operational Description List Line Test Functions: Loop resistance Leakage current Tip/Ring Leakage current Tip/GND Leakage current Ring/GND Ringer capacitance test Line capacitance Line capacitance Tip/Gnd Line capacitance Ring/GND Foreign voltage measurement Tip/GND Foreign voltage measurement Ring/GND Foreign voltage measurement Tip/Ring Measurement ringing voltage Measurement line feed current Measurement transversal longitudinal current
perform different linetest functions DuSLIC includes several levelmeter blocks: levelmeter levelmeter levelmeter measurements means stimulate line, measure response line. Following signal sources within DuSLIC might used signal source: Constant voltage (ringing offset voltage) Tone generators (voice frequency signals) metering signal generator (12/16 kHz) Ramp generator (used measuring capacitances) Ringing Generator (5Hz 300Hz) levelmeter allows measure: ITrans: transversal current line ITrans IR)/2 ILong: longitudinal current line ILong IR)/2 Voltage level (can configured analog inputs) Difference voltage level between IO4-IO3 voltage (internally connected VDD/3) control voltage loop
Level Meter:
input signal gets digitized decimated 17Bit value. effective sampling rate would 2kHz. Offset coming from SLIC, filter stage converter eliminated adding value offset register. levelmeter allows access voice signal path while active voice signals being transferred. After conversion decimation signal applied with
Preliminary Product Overview 3-23 10.99
DuSLIC
Operational Description programmable filter characteristic (bandpass, notch filter). Like levelmeter signal signal also rectified integrated. integration period either 16ms 256ms. Reading levelmeter result again done result registers. Levelmeter: cancellation signal transmit direction done adaptive filter. This adaptive filter offers control signal which correlate with real imaginary part load connected Tip/Ring wire SLIC. Therefore used measure line impedance. Board Testing perform functional inspection complete analog line card manufacturing process variety integrated analog digital loops used. These Loops, together with external relay reference resistor, allow manufacturer quick easy inspection digital analog interfaces. integrated level metering function enables performance tests different parameters without additional test measurement equipment.
Preliminary Product Overview
3-24
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DuSLIC
Operational Description
3.5.4
Test Loops
main signal path SLICOFI-2 integrated analog digital loops shown Figure 3-8.
LMOUT
HPX2 HPX1
XOUT COX16
AC-DLB-32K
ROUT
AC-DLB-8K
COR8 PCM16K
TTXOUT
AC-DLB-128K
AC-ALB-PP
AC-ALB-4M
TTX-DLB-A AC-DLB-4M
OPIM_AN VOUT
OPIM_4M
ROUT TTX-ALB-A
TTX-DLB-A
COR-64 TTXOUT
256K
128K
ezm22008.wmf
Figure
SLICOFI-2 Testloops
Preliminary Product Overview
3-25
10.99
DuSLIC
Interfaces
Interfaces
DuSLIC connects analog subscriber digital switching network different types digital interfaces allow highest flexibility different applications: interface combined with serial microcontroller (µC) interface IOM-2 interface. PCM/IOM-2 selects interface mode. PCM/IOM-2 IOM-2 interface selected. PCM/IOM-2 PCM/µC interface selected. analog TIP/RING interface connects DuSLIC subscriber.
Interface with Serial Microcontroller Interface
PCM/µC interface mode voice control data seperated handled different pins SLICOFI-2. Voice data transferred highways while control data using microcontroller interface.
4.1.1
Interface
serial interface used transfer A-law-or µ-law-compressed voice data. test mode, interface also transfer linear data. eight pins interface used follows (two highways): PCLK: FSC: DRA: DRB: DXA: DXB: TCA: TCB: Clock, 8192 Frame Synchronization Clock, Receive Data Input Highway Receive Data Input Highway Transmit Data Output Highway Transmit Data Output Highway Transmit Control Output Highway Active during transmission Transmit Control Output Highway Active during transmission
pulse identifies beginning receive transmit frame both channels. PCLK clock signal synchronizes data transfer (DXB) (DRB) lines. channels, bytes serialized with first. default setting, rising edge indicates start bit, while falling edge used buffer contents received data (DRB). double clock rate selected (PCLK
Preliminary Product Overview
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DuSLIC
Interfaces clock rate twice data rate), first rising edge indicates start bit, while, default, second falling edge used buffer contents data line (DRB).
PCLK
Time Slot High Time Slot High
Detail
DETAIL
Clock
PCLK
Voice Data
High Voice Data High
ezm14046.wmf
Figure
General Interface Timing
data rate interface vary from 2*128 kb/s 2*8192 kb/s (two highways). frame consist time slots bits each. time slot
Preliminary Product Overview 10.99
DuSLIC
Interfaces highway assignment each DuSLIC channel programmed. Receive transmit time slots also programmed individually. When DuSLIC transmitting data (DXB), (TCB) activated control external driving device. DRA/B DXA/B pins connected form bidirectional data special purposes. example, Serial Interface Port (SIP) with Subscriber Line Data (SLD) bus. approach provides common interface analog digital per-line components. more details, please User's Manual "ICs Communications"1) available from Infineon Technologies request. Table shows interface examples; other frequencies (e.g. 1536 kHz) also possible.
Table
SLICOFI-2 Interface Configuration Single/Double Clock [1/2]
Clock Rate PCLK [kHz]
1024 1024 2048 2048 4096 4096 8192 8192
Time Slots [per highway]
f/64 f/128
Data Rate [kbit/s highway]
1024 1024 2048 2048 4096 4096 8192
Ordering B115-H6377-X-X-7600, published Infineon Technologies.
Preliminary Product Overview
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DuSLIC
Interfaces
4.1.2
Serial Microcontroller Interface
microcontroller interface consists four lines: DCLK, DOUT. DCLK: DIN: DOUT: synchronization signal starting read write access SLICOFI-2. clock signal 8.192 MHz) supplied SLICOFI-2. Data input carries data from master device SLICOFI-2. Data output carries data from SLICOFI-2 master device.
There different command types. Reset commands have just byte. Read write commands have command bytes with address offset information located second byte. write command consists command bytes following data bytes. first command byte sets whether command read write one, command field used DuSLIC channel written. second command byte contains address offset. read command consists above-mentioned command bytes written DIN. After second command byte applied dump-byte consisting '1's written DOUT. Data transfer starts with first byte following 'dump-byte'.
Comm
Comm
Data
Data
Data Data Byte
Data Byte DCLK
Comm
ezm14057.wmf
Figure
Serial Int. Write Acc. Data Bytes Single Byte Com.)
Preliminary Product Overview
10.99
DuSLIC
Interfaces
Comm
Comm
DCLK
DOUT
'Dump Byte'
Data Data Byte
Data
Data Data Byte
ezm14058.wmf
Figure
Serial Interface Read Acc. Data Bytes Transfered)
IOM-2 Interface
IOM-2 defines industry standard serial interconnecting telecommunication broad range applications typically ISDN-based applications. IOM-2 provides symmetrical full-duplex communication link, containing data, control/ programming status channels. Providing data, control status information serial channel reduces count cost simplifying line card layout. IOM-2 Interface consists data lines clock lines follows:
FSC: DCL:
Data upstream carries data from SLICOFI-2 master device. Data downstream carries data from master device SLICOFI-2. frame synchronization signal kHz) supplied SLICOFI-2. data clock signal (2048 4096 kHz) supplied SLICOFI-2.
SLICOFI-2 handles data described IOM-2 specification1) analog devices.
Available request from Infineon Technologies.
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10.99
DuSLIC
Interfaces
Voice Channel Voice Channel Voice Channel Voice Channel
ezm04104.emf
Figure
IOM-2 Int. Timing Voice Channels (Per Frame)
information multiplexed into frames, which transmitted 8-kHz rate. frames subdivided into sub-frames, with sub-frame dedicated each transceiver pair CODECs this case, SLICOFI-2 channels sub-frames provide channels data, programming status information single transceiver CODEC pair.
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10.99
DuSLIC
Interfaces
4096
Detail
Detail DD/DU
ezm04105.emf
Figure
IOM-2 Interface Timing (DCL=4096 kHz, Frame)
2048
Detail
Detail DD/DU
ezm04106.emf
Figure
IOM-2 Interface Timing (DCL 2048 kHz, Frame)
Preliminary Product Overview
10.99
DuSLIC
Interfaces Both DuSLIC channels (see Figure 4-4) assigned eight time slots. IOM-2 time slot selection shown Table below pin-strapping. this way, channels handled with IOM-2 interface line card.
Table
IOM-2 Time Slot Assignment IOM-2 Operating Mode Time slot 2048, 4096 Time slot 2048, 4096 Time slot 2048, 4096 Time slot 2048, 4096 Time slot 2048, 4096 Time slot 2048, 4096 Time slot 2048, 4096 Time slot 2048, 4096
selected SEL24 pin: SEL24 2048 SEL24 4096
TIP/RING Interface
TIP/RING interface interface that connects subscriber DuSLIC. meets ITU-T recommendation Q.552 Z-interface applicable LSSGR.
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10.99
DuSLIC
Interfaces
SLICOFI-2 SLIC-E Interface
4265
hook (IRO
3265
Switch
BGND
CITACA
BGND PDRHL PDRH
Current Sensor
ITACA
RIT1
CVCMITA VCMITA
Protection
SymFi
ACNA
DCNA
BGND
PDRHL PDRH
DCPA
RING
closed: ACTR, HIT, HIR, HIRT
ACPA
VCMS
VCMS
VBATL VBATH (Sub)
VBAT Switch
BIAS
Logik
AGND VDD(3,3V)
(+5V)
AGND
ezm20004.emf
Figure
Minimal Application Circuit SLICOFI-2 SLIC-E
4265 operates following modes controlled ternary logic signal input: Table SLIC-E Interface code
PDRHL ACTH
PDRH ACTR
ACTL HIRT
"Overtemp" signaling possible
Preliminary Product Overview
10.99
DuSLIC
Interfaces
SLICOFI-2 SLIC-P Interface
4266
Off-hook BGND PDRR PDRRL PDRH PDRHL
PEB3265
BGND
CITA
Current sensor
ITAC
IT1A
BGND
CVCMITA VCMITA
ACNA
IT2A
SymFi
DCNA CEXT
Protection
BGND
RING PDRR PDRRL PDRH PDRHL Battery switch
DCPA ACPA
closed: ACTR ROT, ROR, HIR, HIT, HIRT
VCMS VCMS
VBATL VBATH VBATR (SUB) BIAS Logic
IO1A
AGND
VDD(+5V)
AGND VDD(+3,3V)
ezm14041.emf
Figure
Minimal Application Circuit SLICOFI-2 SLIC-P
4266 operates following modes controlled ternary logic signal inputs binary logic signal input:
Preliminary Product Overview
4-10
10.99
DuSLIC
Interfaces
Table
SLIC-P Interface code ACTL HIRT PDRR PDRHL ACTH PDRRL PDRH ACTR
"Overtemp" signaling possible SLIC-P extremely power sensitive applications without internal ringing SLIC-P with battery voltages (VBATH, VBATL) voice additional voltage (VBATR) ringing
Preliminary Product Overview
4-11
10.99
DuSLIC
Electrical Characteristics
5.1.1
Parameter
Electrical Characteristics
Electrical Characteristics 4265 (SLIC-E) Absolute Maximum Ratings 4265
Symbol Limit Values min. max. -0.4 -0.4 -0.4 referred VAGND referred VBGND referred VBGND referred VBGND -0.4 Unit Test Condition
Battery voltage Battery voltage Auxiliary supply voltage Total battery supply voltage, continuously supply voltage Ground voltage difference Input voltages
VBATL VBATH VHR-VBATH VBGNDVAGND
VBATL VBATH -0.4
VDCP,VDCN, VACP,VACP, VC1, VIT,
VDD+0.4
referred VAGND
Voltages current outputs RING, voltages, continuously RING,TIP voltages, pulse RING,TIP voltages, pulse RING, voltages, pulse ESD-voltage, pins
-0.4
VDD+0.4
referred VAGND ACTL ACTH ACTR ACTL, ACTH, ACTR ACTL, ACTH, ACTR ACTL, ACTH, ACTR HUMAN BODY MODEL1)
VBATL-0.4 VBATH-0.4 VBATH-0.4 VHR+0.4
t.b.d t.b.d
VBATH-10 VBATH-10
VHR+10 VHR+30
883D, method 3015.7 Assn. standard S5.1-1993.
Note: Stresses above those listed here cause permanent damage device.
Preliminary Product Overview 10.99
DuSLIC
Electrical Characteristics Exposure absolute maximum rating conditions extended periods affect device reliability. Maximum ratings absolute ratings; exceeding only these values cause irreversible damage integrated circuit.
5.1.2
Parameter
Operating Range 4265
Symbol Limit Values min. max. 4.75 -0.4 5.25 -0.4 simulated lifetime years referred VAGND referred VBGND referred VBGND referred VBGND Unit Test Condition
Battery voltage Battery voltage Auxiliary supply voltage Total battery supply voltage supply voltage Ground voltage difference Junction Temperature Voltage compliance IT,IL Input range VDCP, VDCN, VACP, VACN
VBATL VBATH VHR-VBATH VBGNDVAGND VIT, VACDC
Note: necessary that ground connections (AGND, BGND) established first, then supply voltages applied sequence.
Preliminary Product Overview
10.99
DuSLIC
Electrical Characteristics
5.2.1
Parameter
Electrical Characteristics 4266 (SLIC-P) Absolute Maximum Ratings 4266
Symbol Limit Values min. max. -160 -0.4 -0.4 -0.4 referred VAGND referred VAGND referred VBGND referred VBGND referred VBGND -145 -0.4 -150 -155 Unit Test Condition
Battery voltage Battery voltage Battery voltage Total battery supply voltage, continuously supply voltage Ground voltage difference Input voltages
VBATL
VBATL- VBATH
VBATH VBATR VDD-VBATR
VBGND- VAGND
VBATH- VBATR -0.4
VDCP,VDCN, VACP,VACN, VC1, VC2, VIT,
VDD+0.4
Voltages current outputs RING, voltages, continuously RING,TIP voltages, pulse RING,TIP voltages, pulse RING, voltages, pulse ESD-voltage, pins
-0.4
VDD+0.4
referred VAGND ACTL ACTH ACTR ACTL, ACTH, ACTR ACTL, ACTH, ACTR ACTL, ACTH, ACTR HUMAN BODY MODEL1)
VBATL-0.4 +0.4 VBATH-0.4 +0.4 VBATR-0.4 +0.4
t.b.d t.b.d
VBATR-10 VBATR-10
883D, method 3015.7 Assn. standard S5.1-1993.
Note: Stresses above those listed here cause permanent damage device. Exposure absolute maximum rating conditions extended periods affect device reliability.
Preliminary Product Overview 10.99
DuSLIC
Electrical Characteristics Maximum ratings absolute ratings; exceeding only these values cause irreversible damage integrated circuit.
5.2.2
Parameter
Operating Range 4266
Symbol Limit Values min. max. -0.4 -0.4 calculated lifetime years referred VAGND referred VBGND referred VBGND referred VBGND -140 -145 -150 Unit Test Condition
Battery voltage Battery voltage Battery voltage Total battery supply voltage supply voltage Ground voltage difference Junction Temperature Voltage compliance IT,IL Input range VDCP, VDCN, VACO, VACN
VBATL VBATH VBATR VDD-VBATR VBGNDVAGND VIT, VACDC
Note: necessary that ground connections (AGND, BGND) established first, then supply voltages applied sequence.
Preliminary Product Overview
10.99
DuSLIC
Electrical Characteristics
Transmission DuSLIC
Transmission Symbol
GXAF
Table Parameter
Conditions
line active 4000 3600 dBm0, 1014 dBm0, 1014
Limit Values min. typ. max.
-0.25 -0.25
Unit
mArms Vrms
Longitudinal current capability Overload level Return Loss Gain accuracy Transmit Gain accuracy Receive
Transmission Performance (2-wire) Insertion Loss (2-wire 4-wire 4-wire 2-wire) +0.25 +0.25
Frequency Response
Transmit gain Frequency variation Reference frequency 1014 Signal level dBm0, HFRX=1 2400 2400 3000 3000 3400 3400 3600 Receive gain Frequency variation GRAF Reference frequency 1014 Signal level dBm0, HFRR=1 2400 2400 3000 3000 3400 3400 3600 -0.25 -0.25 -0.25 -0.25 -0.25 -0.25 -0.25 0.65 0.25 0.45 -0.25 -0.25 -0.25 -0.25 -0.25 -0.25 -0.25 0.65 0.25 0.45
Preliminary Product Overview
10.99
DuSLIC
Electrical Characteristics Table Parameter Gain Tracking
Transmit gain Signal level variation GXAL Sinusoidal test method 1014 Reference level dBm0 VFXI dBm0 -1.4 VFXI dBm0 -0.5 VFXI dBm0 -0.25 Receive gain Signal level variation GRAL Sinusoidal test method 1014 Reference level dBm0 dBm0 -1.4 dBm0 -0.5 dBm0 Balance Return Loss 3400 -0.25 0.25 0.25
Transmission (cont'd) Symbol Conditions Limit Values min. typ. max. Unit
Group Delay
Transmit delay, Absolute Receive delay, Absolute Group delay, Receive Transmit, Relative 1500 2800 2800
1000 1000 2600 2600 2800 2800 3000 Overload Compression
Preliminary Product Overview
10.99
DuSLIC
Electrical Characteristics Table Parameter Longitudinal Balance
Longitudinal transversal Transversal longitudinal Longitudinal signal generation 3400 4000 4000
Transmission (cont'd) Symbol Conditions Limit Values min. typ. max. Unit
Signal Generation
signal VTTX THD4 THD2 Vrms
Out-of-band Noise (Single frequency inband -25dBm0)
Transversal Longitudinal Total Harmonic Distortion 2-wire 4-wire 4-wire 2-wire dBm0, 3400 dBm0, 3400
Idle Channel Noise
2-wire port (receive) A-law Psophometric disabled enabled message disabled enabled Psophometric disabled enabled message disabled enabled dBmp dBmp dBrnC dBrnC dBmp dBmp dBrnC dBrnC
µ-law
side (transmit) A-Law
µ-Law
Preliminary Product Overview
10.99
DuSLIC
Electrical Characteristics Table Parameter Transmission (cont'd) Symbol Conditions Limit Values min. typ. Distortion (Sinusoidal Test Method)
Signal Total Distortion Transmit STDX Output connection: 1014 (C-message weighted µ-law, psophometrically weighted A-law) dBm0 dBm0 dBm0 dBm0 dBm0 dBm0 Signal Total Distortion Receive STDR Input connection: 1014 (C-message weighted µ-law, psophometrically weighted A-law) dBm0 dBm0 dBm0 dBm0 dBm0 dBm0 35.5
Unit
max.
Power Supply Rejection Ratio
referenced AGND VBAT referenced AGND PSRR PSRR 3400 3400
Preliminary Product Overview
10.99
DuSLIC
Electrical Characteristics
Characteristics
Characteristics Symbol Conditions Limit Values min. typ. max. Unit
Table Parameter
Line Termination Tip, Ring Sinusoidal Ringing Max. ringing voltage VRNG0 VH-VBAT 150V, ring trip SLIC output buffer RSTAB Vrms
Output impedance Harmonic distortion Output current limit
ROUT
Modes: Active SLIC-E: SLIC-P: Modes: Power Down ITIP Modes: Power Down SLIC-E: SLIC-P: balanced SLIC-P: unbalanced
Loop current accuracy Loop open resistance VBGND Loop open resistance RING VBAT Ring trip function Ring trip voltage
VBATR/2
periods periods
Ring trip detection time delay Ring time delay
Preliminary Product Overview
10.99
DuSLIC
Electrical Characteristics
Fundamental Output Power (dBm0)
0.25 -0.25
Fundamental Input Power (dBm0)
ezm14009.emf
Figure
Overload Compressio

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