MultiPRO Desktop Tool DS114 (v1.8) August 2007 Features
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MultiPRO Desktop Tool
DS114 (v1.8) August 2007
Features
Supported ISEiMPACT download software (v5.1i higher) Externally powered using power brick
In-System Programming/Configuration
Automatically senses adapts target voltage Interfaces devices operating (TTL), 3.3V (LVCMOS), 2.5V, 1.8V, 1.5V Supports IEEE 1149.1 (JTAG), serial peripheral interface (SPI), Xilinx Slave-Serial, Xilinx SlaveSelectMAP (8-bit) In-system configures following Xilinx devices:
Same power brick used Parallel Cable
Download speeds Megabits second (Mb/s) status indicators Uses IEEE 1284 protocol high-speed communications Uses quick-connect, off-the-shelf IEEE 1284 parallel cable Power cord options US/Asia/Japan/Europe/UK
Virtexseries FPGAs Spartanseries FPGAs CoolRunner/CoolRunner-II CPLDs Platform Flash PROM family XC18V00 PROM family XC4000 series FPGAs XC9500/XL/XV CPLDs
Desktop Device Programming
Device adapters available for:
XC18V00 PROM family Platform Flash PROM family CoolRunnerTM-II CPLD family
Drive compatible with IEEE 1532 Programming Engine ChipScopeILA ChipScope compatible Embedded Development (EDK) compatible Includes high-performance ribbon cables
Automatically switches power during programming Automatically identifies confirms proper adapter selection short-circuit protection event improper device insertion
14-conductor ribbon cable used with Parallel Cable
Intended development recommended production programming
MultiPRO Desktop Tool Description
MultiPRO Desktop Tool (Figure multi-function programming configuration cable. When mated with MultiPRO device adapters, program individual Platform Flash PROMs, XC18V00 PROMs CoolRunner-II CPLDs. Alternatively, tool perform insystem programming FPGA configuration when attached user hardware included ribbon cables. IEEE 1149.1 (JTAG), serial peripheral interface (SPI), Xilinx Slave-Serial, Xilinx Slave-SelectMAP (8-bit) protocols supported mode. Designed desktop environment, MultiPRO Desktop Tool interfaces using industry standard IEEE 1284 parallel port. external power brick provides pod. integral power switch facilitates fail-safe connection target systems. variety device adapters available standalone programming Xilinx Platform Flash PROMs, XC18V00 PROMs, CoolRunner-II CPLDs.
X-Ref Target Figure
Figure Xilinx MultiPRO Desktop Tool
2002-2004, 2006-2007 Xilinx, Inc. rights reserved. XILINX, Xilinx logo, other designated brands included herein trademarks Xilinx, Inc. other trademarks property their respective owners.
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MultiPRO Desktop Tool aluminum plate attached bottom side printed circuit board protect circuitry. Rubber feet mounted bottom aluminum plate avoid scratching desk top.
Device Adapters
separate device adapter available each unique Platform Flash PROM, XC18V00 PROM, CoolRunner-II CPLD package. Adapters attach MultiPRO using 20-pin keyed connector (Figure Power automatically applied adapter during programming operations removed upon completion. power status illuminated whenever power active. MultiPRO automatically identifies adapter that attached connector. Caution! Devices should never installed removed
from sockets while ACTIVE illuminated.
Over-Current Protection
MultiPRO Desktop Tool monitors current load adapter when power provided. fault condition exists adapter (e.g., device improperly oriented socket device internally shorted), power automatically shut off. MultiPRO Desktop Tool will damaged power pins connector inadvertently shorted ground.
polycarbonate label protects side adapter printed circuit. Text clearly identifies device package information, product ordering number, index locator needed orient device during insertion.
X-Ref Target Figure
Status Indicators
MultiPRO Desktop Tool uses tri-color LEDs indicate active configuration port presence target power (Table indicates that associated port been selected iMPACT. amber indicates that port selected that VREF from target hardware powered. green indicates that port selected VREF from target hardware powered. both Serial/JTAG/SPI SelectMAP STATUS LEDs red, then Adapter port active. Power automatically switched adapters only during programming operations. adapter's ACTIVE illuminated when power MultiPRO Desktop Tool selects Serial/JTAG/SPI port default when powered both Serial/JTAG/SPI SelectMAP LEDs blinking red, over-current condition been detected adapter port. adapter should removed checked incorrect device insertion and/or socket damage.
20-pin Keyed Connector
Power Status
Index Locator Figure Common Adapter Features Table Status Indicators
Serial/JTAG/SPI
Amber Green Blinking Amber
SelectMAP
Amber Green Blinking Amber
Powered
Over-Current
Active Port
None S/JTAG S/JTAG SelectMAP SelectMAP Adapter Adapter None
VREF Powered
ACTIVE
IEEE 1284 Parallel Port Connected
DS114 (v1.8) August 2007
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MultiPRO Desktop Tool
Physical Description
X-Ref Target Figure
Power Switch +5VDC External Power Supply Cable
INIT DONE CCLK PROG Vref
Serial/JTAG/SPI
S/JTAG STATUS
Vref
Vref
Power Port
14-pin Serial/JTAG/SPI Ribbon Cable Connector
Serial
MultiPRO Desktop Tool
IEEE-1284-C Parallel Port
Model DLC8 Power 0.3A Serial
Made U.S.A.
SelectMAP
JTAG
Adapter Port
PROG INIT DONE BUSY RDWR CCLK
34-pin SelectMAP Ribbon Cable Connector
SMAP
STATUS
SelectMAP Quick Connect IEEE 1284 Parallel Port Cable
HW-MP-PQ208
ACTIVE
20-Pin Keyed Connector
Adapter's "ACTIVE"
Socket
MultiPRO PQ208 Adapter CoolRunnerII
ds114_04_062907
Figure MultiPRO Connector Descriptions
External Power Supply
MultiPRO Desktop Tool requires external power supply. power supply approved switching regulator that operates from outlet connects MultiPRO tool using plug (Figure power switch MultiPRO case provided convenience that other cables remain attached. standard MultiPRO power supply (CUI Inc. #DTS050400UC-P5P-KH) capable operating from 100VAC 240VAC output rated This power supply also used with Xilinx Parallel Cable (configuration cable) instead supplied Power Splitter Cable.
X-Ref Target Figure
Figure Standard External Power Brick
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MultiPRO Desktop Tool
IEEE 1284 Cable Specifications
Level compliant host parallel ports only designed operate over maximum cable length feet. Level compliant ports designed operate over maximum cable length feet. MultiPRO uses Level compliant cable interface buffer. MultiPRO case integrated mini-centronics connector attachment off-the-shelf IEEE 1284 cables. Xilinx recommends that MultiPRO tool directly connected host parallel port without switch box. Software license "dongles" should attached parallel port when communicating with MultiPRO tool.
Connecting Host Computer
MultiPRO tool connects using Windows Linux1 through built-in, standard IEEE 1284 DB25 parallel (printer) port connector2. fully utilize higher speeds this cable, host must have parallel port that enabled3 support extended capability port (ECP) mode. mode enabled, MultiPRO tool will default compatibility mode will optimum speeds listed. Performance also depends MultiPRO Desktop Tool firmware revision iMPACT software version.4
Notes:
Refer software manuals details regarding supported operating systems. Xilinx makes representations about compatibility with thirdparty IEEE 1284 add-on adapters does support addon adapters. Refer host BIOS mode enabled. Refer MultiPRO Desktop Tool firmware history
Automatic Voltage Sensing
MultiPRO Desktop Tool continuously monitors VREF Serial/JTAG/SPI SelectMAP target interface connectors. current drain from target power supply attached VREF less than 3.3V target system reference voltage must regulated cannot have current limiting resistor series with VREF interface. damage will occur MultiPRO Desktop Tool target system powered when MultiPRO tool powered. However, when powering system, preferable apply power MultiPRO tool first, followed power target system. sequence should reversed when powering down. MultiPRO Desktop Tool always puts interface signals inactive ports 3-state condition. MultiPRO output drive voltage levels linearly track voltage changes VREF pin. appropriate output signal level established range VREF voltages. example, VREF voltage from +3.0V +5.0V MultiPRO tool sets output signals respective port +3.3V Refer Table relationship between VREF voltage MultiPRO output signal levels. Table Output Signal Levels Function VREF
VREF Voltage Target System
0.80 1.65 1.65 2.00 2.00 3.00 3.00 5.00
High Performance Ribbon Cable
insulation displacement connector (IDC) ribbon cables supplied recommended connection target systems. Figure Figure These cables incorporate multiple signal-ground pairs facilitate errorfree connection. very small footprint, keyed mating connector that required target system. Refer Figure Figure appropriate connector assignments sample vendor part numbers. 14-conductor ribbon cable also used with Parallel Cable
X-Ref Target Figure
MultiPRO Output Signal Levels
Units
Figure High Performance Ribbon Cables
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MultiPRO Desktop Tool
X-Ref Target Figure
Polarizing
pin#1 indicator stripe
Polarizing
Notes: Ribbon cable 14-conductor, centers round conductor flat cable, 28AWG (7x36) stranded copper conductors; gray with edge marked. ribbon, female polarized connectors connection ribbon, contacts beryllium copper plated with micro inches gold plating over micro inches nickel, connectors mate square posts centers.
ds097_03_081506
Polarizing
pin#1 indicator stripe
Polarizing
Notes: Ribbon cable 34-conductor, centers round conductor flat cable, 28AWG (7x36) stranded copper conductors; gray with edge marked. ribbon, female polarized connectors connection ribbon, contacts beryllium copper plated with micro inches gold plating over micro inches nickel, connectors mate square posts centers.
ds114_09_081506
Figure Ribbon Cable Diagrams
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MultiPRO Desktop Tool
X-Ref Target Figure
0.175"
0.220" 0.0787"
SelectMAP Signals
PROG INIT DONE BUSY RDWR CCLK VREF
1.578"
1.618"
0.020" (0.5 0.215"
0.158"
0.100"
2x17 (34-position) CONNECTOR, shroulded, keyed, through-hole mount. Comm Conn part 2422-34G2 OUPIIN part 3112-34G00SBA/SN Also available surface mount without keyed shrould
ds114_08_081506
0.0787"
Figure Target Interface 34-Pin Connector Signal Assignments
X-Ref Target Figure
Slave Serial JTAG Signals Signals Signals
0.175"
0.220" 0.0787"
0.020" (0.5
0.158"
MOSI MISO VREF
INIT DONE CCLK PROG VREF VREF
0.791"
0.831"
0.100"
0.215"
2x17 (14-position) CONNECTOR, shroulded, keyed, through-hole mount. Comm Conn part 2422-14G2 OUPIIN part 3112-14G00SBA/SN Also available surface mount without keyed shrould
0.0787"
ds114_10_062907
Figure Target Interface 14-Pin Connector Signal Assignments
DS114 (v1.8) August 2007
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MultiPRO Desktop Tool
Table lists some third-party sources mating connectors pitch, 14-conductor ribbon cable. Table Mating Connectors pitch, Conductor Ribbon Cable
Manufacturer
Comm OUPIIN Notes:
Also available surface mount without keyed shroud. Some manufacturer's assignments conform Xilinx assignments. Please refer manufacturer's data sheet more information. Additional 14-pin ribbon cables purchased separately from Xilinx Online Store.
Part Number
2422-14G2 3112-14G00SBA/SN
Table lists third-party sources mating connectors pitch, 34-conductor ribbon cable. Table Mating Connectors pitch, Conductor Ribbon Cable
Manufacturer
Comm OUPIIN
Part Number
2422-34G2 3112-34G00SBA/SN
Notes: Also available surface mount without keyed shroud.
Interface Descriptions
interface pins Serial/JTAG/SPI, SelectMAP, adapter ports described Table Table Table respectively. Table SS/JTAG/SPI Port: 14-Pin Ribbon Cable Connector
Ribbon Cable Number SPI(2) JTAG Slave-Serial Configuration Configuration Programming Mode Mode Mode VREF VREF VREF
Type
Description
Target Reference Voltage.(3) This should connected voltage target system that serves JTAG, slave-serial interface. SPI. example, when programming Coolrunner-II device using JTAG port, VREF should connected target VAUX bus. Configuration Reset. This used force reconfiguration target FPGA(s). should connected PROG_B target FPGA single-device system, PROG_B FPGAs parallel daisy-chain configuration. Configuration Clock. FPGAs load configuration CCLK cycle slave-serial mode. CCLK should connected CCLK target FPGA single-device configuration, CCLK FPGAs parallel daisy-chain configuration. Configuration Done. This indicates MultiPRO tool that target FPGAs have received entire configuration bitstream. should connected Done FPGAs parallel daisy-chained configurations. Additional CCLK cycles issued following positive transition Done insure that configuration process complete. Configuration Data Input. This serial input data stream target FPGAs. should connected target FPGA single-device system, first FPGA daisy-chain configuration. Test Driver. This reserved Xilinx diagnostics should connected target circuitry.
PROG
CCLK
DONE
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Table SS/JTAG/SPI Port: 14-Pin Ribbon Cable Connector(Continued)
Ribbon Cable Number Slave-Serial JTAG SPI(2) Configuration Configuration Programming Mode Mode Mode INIT
Type
Description
BIDIR Configuration Initialize. This indicates that configuration
memory being cleared. should connected INIT_B target FPGA single-device system, INIT_B FPGAs parallel daisy-chain configuration.
Test Mode Select. This JTAG mode signal that establishes appropriate state transitions target devices. should connected target devices that share same data stream. Test Clock. This clock signal JTAG operations, should connected target devices that share same data stream. Test Data Out. This serial data stream received from last device JTAG chain. Test Data This serial data stream transmitted first device JTAG chain. Select. This active-Low chip select signal. This should connected S(2) flash PROM. Clock. This clock signal operations should connected C(2) flash PROM. Master-Input, Slave-Output. This target serial output data stream operations should connected Q(2) flash PROM. Master-Output Slave-Input. This target serial input data stream operations should connected D(2) flash PROM. Digital Ground.(1)
MISO
Notes:
MOSI
pins should connected digital ground target ribbon cable. Minimum crosstalk achieved when using grounds. listed names match those flash memories from STMicroelectronics. names compatible devices from other vendors different. Consult vendor's device data sheet corresponding names. Caution! PROG_B FPGA, which connected target device, must asserted during programming ensure FPGA does contend with programming operation. target reference voltage must regulated must have current-limiting resistor series with VREF pin.
Table SelectMAP Port: 34-Pin Ribbon Cable Connector Interface Descriptions
Ribbon Cable Number
SelectMAP Configuration Mode
CCLK RDWR BUSY
Type
BIDIR BIDIR BIDIR BIDIR BIDIR BIDIR BIDIR BIDIR Byte-Wide Data Bus, Byte-Wide Data Bus, Byte-Wide Data Bus, Byte-Wide Data Bus, Byte-Wide Data Bus, Byte-Wide Data Bus, Byte-Wide Data Bus, Byte-Wide Data Bus, Configuration Clock
Description
Configuration Read Write Control Configuration Flow Control
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MultiPRO Desktop Tool
Table SelectMAP Port: 34-Pin Ribbon Cable Connector Interface Descriptions(Continued)
Ribbon Cable Number
SelectMAP Configuration Mode
DONE INIT PROG VREF
Type
BIDIR Configuration Done Configuration Initialize Configuration Reset Chip Select Chip Select Chip Select Target reference voltage Connection Digital Ground
Description
Table Adapter Port: 20-Pin Connector Interface Descriptions Number
JTAG Configuration Mode
Type
Description
Test Clock. This clock signal JTAG operations. connected `TCK' adapter socket. Test Mode Select. This JTAG mode signal that establishes appropriate state transitions target device. connected `TMS' adapter socket. Test Data This serial input data stream JTAG operations connected `TDI' adapter socket. Test Data Out. This serial output data stream JTAG operations connected `TDO' adapter socket. Port Enable. Reserved future applications. Adapter ID1. This high order automatic adapter identification circuit. Adapter ID0. This order automatic adapter identification circuit. Adapter Reference Voltage. This voltage established local linear regulator each device adapter according specifications device family. Switched Supply Voltage. Safety Ground.
VREF
A10,
EGND
Digital Ground.
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X-Ref Target Figure
MultiPRO Dimensions
5.05
S/JTAG
STATUS
INIT DONE CCLK PROG Vref
Vref
Vref
Power Port
3.49
IEEE-1284-C Parallel Port
MultiPRO Desktop Tool
Model DLC8 Power 0.3A Serial
Made U.S.A.
Serial
JTAG
Adapter Port
PROG INIT DONE BUSY RDWR CCLK
3.34
SelectMAP
SMAP
STATUS
5.19
1.13
0.99
ds114_06_090402
Figure MultiPRO Dimensions (inches)
X-Ref Target Figure
HW-MP-PQ208
ACTIVE
4.30
MultiPRO PQ208 Adapter CoolRunnerII
4.10
1.22 MAX.
ds114_07_090402
Figure Typical MultiPRO Adapter Dimensions (inches)
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MultiPRO Desktop Tool
Operating Characteristics
Absolute Maximum Ratings
Symbol
TSTG IOUT Supply Voltage Operating Temperature Range Storage Temperature Range Power Dissipation Output Current (Any Output)
Description
Value
+6.0
Units
Recommended Operating Conditions
Symbol
VREF
Parameter
Supply Voltage Target Reference Voltage Operating Current
Conditions
External Power Supply
4.75
5.25
Units
Ordering Information
Part Number
HW-MULTIPRO HW-MULTIPRO-EC HW-MULTIPRO-UK HW-MP-PC44-1 HW-MP-VQ44-1 HW-MP-VQ44-2 HW-MP-CP56 HW-MP-VQ100 HW-MP-CP132 HW-MP-SO20 HW-MP-PC20 HW-MP-PC44-2 HW-MP-TQ144 HW-MP-FT256 HW-MP-FG324 HW-MP-PQ208 HW-MP-V020 HW-MP-FS48 HW-MP-VO48 HW-MP-QF32 HW-MP-QF48
Description
MultiPRO Desktop Tool Asia, Japan MultiPRO Desktop Tool with European plug MultiPRO Desktop Tool with plug 44-pin PLCC Adapter XC18V00 PROMs 44-pin VQFP Adapter XC18V00 PROMs 44-pin VQFP Adapter CoolRunner-II CPLDs 56-ball Chip Scale Adapter CoolRunner-II CPLDs 100-pin VQFP Adapter CoolRunner-II CPLDs 132-ball Chip Scale Adapter CoolRunner-II CPLDs 20-pin SOIC Adapter XC18V00 PROMs 20-pin PLCC Adapter XC18V00 PROMs 44-pin PLCC Adapter CoolRunner-II CPLDs 144-pin TQFP Adapter CoolRunner-II CPLDs 256-ball Fine Pitch Thin Adapter CoolRunner-II CPLDs 324-ball Fine Pitch Adapter CoolRunner-II CPLDs 208-pin PQFP Adapter CoolRunner-II CPLDs 20-pin TSSOP Adapter Platform Flash PROMs 48-ball Chip Scale Adapter Platform Flash PROMs 48-pin TSOP Adapter Platform Flash PROMs 32-pin Adapter CoolRunner-II CPLDs 48-pin Adapter CoolRunner-II CPLDs
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MultiPRO Desktop Tool
Revision History
following table shows revision history this document.
Date
12/10/02 12/24/02 01/24/03 04/10/03 04/29/03 09/29/04
Version
Initial Xilinx release.
Revision
Updated "Features", "Status Indicators", "Adapter Port: 20-Pin Connector Interface Descriptions". Updated "Features", "Device Adapters", Table "Automatic Voltage Sensing", Table "Ordering Information". Added list supported Spartan-3 devices. Added Platform Flash PROM family "Desktop Device Programming", "MultiPRO Desktop Tool Description", "Ordering Information". Added "XCF00S/P" "Device Adapters". Added part numbers HW-MP-FS48 HW-MP-VO48 table section "Ordering Information," page Section "External Power Supply," page Changed specification power supply. Updated supported list Xilinx devices added recommendation product usage during development section "In-System Programming/Configuration," page Added part numbers HW-MP-QF32 HW-MP-QF48 section "Ordering Information," page Updated OUPIIN part numbers Figure Figure Table Table Promoted Product Specification. Updated maximum download speed provided references related firmware software requirements. Added support SPI.
01/04/06
08/31/06 08/09/07
Notice Disclaimer
XILINX HARDWARE FPGA CPLD DEVICES REFERRED HEREIN ("PRODUCTS") SUBJECT TERMS CONDITIONS XILINX LIMITED WARRANTY WHICH VIEWED THIS LIMITED WARRANTY DOES EXTEND PRODUCTS APPLICATION ENVIRONMENT THAT WITHIN SPECIFICATIONS STATED XILINX DATA SHEET. PRODUCTS DESIGNED INTENDED FAIL-SAFE APPLICATION REQUIRING FAIL-SAFE PERFORMANCE, SUCH LIFE-SUPPORT SAFETY DEVICES SYSTEMS, OTHER APPLICATION THAT INVOKES POTENTIAL RISKS DEATH, PERSONAL INJURY, PROPERTY ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). PRODUCTS CRITICAL APPLICATIONS SOLE RISK CUSTOMER, SUBJECT APPLICABLE LAWS REGULATIONS.
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