power voltage operation Powerful instruction (150 instructions) Memory
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4-Bit Micro-controller With Driver
power voltage operation Powerful instruction (150 instructions) Memory capacity Instruction capacity 4096 bits Index capacity bits Internal capacity bits Input/Output ports pins 8-level subroutine nesting Built-in driver, segments Built-in driver, frequency melody generator Built-in Resistance-to-Frequency Converter Built-in 2-channel 6/8-bit output Built-in strobe function (Shared with segment pin) Built-in voltage doubler, halver, tripler quadrupler charge pump circuit 6-bit programmable timers with programmable clock source Watchdog timer external internal interrupt resources External: INT, RFC, IOA/IOC/S port, keystrobe Internal: TM1, TM2, Predivider Dual clock operation HALT STOP function
APU429 embedded high performance 4-bit micro-computer with on-chip driver. contains necessary functions single chip: 4-bit parallel processing ALU, ROM, RAM, ports, timer, clock generator, dual clock, RFC, EL-light, driver, look-up table, watchdog timer keyboard scanning. instruction includes only 4-bit operation manipulation instructions also various conditional branch instructions driver data transfer instructions which powerful easy use. HALT function stops internal operations other than oscillator, divider driver order minimize power dissipation. STOP function stops clocks chip.
Block Diagram
VDD1
entP SRAM
stru
scil
4096
RESET
Preliminary
Ver.
APU429
Assignment
Chip size 2620 2050 size window pitch min.
APU429
Note: substrate must connect GND.
Coordinates
Name CFIN CFOUT XTIN XTOUT TESTA RESET 1971.50 1785.25 1665.25 1545.25 1425.25 1305.25 1185.25 1065.25 945.25 825.25 705.25 2544.50 2544.50 2544.50 2544.50 2544.50 2544.50 2544.50 2544.50 2544.50 2544.50 2544.50 Name SEG13/KO3 SEG14/KO4 SEG15/KO5 SEG16/KO6 SEG17/KO7 SEG18/KO8 SEG19/KO9 SEG20/KO10 SEG21/KO11 SEG22/KO12 SEG23/KO13 75.25 225.25 345.25 465.25 585.25 705.25 825.25 945.25 1065.25 1185.25 1305.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 Ver.
Preliminary
Name VDD1 VDD2 VDD3 VDD4 CUP1 CUP2 CUP3 COM1 COM2 COM3 COM4 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11/KO1 SEG12/KO2
585.25 465.25 345.25 225.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25 75.25
2544.50 2544.50 2544.50 2544.50 2544.50 2394.50 2274.50 2154.50 2034.50 1914.50 1785.25 1665.25 1545.25 1425.25 1305.25 1185.25 1065.25 945.25 825.25 705.25 585.25 465.25 345.25 225.25
Name SEG24/KO14 SEG25/KO15 SEG26/KO16 SEG27/IOD1 SEG28/IOD2 SEH29/IOD3/PWM1 SEH30/IOD4/PWM2 SEG31/IOB1/ELC SEG32/IOB2/ELP SEG33/IOB3/BZB SEG34/IOB4/BZ SEG35/IOA1/CX SEG36/IOA2/RR SEG37/IOA3/RT SEG38/IOA4/RH SEG39/IOC1/KI1 SEG40/IOC2/KI2 SEG41/IOC3/KI3 SEG42/IOC4/KI4 COM5 COM6 COM7 COM8
1425.25 1545.25 1665.25 1785.25 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50 1971.50
75.25 75.25 75.25 75.25 75.25 225.25 345.25 465.25 585.25 705.25 825.25 945.25 1065.25 1185.25 1305.25 1425.25 1545.25 1665.25 1785.25 1905.25 2034.50 2154.50 2274.50 2394.50
Chip size 2620 2050
Descriptions
Name VDD1 VDD2 VDD3 VDD4 RESET Description Positive back-up voltage. mode, connects capacitance GND. drive voltage positive supply voltage. While mode, connects +1.5V VDD1. While Li/ExtV mode, connects +3.0V VDD2. Input reset signal. With Internal pull-down resistor. Input external request signal. Falling edge rising edge triggered mask option. Internal pull-down pull-up resistor floatting selected mask option. TESTA Test signal input pin, internal pull-down resistor. Test signal input pin. Switching pins supplying driving voltage VDD1, pins. Connects CUP1, CUP2 CUP3 pins with nonpolarized electronic capacitor 1/2, bias mode been selected. STATIC mode, these pins should open. Ver.
TESTA CUP1 CUP2 CUP3
Preliminary
Name XTIN XTOUT
CFIN CFOUT COM1~8 SEG1~10 SEG11~26/KO1~16 SEG27~42
IOA1~4
IOB1~4
IOC1~4
IOD1~4
S1~4 KI1~4
Description Time based counter frequency (Clock specified. alternating frequency. Alarm signal frequency.) system clock oscillation. 32KHz crystal oscillator. Oscillation stops execution STOP instruction. System clock oscillation. Connected with ceramic resonator. Connected with oscillation circuit. Oscillation stops execution STOP SLOW instruction. Output pins supplying voltage drive common pins panel. Output pins panel segment. Output pins panel segment. strobe function, share pins scan output. Output pins panel segment. Input/Output port software define internal pull-low resistor chattering clock order reduce input bounce generate interrupt. This port shares pins with SEG35~38 mask option. This port also shares pins with mask option. Input/Output port port shares pins with SEG31~34, mask option. This port also shares pins with ELC, ELP, mask option. Input/Output port software define internal pull-low/low-level hold resistor chattering clock order reduce input bounce generate interrupt keyboard scanning function with ELC, ELP, mask option. Input/Output port This port shares pins with SEG27~30 mask option. IOD3, shares pins with PWM1, mask option. Input ports mask option internal pull-low/low-level hold resistor chattering clock order reduce input bounce generate interrupt HALT STOP release. scan input, this port shares pins with IOC1~4 mask option. input output pins application. This port shares pins with SEG35~38 mask option. This port shares pins with IOA1~4 mask option. Output port EL-light. This port shares pins with SEG31, mask option. This port shares pins with IOB1, mask option. Output port alarm, frequency melody generator. This port shares pins with IOB3, mask option. 6/8-Bit output; mask option. Negative supply voltage.
PWM1,
Preliminary
Ver.
Absolute Maximum Rating
Name Maximum Supply Voltage Symbol VDD1 VDD2 VDD3 VDD4 VOUT1 VOUT2 tOPG tSTG
Rating -0.3 +5.5 -0.3 +5.5 -0.3 +8.5 -0.3 +8.5 -0.3 VDD1/2+0.3 -0.3 VDD1/2+0.3 -0.3 VDD3+0.3 +125 Condition Min. VDD1-0.7 -0.7 Battery Mode OSCIN Battery Mode OSCIN Battery Mode CFIN Battery EXT-V Mode VDD2-0.7 -0.7 0.8VDD1 0.8VDD2 0.8VDD2 Mode Crystal Mode External Mode Mode 0.8VDDO 1000 Max. 5.25 5.25
GND=0V Unit
Maximum Input Voltage Maximum Output Voltage Maximum Operating Temperature Maximum Storage Temperature
Allowable operating conditions
Name Supply Voltage Symbol VDD1 VDD2 VDD3 VDD4 VDDB VDDB VDD1 VDD2 VIH1 VIL1 VIH2 VIL2 VIH3 VIL3 VIH4 VIL4 VIH5 VIL5 VIH6 VIL6 fOPG1 fOPG2 fOPG3
GND=0V Unit
Oscillator Start-up Voltage Oscillator Sustain Voltage Supply Voltage Supply Voltage Input Voltage Input Voltage Input Voltage Input Voltage Input Voltage Input Voltage Input Voltage Input Voltage Input Voltage Input Voltage Input Voltage Input Voltage Operating Freq.
Crystal Mode Crystal Mode Mode EXT-V, Mode Battery Mode
1.65 5.25 VDD1+0.7 VDD2+0.7 VDD1 0.2VDD1 VDD2 0.2VDD2 VDD2 0.2VDD2 VDDO 0.2VDDO 3580 1000 3580
Preliminary
Ver.
Electrical Characteristics
Input resistance Name -Level Hold (IOC) Symbol RIIH1 RIIH2 RIIH3 RMSD1 IOC/IOA Pull-Down RMSD2 RMSD3 RINTU1 Pull-Up RINTU2 RINTU3 RINTD1 Pull-Down RINTD2 RINTD3 RRES1 Pull-Down RRES2 RRES3 Condition VI=0.2VDD1, VI=0.2VDD2, VI=0.2VDD2, VI=VDD1, VI=VDD2, VI=VDD3, VI=VDD1, VI=VDD2, VI=VDD3, VI=GND, VI=GND, VI=GND, VI=GND VDD1, VI=GND VDD2, VI=GND VDD2, Min. Typ. Max. 1000 1000 1000 1000 1000 1000 Unit
Note: VDD1= 1.2V VDD2= 2.4V VDD2= (Ext-V). output characteristics Name Output Voltage Symbol VOH1a VOH2 VOH3 VOL1 Output Voltage VOL2 VOL3 VOH1c Output Voltage VOH2c VOH3c VOL1c VOL2c VOL3C Condition IOH=-10 IOH=-50 IOH=-200 IOL=20 IOL=100 IOL=400 IOH=-200 IOH=-1mA, IOH=-3mA, IOL=400 IOL=2mA, IOL=6mA, SEG1~26 Min. SEG27~42 IOA, Typ. Max. Unit
Output Voltage
Note: VDD1= 1.2V VDD2= 2.4V VDD2= (Ext-V).
Preliminary
Ver.
Segment driver output characteristics Name Static display mode Output Voltage Symbol VOH1d VOH2d VOH3d VOL1d Output Voltage VOL2d VOL3d VOH1e Output Voltage VOH2e VOH3e VOL1e Output Voltage bias display mode Output Voltage Output Voltage Output Voltage Output Voltage Output Voltage bias display mode Output Voltage Output Voltage Output Voltage Output Voltage Output Voltage Output Voltage Output Voltage Output Voltage VOH12i VOH3i VOM12i VOM13i VOM22i VOM23i VOL12i VOL3i VOH12j VOH3j VOM12j VOM13j VOM22j VOM23j VOL12j VOL3j IOH=-1 IOH=-1 IOI/H= IOI/H= IOI/H= IOI/H= IOL=1 IOL=1 IOH=-10 IOH=-10 IOI/H= IOI/H= IOI/H= IOI/H= IOL=10 IOL=10 COM-n SEG-n VOH12f VOH3f VOL12f VOL3f VOH12g VOH3g VOM12g VOM3g VOL12g VOL3g IOH=-1 IOH=-1 IOL=1 IOL=1 IOH=-10 IOH=-10 IOI/H= IOI/H= IOL=10 IOL=10 COM-n SEG-n VOL2e VOL3e Condition IOH=-1 IOH=-1 IOH=-1 IOL=1 IOL=1 IOL=1 IOH=-10 IOH=-10 IOH=-10 IOL=10 IOL=10 IOL=10 COM-n SEG-n Min. Typ. Max. Unit
Note: VDD1= 1.2V VDD2= 2.4V VDD2= (Ext-V).
Preliminary
Ver.
Functional Description
SRAM bits index SRAM bits data SRAM separate regions. Index bits index used 4-bit mode 8-bit mode. ports port selected software separately input output, with/without internal pull-low different chattering clocks order HALT release/ interrupt trigger reduce bounce key_scan: PH6: 512Hz PH8:128Hz PH10: 32Hz pull-low will masked those pins defined output pins. port used pseudo serial output port. port selected software separately input output. port selected software separately input output, with/without internal pull-low different chattering clocks order HALT release/ interrupt trigger reduce bounce key_scan. port selected software separately input output. port used pseudo serial output port. initial state ports standard input state IOA, have pull-low device. Before setting some pins from input output, execute output function ensure their output value. ports input pins that contain pull-low. L_L_H resistor selected mask option different chattering clocks same manner IOA, ports. Resistor frequency converter oscillation circuit 16-bit counter calculate relative resistance temperature humidity sensor. diagram shown below:
Timer Controller
Freq.
Rref
Freq.
16-Bit Counter
4-Bit Data
There types methodology measuring input frequency: first, (i.e. clock input, using timer interval control using software directly control interval. Second, (CX) frequency low, either because poor resolution fixed interval longer interval better
Preliminary
Ver.
resolution with longer read-out rate (for example: seconds read-out), switch measure mode order (CX) interval control will enable counter from first rising edge next rising edge, then will generate interrupt) FREQ (internal frequency generator output) clock input, hence count interval measure resistor value temperature humidity sensor, must first measure frequency Rref, then frequency sensor. Fref= K/Rref Fsensor= K/Rsensor hence Rsensor= Rref Freq/Fsensor. Where coefficient RC-oscillation will constant short time period. Keyboard scanning function SEG11~26 shares keyboard scanning output, output keyboard scanning open-drain VDDO (positive power supply) other SEGs COMs Hi-z state during this period. This will minimize effect output. segment 11-26 also could used keyscan output still could displayed with only slightly affected. 00b5 will disable key-scan output. will keyscan output high, b5=0. b3~b0: will corresponding segment output b5=0 b4=0. During power off, STOP condition. common segment output will chips supply power. EL-light clock duty cycle instruction, then turn output instruction. With external transistor, diode, inductor resistor, pump Elpanel 100~250V.
EL-plane
While light turned will turn before ELP, when light turned off, will turn after next falling edge make sure voltage left panel.
Preliminary
Ver.
Timer 6-bit programmable timer select PH3/PH9/PH15/FREQ (timer also select PH5/PH7/PH11/ PH13 TM2X instruction) clock source. When underflows, HALT release signal generated. Predivider predivider 15-stage counter that uses clock source. output T-F/F changed when input signal changed from PH11~15 reset when 100H instruction executed, power-on external reset used. When PH14 changed from HALT release signal generated. Alarm/frequency/melody There 8-bit programmable counter 8-bit envelope control alarm, frequency melody output from BZ/BZB. frequency counter software select duty, duty duty drive mode.
Freq.
Duty Frequency
Duty Frequency
Duty Frequency
function selected mask option pull-high/pull-low none, rising edge/falling edge trigger. Watchdog timer watchdog timer automatically generates device reset when overflows. interval overflow 8/64/512 PH10 (set mask option). software enable disable this function. watchdog enable flag will disabled power-on reset reset-pin reset condition, cannot disabled watchdog reset itself. HALT function HALT instruction will disable clocks except predivider, timer, frequency counter, PWM, EL-light generator chattering clock minimize operating current. STOP function STOP instruction will disable clocks minimize standby current, only external factors (INT, IOA/IOC/S port, keyscan) release STOP condition.
Instruction Table (Total instructions)
Instruction Machine Code 0000 0000 0000 0000 0000 001Z ZZZZ YYYY 0000 010Z ZZZZ YYYY 0000 011Z ZZZZ YYYY 0000 100Z ZZZZ 0000 0000 100Z ZZZZ Z-01 Function Operation 7SEG 7SEG T@HL Flag/Remark
{7SEG Ver.
Preliminary
Instruction OPAS OPDS
Machine Code 0000 100Z ZZZZ Z-10 0000 100Z ZZZZ Z-11 0000 1010 0XXX XXXX 0000 1011 DXXX XXXX 0000 1100 0XXX XXXX 0000 1101 0XXX XXXX 0000 1110 0XXX XXXX 0000 1111 DXXX XXXX
Function {7SEG @HL, Port(A) Port(B) Port(C) Port(D) Rx0, Rx1, Pulse Rx0, Rx1, Pulse
Flag/Remark
0001 00DD 0XXX XXXX
D,@HL FRQX MPW1 MPW2 ADC* ADC* SBC* SBC* ADD* ADD* SUB* SUB* ADN* ADN*
0001 01DD 0000 0000 0001 10DD XXXX XXXX 0001 1100 0XXX XXXX 0001 1101 0XXX XXXX 0001 1110 0XXX XXXX 0001 1111 0XXX XXXX 0010 0000 0XXX XXXX 0010 0000 1000 0000 0010 0001 0XXX XXXX 0010 0001 1000 0000 0010 0010 0XXX XXXX 0010 0010 1000 0000 0010 0011 0XXX XXXX 0010 0011 1000 0000 0010 0100 0XXX XXXX 0010 0100 1000 0000 0010 0101 0XXX XXXX 0010 0101 1000 0000 0010 0110 0XXX XXXX 0010 0110 1000 0000 0010 0111 0XXX XXXX 0010 0111 1000 0000 0010 1000 0XXX XXXX 0010 1000 1000 0000 0010 1001 0XXX XXXX 0010 1001 1000 0000 0010 1010 0XXX XXXX 0010 1010 1000 0000
FREQ DD=00: Duty DD=01: Duty DD=10: Duty DD=11: Duty T@HL FREQ FREQ Rx+AC+CF @HL+AC+CF Rx+AC+CF @HL+AC+CF Rx+ACB+CF @HL+ACB+CF Rx+ACB+CF @HL+ACB+CF Rx+AC @HL+AC Rx+AC @HL+AC Rx+ACB+1 @HL+ACB+1 Rx+ACB+1 @HL+ACB+1 Rx+AC @HL+AC Rx+AC @HL+AC Ver.
PWM1 PWM2 AC,Rx AC,@HL AC,@HL
Preliminary
Instruction AND* AND* EOR* EOR* ADCI Ry,D ADCI* Ry,D SBCI Ry,D SBCI* Ry,D ADDI Ry,D ADDI* Ry,D SUBI Ry,D SUBI* Ry,D ADNI Ry,D ADNI* Ry,D ANDI Ry,D ANDI* Ry,D EORI Ry,D EORI* Ry,D Ry,D ORI* Ry,D INC* INC* DEC* DEC*
Machine Code 0010 1011 0XXX XXXX 0010 1011 1000 0000 0010 1100 0XXX XXXX 0010 1100 1000 0000 0010 1101 0XXX XXXX 0010 1101 1000 0000 0010 1110 0XXX XXXX 0010 1110 1000 0000 0010 1111 0XXX XXXX 0010 1111 1000 0000 0011 0000 DDDD YYYY 0011 0001 DDDD YYYY 0011 0010 DDDD YYYY 0011 0011 DDDD YYYY 0011 0100 DDDD YYYY 0011 0101 DDDD YYYY 0011 0110 DDDD YYYY 0011 0111 DDDD YYYY 0011 1000 DDDD YYYY 0011 1001 DDDD YYYY 0011 1010 DDDD YYYY 0011 1011 DDDD YYYY 0011 1100 DDDD YYYY 0011 1101 DDDD YYYY 0011 1110 DDDD YYYY 0011 1111 DDDD YYYY 0100 0000 0XXX XXXX 0100 0000 1000 0000 0100 0001 0XXX XXXX 0100 0001 1000 0000 0100 0010 0XXX XXXX 0100 0100 0XXX XXXX 0100 0110 0XXX XXXX 0100 0111 0XXX XXXX 0100 1000 0XXX XXXX 0100 1010 0XXX XXXX
AC,@HL AC,@HL AC,@HL AC,Rx
Function Ry+D+CF Ry+DB+CF Ry+DB+CF Ry+D Ry+D Ry+DB+1 Ry+DB+1 Ry+D Ry+D Rx+1 @HL+1 Rx-1 @HL-1 Port(A) Port(B) Port(S) Port(C) Port(D) STS1 Ry+D+CF
Flag/Remark
ZERO use) use)
Preliminary
Ver.
Instruction
Machine Code 0100 1011 0XXX XXXX AC,Rx
Function STS2
0100 1100 0XXX XXXX
AC,Rx
STS3
0100 1101 0XXX XXXX
AC,Rx
STS3X
0100 1110 0XXX XXXX
AC,Rx
STS4
Flag/Remark use) SCF2(HRx) SCF1(CPT) SCF7(PDV) PH15 SCF5(TMR1) SCF4(INT) SCF9(RFC) SCF0(APT) SCF6(TMR2) use) use) RFOVF
DAA* DAA* DAS* DAS* Rx,D Rx,@HL LDH* Rx,@HL Rx,@HL LDL* Rx,@HL MRF1 MRF2 MRF3 MRF4
0101 0000 0XXX XXXX 0101 0001 0XXX XXXX 0101 0010 0XXX XXXX 0101 0011 0XXX XXXX 0101 0100 0000 0000 0101 0101 0XXX XXXX 0101 0101 1000 0000 0101 0110 0000 0000 0101 0111 0XXX XXXX 0101 0111 1000 0000 0101 1DDD DXXX XXXX 0110 0000 0XXX XXXX 0110 0001 0XXX XXXX 0110 0010 0XXX XXXX 0110 0011 0XXX XXXX 0110 0100 0XXX XXXX 0110 0101 0XXX XXXX 0110 0110 0XXX XXXX 0110 0111 0XXX XXXX 0110 1000 0XXX XXXX 0110 1000 1000 0000
ACn, AC3, ACn, AC3, ACn, AC0, Can, AC0,
Rx(n+1) Rx(n+1) Rx(n-1) Rx(n-1) BCD(AC) BCD(AC) BCD(AC) BCD(AC) H(T@HL)
BCD(AC)
BCD(AC)
H(T@HL) L(T@HL) L(T@HL) AC,Rx AC,Rx AC,Rx AC,Rx Ver. RFC3-0 RFC7-4 RFC11-8 RFC15-12
Preliminary
Instruction @HL,Rx Rx,@HL Ry,Rx Rx,Ry CALL
Machine Code 0110 1100 0XXX XXXX 0100 1100 1000 0000 0110 1101 0XXX XXXX 0110 1110 0XXX XXXX 0110 1111 0XXX XXXX 0111 0YYY YXXX XXXX 0111 1YYY YXXX XXXX 1000 0XXX XXXX XXXX 1000 1XXX XXXX XXXX 1001 0XXX XXXX XXXX 1001 1XXX XXXX XXXX 1010 0XXX XXXX XXXX 1010 1XXX XXXX XXXX 1011 0XXX XXXX XXXX 1011 1XXX XXXX XXXX 1100 0XXX XXXX XXXX 1101 0XXX XXXX XXXX 1101 1000 0000 0000
Function AC,Rx AC,Ry PC+1
Flag/Remark
AC,@HL
AC,Rx
STACK
STACK
CALL Return
1101 1001 0XXX XXXX
(SMS)
1101 1010 00XX XXXX 1101 1100 000X XXXX 1101 1101 0000 XXXX 1101 1110 000X XXXX 1101 1111 0000 XXXX 1110 0000 0XXX XXXX 1110 0001 0000 0000
BCLK BCLK P(A) P(S) X2,1,0=001: PH10 X2,1,0=010: X2,1,0=1XX: X0~3: S1~4 Enable (SEF0~3) A1-4 Enable (SEF5) C1-4 Enable (SEF4) A4~1 Pull-Low X3~0: A4~1 X3~0: D4~1 C4-1 Pull-Low/ Low-Level-Hold X3~0: C4-1 X3-0: D4~1 Timer1 Timer1 T@HL
Preliminary
Ver.
Instruction
Machine Code
TMSX
1110 0010 XXXX XXXX
1110 0011 00XX XXXX 1110 0100 0XXX XXXX 1110 0101 0000 0000
Function X7,6=11: Ctm=FREQ X7,6=10: Ctm=PH15 X7,6=01: Ctm=PH3 X7,6=00: Ctm=PH9 X5~0: Timer1 Value Hi-Z Timer2 Timer2 T@HL X8,7,6=111 Ctm=PH13 X8,7,6=110 Ctm=PH11 X8,7,6=101 Ctm=PH7 X8,7,6=000 Ctm=PH5 X8,7,6=011 Ctm=FREQ X8,7,6=010 Ctm=PH15 X8,7,6=001 Ctm=PH3 X8,7,6=000 Ctm=PH9 X5~0: Timer2 Value Enable HEF6(RFC) Enable HEF4(TMR2) Enable HEF3(PDV) Enable HEF2(INT) Enable HEF1(TMR1) Enable IEF6(RFC) Enable IEF5(KEY_S) Enable IEF4(TMR2) Enable IEF3(PDV) Enable IEF2(INT) Enable IEF1(TMR1) Enable IEF0(A,CPT) Reset PH15~11 4~0: Reset HRF6, Enable Control Enable Timer2 Control Enable Counter Enable Output Enable Output Enable Output Enable SRF7 Enable SRF6 Enable SRF5 Enable SRF4 X3~0: Enable SRF3~0 SCLK: High Speed Clock SCLK: Speed Clock
Flag/Remark
IOC=Normal IOC=Key_scan IOC=Key_scan
TM2X
1110 011X XXXX XXXX
1110 1000 0XXX XXX0
SIE*
1110 1001 0XXX XXXX
1110 101X 0XXX XXXX
1110 1100 00XX XXXX
1110 1101 X0XX 0000
SRF7 (KEY_S) SRF6 Port) SRF5 (INT) SRF4 Port) SRF3~0 Port)
FAST SLOW
1110 1110 0000 0000 1110 1111 0000 0000
Preliminary
Ver.
Instruction
Machine Code
1111 0000 X0XX XXXX
1111 0100 X00X 0XXX
1111 1000 0000 0XXX
1111 1001 0000 0XXX
1111 101X XXXX XXXX
Function Reload S-Port Pull-low Enable HALT after LIGHT LIGHT Reload Reset S-port Reset LIGHT Reset Reset Reload Dis-ENX Close segments Jump next page Reload Reset Disable Dis-ENX Reset Release Segments X8,7,6=111: FREQ X8,7,6=100: X8,7,6=011: X8,7,6=010: X8,7,6=001: X8,7,6=000: X5~0 PH15~10 X8=1 BCLKX X8=0 X7,6=11 BCLK/8 X7,6=10 BCLK/4 X7,6=01 BCLK/2 X7,6=00 BCLK X5,4=11 X5,4=10 X5,4=01 X5,4=00 X3,2=11 X3,2=10 X3,2=01 X3,2=00 X1,0=11 X1,0=10 X1,0=01 X1,0=00 HALT operation STOP operation
Flag/Remark
RSOFF RSOFF
BCLKX
DUTY
1111 110X XXXX XXXX
DUTY
HALT STOP
1111 1110 0000 0000 1111 1111 0000 0000
Preliminary
Ver.
Symbol description
HRFn HEFn Fout T@HL RFOVF L(T@HL) Accumulator Accumulator Address Memory Address Memory Address Memory Working Register Backup Flag Addres Index HALT Release Flag HALT Release Enable Flag Clock Source Frequency Generator Clock Source Timer Frequency Predivider Latch Address Index Clock Source Flag Address Index Overflow Flag Nibble Index ZERO BCLK IEFn SRFn SCFn SEFn FREQ H(T@HL) Immediate Date Program Counter Carry Flag Zero Flag Watchdog Timer Enable Flag Index Register System clock stops only STOP condition Interrupt Enable Flag STOP Release Enable Flag Start Condition Flag Clock Source Chattering Detector Timer Overflow Release Flag Content Register Switch Enable Flag Frequency Generator Setting Value Flag Digital-to-Analog Converter Output Signal High Address Index High Nibble Index
Appendix (Important Issue APU429/428)
Chip's internal vlotage V.S. power mode external connection VDD1 VDD2 VDD3 VDD4 Vsupply VDD1 VDD1 VDD1 VDD1 Vsupply Vsupply Vsupply Vsupply BCF=0 BCF=1 VDD1 VDD2 EXT-V Vsupply Vsupply Vsupply Vsupply VDD2 Note
Note: VDD3 only used operating bias bias. bias chosen, VDD3 need connected VDD2 (VDD3 equal VDD2). VDD4 only used operating bias. bias chosen, VDD4 need connected VDD3 (VDD4 equal VDD3). bias chosen, VDD4 need connected VDD2 (VDD4 equal VDD2). defined chip's internal power supply node, which used only internal logic circuitry. Whatever power mode used, external VDD# pins must connect capacitor (0.05 decoupling power noise using. VDD# pins other than Vsupply from voltage charge pump, i.e. clock, then VDD# pins supply out. Vsupply power supply Chip depends power mode used, input output pins voltage range follow Vsupply. capacitor connected between CUP2 CUP3 only when APU429 operating bias. Some notes flag always High automatically after Power Reset STOP mode. power saving use, which reduce chip's current consumption.
Preliminary
Ver.
battery mode applications: After Power Reset release from STOP mode. Need wait seconds long, then Larger current load fast clock: should High case fast clock larger current load (such RFC, ADC, DAC, EL-light Buzzer output) use. After high need wait long least, then enable larger current load. after disable Larger current load, need wait long least, then battery mode applications: Especially battery mode, switching will cause temporary current surge power noise) BAK. Furthermore necessary, don't switch often possible. Improperly will cause malfunction chips. Lower current consumption reliability: chip's reliability will greatly decrease invalid BCF, especially Li-battery mode. Because chip's internal power also switches between VDD1 VDD2, which also cause temporary power noise. Input input pins floating will cause chips malfunction large current consumption. 32.768kHz oscillator Always layout close Chips possible place signals across layout routing. Since oscillation circuit consumes current only power noise will disturb oscillation. proper external capacitors XOUT necessary accuracy stability oscillation. (Cin+Cpcb) (Cout+Cpcb 1/CL Chip XOUT internal capacitor around 10~20pF connected (chip internal Node). example: Epson C-001R 20ppm, CL=12.5pF 25pF COUT 15pF time accuracy will around second/day Note: parasitic capacitors pins layout need considered above calculation. RFC/Event counter/IOA APU429 anyone uses Event counter function IOAs same application, make sure IOA1 (which corresponding mask option) must output mode instruction. signal changes cause HALT release interrupt port. this case program couldn't function properly.
Preliminary
Ver.
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