W78L32
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W78L32 - W78L32
W78L32 8-BIT MICROCONTROLLER
W78L32 microcontroller supplies wider frequency range supply voltages than most 8-bit microcontrollers market. compatible with industry standard 80C32 microcontroller series. W78L32 contains four 8-bit bidirectional parallel ports, three 16-bit timer/counters serial port. These peripherals supported six-source, two-level interrupt capability. There bytes RAM, device supports ROMless operation application programs. W78L32 microcontroller power reduction modes, idle mode power-down mode, both which software selectable. idle mode turns processor clock allows continued peripheral operation. power-down mode stops crystal oscillator minimum power consumption. external clock stopped time state without affecting processor.
Fully static design Supply voltage 1.8V 5.5V power consumption full supply voltage DC-24 operation bytes on-chip scratchpad bytes program memory address space bytes data memory address space Four 8-bit bidirectional ports Three 16-bit timer/counters full duplex serial port Boolean processor Six-source, two-level interrupt capability Built-in power management Packages:
W78L32-24 PLCC W78L32P-24 W78L32F-24
Publication Release Date: October 2000 Revision
W78L32
CONFIGURATIONS
40-Pin (W78L32)
P1.0 T2EX, P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RXD, P3.0 TXD, P3.1 INT0, P3.2 INT1, P3.3 P3.4 P3.5 P3.6 P3.7 XTAL2 XTAL1 P0.0, P0.1, P0.2, P0.3, P0.4, P0.5, P0.6, P0.7, PSEN P2.7, P2.6, P2.5, P2.4, P2.3, P2.2, P2.1, P2.0,
44-Pin PLCC (W78L32P)
44-Pin (W78L32F)
P1.5 P1.6 P1.7 RXD, P3.0 TXD, P3.1 INT0, P3.2 INT1, P3.3 P3.4 P3.5
P0.4, P0.5, P0.6, P0.7, PSEN P2.7, P2.6, P2.5,
P1.5 P1.6 P1.7 RXD, P3.0 TXD, P3.1 INT0, P3.2 INT1, P3.3 P3.4 P3.5
P0.4, P0.5, P0.6, P0.7, PSEN P2.7, P2.6, P2.5,
W78L32
DESCRIPTION
P0.0-P0.7
Port Bits through Port bidirectional port. This port also provides multiplexed order address/data during accesses external memory.
P1.0-P1.7
Port Bits through Port bidirectional port with internal pull-ups. Pins P1.0 P1.1 also serve (Timer external input) T2EX (Timer capture/reload trigger), respectively.
P2.0-P2.7
Port Bits through Port bidirectional port with internal pull-ups. This port also provides upper address bits accesses external memory.
P3.0-P3.7
Port Bits through Port bidirectional port with internal pull-ups. bits have alternate functions, which described below: P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 ALTERNATE FUNCTION Serial Receive Data Serial Transmit Data
INT0 External Interrupt INT1 External Interrupt
Timer Input Timer Input
Data Write Strobe Data Read Strobe
External Address Input, active low. This forces processor execute external ROM. This should kept W78L32 operations.
Reset Input, active high. This resets processor. must kept high least machine cycles order recognized processor.
Address Latch Enable Output, active high. used enable address latch that separates address from data Port runs 1/6th oscillator frequency. single pulse skipped during external data memory accesses. goes high state during reset with weak pull-up.
Publication Release Date: October 2000 Revision
W78L32
PSEN
Program Store Enable Output, active low. PSEN enables external onto Port address/data during fetch MOVC operations. PSEN goes high state during reset with weak pull-up.
XTAL1
Crystal This crystal oscillator input. This driven external clock.
XTAL2
Crystal This crystal oscillator output. inversion XTAL1.
VSS,
Power Supplies. These chip ground positive supplies.
BLOCK DIAGRAM
Bytes
Port Port Alternate
Data
Port Port Alternate
CORE
Serial Port Timer Interrupt
W78L32
FUNCTIONAL DESCRIPTION
W78L32 architecture consists core controller surrounded various registers, four general purpose ports, bytes RAM, three timer/counters, serial port. processor supports different instruction references both program address space data storage space.
Timers
Timers each consist 8-bit data registers. These called Timer Timer Timer TCON TMOD registers provide control functions timers T2CON register provides control functions Timer RCAP2H RCAP2L used reload/capture registers Timer operations Timer Timer same W78C31. Timer special feature W78L32: 16-bit timer/counter that configured controlled T2CON register. Like Timers Timer operate either external event counter internal timer, depending setting C/T2 T2CON. Timer three operating modes: capture, autoreload, baud rate generator. clock speed capture auto-reload mode same that Timers
Clock
W78L32 designed used with either crystal oscillator external clock. Internally, clock divided before used. This makes W78L32 relatively insensitive duty cycle variations clock. Crystal Oscillator W78L32 incorporates built-in crystal oscillator. make oscillator work, crystal must connected across pins XTAL1 XTAL2. addition, load capacitor must connected from each ground, resistor must also connected from XTAL1 XTAL2 provide bias when crystal frequency above MHz. External Clock external clock should connected XTAL1. XTAL2 should left unconnected. XTAL1 input CMOS-type input, required crystal oscillator. result, external clock signal should have input level greater than volts when
Power Management
Idle Mode idle mode entered setting PCON register. idle mode, internal clock processor stopped. peripherals interrupt logic continue clocked. processor will exit idle mode when either interrupt reset occurs. Power-down Mode When PCON register set, processor enters power-down mode. this mode clocks, including oscillator stopped. only exit power-down mode reset.
Publication Release Date: October 2000 Revision
W78L32
Reset external RESET signal sampled S5P2. take effect, must held high least machine cycles while oscillator running. internal trigger circuit reset line used deglitch reset line when W78L32 used with external network. reset logic also special glitch removal circuit that ignores glitches reset line. During reset, ports initialized FFH, stack pointer 07H, PCON (with exception 00H, other registers except SBUF 00H. SBUF reset.
ABSOLUTE MAXIMUM RATINGS
PARAMETER Power Supply Input Voltage Operating Temperature Storage Temperature SYMBOL VCC-VSS MIN. -0.3 -0.3 MAX. +7.0 +0.3 +150 UNIT
Note: Exposure conditions beyond those listed under Absolute Maximum Ratings adversely affect life reliability device.
CHARACTERISTICS
(VDD-VSS ±10%, 25°C, Fosc MHz, unless otherwise specified.)
PARAMETER Operating Voltage Operating Current Idle Current Power Down Current Input Current Input Current Input Leakage Current Logic Transition Current
SYM. IIDLE IPWDN IIN1 IIN2 [*4]
PECIFICATION MIN. -500 MAX. +300
UNIT
TEST CONDITIONS
load, 5.5V, load, 2.0V, 5.5V, Fosc 2.0V, Fosc 5.5V, Fosc 2.0V, Fosc 5.5V 5.5V 5.5V 5.5V 2.0V
W78L32
Characteristics, continued
PARAMETER Input Voltage Input Voltage Input Voltage XTAL1 [*4] Input High Voltage Input High Voltage Input High Voltage XTAL1 [*4] Output Voltage Output Voltage ALE, PSEN [*3] Sink Current Sink Current ALE, PSEN Output High Voltage Output High Voltage ALE, PSEN [*3] Source Current Source Current ALE, PSEN
Notes:
SYM. VIL1 VIL2 VIL3 VIH1 VIH2 VIH3 VOL1 VOL2 ISK1 ISK2 VOH1 VOH2 ISR1 ISR2
PECIFICATION MIN. -100 -1.4 MAX. +0.2 +0.2 +0.2 +0.2 +0.2 +0.2 0.45 0.25 0.45 0.25 -250 -2.4
UNIT
TEST CONDITIONS 4.5V 2.0V 4.5V 2.0V 4.5V 2.0V 5.5V 2.0V 5.5V 2.0V 5.5V 2.0V 4.5V, 2.0V, 4.5V, 2.0V, 4.5V, 0.45V 2.0V, 0.45V 4.5V, 0.45V 2.0V, 0.45V 4.5V, -100 2.0V, 4.5V, -400 2.0V, -200 4.5V,Vin 2.4V 2.0V,Vin 1.4V 4.5V,Vin 2.4V 2.0V,Vin 1.4V
Schmitt trigger input. /PSEN tested external access mode. XTAL1 CMOS input. Pins source transition current when they being externally driven from
Publication Release Date: October 2000 Revision
W78L32
CHARACTERISTICS
specifications function particular process used manufacture part, ratings buffers, capacitive load, internal routing capacitance. Most specifications expressed terms multiple input clock periods (TCP), actual parts will usually experience less than variation. numbers below represent performance expected from micron CMOS process when using output buffers.
Clock Input Waveform
XTAL1
PARAMETER Operating Speed Clock Period Clock High Clock
SYMBOL
MIN. 41.7
TYP.
MAX.
UNIT
NOTES
Notes: clock stopped indefinitely either state. specification used reference other specifications. There duty cycle requirements XTAL1 input.
Program Fetch Cycle
PARAMETER Address Valid Address Hold after PSEN
PSEN Data Valid
SYMBOL TAAS TAAH TAPL TPDA TPDH TPDZ TALW TPSW
MIN. TCP- TCP- TCP- TCP- TCP-
TYP.
MAX.
UNIT
NOTES
Data Hold after PSEN High Data Float after PSEN High Pulse Width
PSEN Pulse Width
Notes: P0.0-P0.7, P2.0-P2.7 remain stable throughout entire memory cycle. Memory access time TCP. Data have been latched internally prior PSEN going high. (due buffer driving delay wire loading)
W78L32
Data Read Cycle
PARAMETER
Data Valid
SYMBOL TDAR TDDA TDDH TDDZ TDRD
MIN. TCP- TCP-
TYP.
MAX. TCP+
UNIT
NOTES
Data Hold after High Data Float after High
Pulse Width
Notes: Data memory access time TCP. (due buffer driving delay wire loading)
Data Write Cycle
PARAMETER Data Valid Data Hold from High
Pulse Width
SYMBOL TDAW TDAD TDWD TDWR
MIN. TCP- TCP- TCP- TCP-
TYP.
MAX. TCP+
UNIT
Note: (due buffer driving delay wire loading)
Port Access Cycle
PARAMETER Port Input Setup Port Input Hold from Port Output SYMBOL TPDS TPDH TPDA MIN. TYP. MAX. UNIT
Note: Ports read during S5P2, output data becomes available S6P2. timing data referenced ALE, since provides convenient reference.
Publication Release Date: October 2000 Revision
W78L32
TIMING WAVEFORMS
Program Fetch Cycle
XTAL1
TALW TAPL PSEN TPSW TAAS PORT TAAH PORT Code A0-A7 Data A0-A7 Code A0-A7 Data A0-A7 TPDA TPDH, TPDZ
Data Read Cycle
XTAL1 PSEN PORT
A8-A15 A0-A7 DATA DDH,
PORT
W78L32
Timing Waveforms, continued
Data Write Cycle
XTAL1 PSEN PORT PORT
A8-A15 A0-A7 DATA
TDAD
TDWD
TDAW
Port Access Cycle
XTAL1
PORT INPUT SAMPLE DATA
Publication Release Date: October 2000 Revision
W78L32
TYPICAL APPLICATION CIRCUITS
Using External Program Memory Crystal
CRYSTAL
XTAL1 XTAL2 INT0 INT1 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 W78L32
P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 PSEN
74LS373
27512
Figure
CRYSTAL
Above table shows reference values crystal applications.
Note: components refer Figure
W78L32
Typical Application Circuits, continued
Expanded External Data Memory Oscillator
OSCILLATOR
XTAL1 XTAL2 INT0 INT1 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 W78L32
P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 PSEN
74LS373
20256
Figure
Publication Release Date: October 2000 Revision
W78L32
PACKAGE DIMENSIONS
40-pin
Symbol
Dimension inch Dimension Min. Nom. Max. Min. Nom. Max.
0.210 0.010 0.150 0.016 0.048 0.008 0.155 0.018 0.050 0.010 2.055 0.590 0.540 0.090 0.120 0.630 0.650 0.600 0.545 0.100 0.130 0.160 0.022 0.054 0.014 2.070 0.610 14.986 0.550 0.110 0.140 0.670 0.090 13.72 2.286 3.048 16.00 16.51 0.254 3.81 0.406 1.219 0.203 3.937 0.457 1.27 0.254 52.20 15.24 13.84 2.54 3.302 4.064 0.559 1.372 0.356 52.58 15.494 13.97 2.794 3.556 17.01 2.286 5.334
Notes:
Base Plane Seating Plane
Dimension Max. include mold flash burrs. Dimension does include interlead flash. Dimension include mold mismatch determined mold parting line. Dimension does include dambar protrusion/intrusion. Controlling dimension: Inches. General appearance spec. should based final visual inspection spec.
44-pin PLCC
Symbol
Dimension inch Dimension Min. Nom. Max. Min. Nom. Max.
0.185 0.020 0.145 0.026 0.016 0.008 0.648 0.648 0.590 0.590 0.680 0.680 0.090 0.150 0.028 0.018 0.010 0.653 0.653 0.155 0.032 0.022 0.014 0.658 0.658 0.630 0.630 0.700 0.700 0.110 0.004 0.508 3.683 0.66 0.406 0.203 16.46 16.46 14.99 14.99 17.27 17.27 2.296 3.81 0.711 0.457 0.254 16.59 16.59 3.937 0.813 0.559 0.356 16.71 16.71 16.00 16.00 17.78 17.78 2.794 0.10 4.699
Notes:
0.050
1.27
0.610 0.610 0.690 0.690 0.100
15.49 15.49 17.53 17.53 2.54
Seating Plane
Dimension include interlead flash. Dimension does include dambar protrusion/intrusion. Controlling dimension: Inches General appearance spec. should based final visual inspection spec.
W78L32
Package Dimensions, continued
44-pin
Symbol
Dimension inch
Dimension
Min. Nom. Max.
-0.002 0.075 0.01 0.004 0.390 0.390 0.025 0.510 0.510 0.025 0.051 -0.01 0.081 0.014 0.006 0.394 0.394 0.031 0.520 0.520 0.031 0.063 -0.02 0.087 0.018 0.010 0.398 0.398 0.036 0.530 0.530 0.037 0.075 0.003
Min. Nom.
-0.05 1.90 0.25 0.101 0.635 12.95 12.95 0.65 1.295 -0.25 2.05 0.35 0.152 10.00 10.00 0.80 13.2 13.2
Max.
-0.5 2.20 0.45 0.254 10.1 10.1 0.952 13.45 13.45 0.95 1.905 0.08
Notes:
Detail
Seating Plane
Detail
Dimension include interlead flash. Dimension does include dambar protrusion/intrusion. Controlling dimension: Millimeter General appearance spec. should based final visual inspection spec.
Headquarters
Winbond Electronics (H.K.) Ltd.
Unit 9-15, 22F, Millennium City, Creation III, Kwun Tong Science-Based Industrial Park, Kowloon, Hong Kong Hsinchu, Taiwan TEL: 852-27513100 TEL: 886-3-5770066 FAX: 852-27552064 FAX: 886-3-5792766 http://www.winbond.com.tw/ Voice Fax-on-demand: 886-2-27197006
Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab.
2727 First Street, Jose, 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798
Taipei Office
11F, 115, Sec. Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-27190505 FAX: 886-2-27197502
Note: data specifications subject change withou notice.
Publication Release Date: October 2000 Revision
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