TDA9885 TDA9886
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TDA9885; TDA9886 I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
Product specification Supersedes data 2002 2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
CONTENTS 8.10 8.11 8.12 8.13 8.14 8.15 8.16 9.1.1 9.1.2 9.2.1 9.2.2 9.2.3 9.2.4 FEATURES GENERAL DESCRIPTION APPLICATIONS ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION amplifier Tuner VIF-AGC VIF-AGC detector FPLL detector divider digital acquisition help Video demodulator amplifier Sound carrier trap amplifier SIF-AGC detector Single reference mixer demodulator demodulator acquisition help Audio amplifier mute time constant Internal voltage stabilizer I2C-bus transceiver module address I2C-BUS CONTROL Read format Slave address Data byte Write format Subaddress Data byte switching mode Data byte adjust mode Data byte data mode 15.1 15.2 15.3 15.4 15.5
TDA9885; TDA9886
LIMITING VALUES THERMAL CHARACTERISTICS CHARACTERISTICS TEST APPLICATION INFORMATION PACKAGE OUTLINES SOLDERING Introduction soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability surface mount packages wave reflow soldering methods DATA SHEET STATUS DEFINITIONS DISCLAIMERS PURCHASE PHILIPS COMPONENTS
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
FEATURES
TDA9885; TDA9886
supply voltage Gain controlled wide-band Vision Intermediate Frequency (VIF) amplifier, AC-coupled Multistandard true synchronous demodulation with active carrier regeneration: very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response Gated phase detector L-accent standard Fully integrated Voltage Controlled Oscillator (VCO), alignment-free, frequencies switchable negative positive modulated standards I2C-bus Digital acquisition help, frequencies 33.4, 33.9, 38.0, 38.9, 45.75, 58.75 reference frequency input: signal from Phase-Locked Loop (PLL) tuning system operating crystal oscillator Automatic Gain Control (AGC) detector gain control, operating peak sync detector negative modulated signals peak white detector positive modulated signals External setting Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit digital-to-analog converter, bits readable I2C-bus TakeOver Point (TOP) adjustable I2C-bus alternatively with potentiometer Fully integrated sound carrier trap 4.5, 5.5, 6.0, MHz, controlled FM-PLL oscillator Sound (SIF) input single reference Quasi Split Sound (QSS) mode, controlled ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA9885T/V3 TDA9885TS/V3 TDA9885HN/V3 TDA9886T/V4 TDA9886TS/V4 TDA9886HN/V4 SO24 SSOP24 HVQFN32 SO24 SSOP24 HVQFN32 DESCRIPTION plastic small outline package; leads; body width plastic shrink small outline package; leads; body width plastic thermal enhanced very thin quad flat package; leads; terminals; body 0.85 plastic small outline package; leads; body width plastic shrink small outline package; leads; body width plastic thermal enhanced very thin quad flat package; leads; terminals; body 0.85 VERSION SOT137-1 SOT340-1 SOT617-3 SOT137-1 SOT340-1 SOT617-3 SIF-AGC gain controlled amplifier, single reference mixer able operate high performance single reference mode intercarrier mode, switchable I2C-bus demodulator without extra reference circuit Alignment-free selective FM-PLL demodulator with high linearity noise Four selectable I2C-bus addresses I2C-bus control functions I2C-bus transceiver with programmable Module Address (MAD). GENERAL DESCRIPTION
TDA9885 alignment-free multistandard (PAL NTSC) vision sound signal demodulator negative modulation only processing. TDA9886 alignment-free multistandard (PAL, SECAM NTSC) vision sound signal demodulator positive negative modulation, including sound processing. APPLICATIONS
VTR, applications.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
QUICK REFERENCE DATA SYMBOL Video part Vi(VIF)(rms) GVIF(cr) fVIF input voltage sensitivity (RMS value) gain control range video output Fig.7 PARAMETER supply voltage supply current CONDITIONS notes
TDA9885; TDA9886
MIN.
TYP.
MAX.
UNIT
33.4 33.9 38.0 38.9 45.75 58.75 ±2.3
vision carrier operating frequencies Table
fVIF Vo(v)(p-p)
frequency window digital acquisition help video signal output voltage (peak-to-peak value)
related fVIF; Fig.10 Fig.5 normal mode trap bypass mode
0.95
1.10
1.25
Gdif
differential gain
"CCIR 330"; note
standard standard
Bv(-1dB) Bv(-3dB)(trap)
differential phase video bandwidth video bandwidth including sound carrier trap
"CCIR 330"
trap bypass mode; load; note ftrap ftrap ftrap ftrap
3.95 4.90 5.40 5.50
4.05 5.00 5.50 5.95
S/NW
trap attenuation first sound carrier weighted signal-to-noise ratio
standard standard
weighted accordance with "CCIR 567"; Fig.11; note fripple video signal; grey level; positive negative modulation; Fig.6 definition: IAFC/fVIF
PSRRCVBS
power supply ripple rejection CVBS
AFCstps
control steepness
0.85
1.05
1.25
µA/kHz
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL Audio part Vo(AF)(rms) output voltage (RMS value) total harmonic distortion audio signal bandwidth weighted signal-to-noise ratio audio signal deviation; de-emphasis deviation; de-emphasis BAF(-3dB) S/NW(AF) without de-emphasis; dependent FM-PLL filter deviation; de-emphasis; vision carrier unmodulated AM(sup) suppression demodulator de-emphasis; referenced deviation fripple Fig.6 Vo(intc)(rms) intercarrier output level (RMS value) mode; SC1; standard; without modulation intercarrier mode; PC/SC1 off; note Reference frequency fref Vref(rms) Notes Values video sound parameters decreased reference signal frequency reference signal voltage (RMS value) note operation input terminal PARAMETER CONDITIONS
TDA9885; TDA9886
MIN.
TYP.
MAX.
UNIT
0.15
0.50
PSRRAUD
power supply ripple rejection
applications without I2C-bus, time constant supply must >1.2 (e.g. µF). Condition: luminance range steps) from load: sound carrier frequencies (depending standard) attenuated integrated sound carrier traps (see Figs absolute value transfer function). S/NW ratio black-to-white amplitude black level noise voltage (RMS value measured CVBS). weighted accordance with "CCIR 567".
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
intercarrier output signal SIOMAD calculated following formula taking into account internal video signal with (p-p) reference: o(intc)(rms) i(SC) i(PC) where: correction term value, sound-to-picture carrier ratio pins VIF1 VIF2 correction term internal circuitry tolerance video output intercarrier output Vo(intc)(rms). able operate 1-pin crystal oscillator input well external reference signal input, e.g. from tuning system.
2003
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CVAGC(pos) VAGC (17) DIGITAL CONTROL DETECTOR VIF-PLL filter VPLL (21) TAGC (15) CAGC(neg) TUNER VIF-AGC VIF2 VIF1 (31) (30) VIF-PLL
Philips Semiconductors
handbook, full pagewidth
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
BLOCK DIAGRAM
external reference signal crystal
(16)
(23)
SOUND CARRIER TRAPS
(18)
CVBS video output: (p-p) [1.1 (p-p) without trap]
TDA9885 TDA9886
SIF2 SIF1 (27) (26) SINGLE REFERENCE MIXER INTERCARRIER MIXER DEMODULATOR SUPPLY SIF-AGC CAGC n.c. OUTPUT PORTS 2C-BUS TRANSCEIVER NARROW-BAND FM-PLL DEMODULATOR AUDIO PROCESSING SWITCHES
DEEM
(22) (20) AGND
audio output
de-emphasis network
TDA9885; TDA9886
(24) (10)
DGND
(11) SIOMAD
FMPLL FM-PLL filter
MHC108
Product specification
sound intercarrier output select connected TDA9885. numbers TDA9885HN TDA9886HN parenthesis.
Fig.1 Block diagram.
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
PINNING SYMBOL VIF1 VIF2 n.c. FMPLL DEEM DGND n.c. SIOMAD n.c. n.c. n.c. TAGC VAGC n.c. CVBS n.c. AGND VPLL n.c. SIF1 SIF2 n.c. n.c. TDA9885T TDA9886T TDA9885HN TDA9886HN TDA9885TS TDA9886TS
TDA9885; TDA9886
DESCRIPTION differential input differential input connected output port open-collector FM-PLL loop filter de-emphasis output capacitor decoupling input capacitor digital ground connected audio output tuner TakeOver Point (TOP) resistor adjustment I2C-bus data input output I2C-bus clock input sound intercarrier output select with resistor connected connected connected tuner output crystal reference signal input VIF-AGC capacitor connected composite video output connected analog ground VIF-PLL loop filter supply voltage output output port open-collector connected differential input select with resistor differential input select with resistor connected connected
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, halfpage
handbook, halfpage
VIF1 VIF2 FMPLL DEEM DGND SIOMAD
MHC109
SIF2 SIF1 VPLL TDA9885T TDA9886T AGND CVBS VAGC TAGC n.c.
VIF1 VIF2 FMPLL DEEM DGND SIOMAD
MHC110
SIF2 SIF1 VPLL TDA9885TS TDA9886TS AGND CVBS VAGC TAGC n.c.
connected TDA9885T.
connected TDA9885TS.
Fig.2 configuration SO24.
Fig.3 configuration SSOP24.
SIOMAD
TAGC
handbook, halfpage
n.c.
n.c.
n.c.
n.c. DGND DEEM FMPLL
n.c. VIF2 VIF1 n.c. n.c. SIF2 SIF1 n.c.
VAGC(1) CVBS n.c. AGND VPLL
TDA9885HN TDA9886HN
terminal index area
MHC111
Bottom view. connected TDA9885HN.
Fig.4 configuration HVQFN32.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
FUNCTIONAL DESCRIPTION
TDA9885; TDA9886
VIF-AGC detector
Figure shows simplified block diagram device which comprises following functional blocks: amplifier Tuner VIF-AGC VIF-AGC detector Frequency Phase-Locked Loop (FPLL) detector divider digital acquisition help Video demodulator amplifier Sound carrier trap amplifier SIF-AGC detector Single reference mixer demodulator demodulator acquisition help Audio amplifier mute time constant Internal voltage stabilizer I2C-bus transceiver (module address). amplifier
Gain control performed sync level detection (negative modulation) peak white detection (positive modulation). negative modulation, sync level voltage stored integrated capacitor means fast peak detector. This voltage compared with reference voltage (nominal sync level) comparator which charges discharges integrated capacitor generation required gain. time constants decreasing increasing gain nearly equal total reaction time fast cope with `aeroplane fluttering'. positive modulation, white peak level voltage compared with reference voltage (nominal white level) comparator which charges (fast) discharges (slow) external capacitor directly generation required gain. need very long time constant gain increase because peak white level appear only once field. order reduce this time constant, additional level detector increases discharging current capacitor (fast mode) event decreasing amplitude step controlled detected actual black level voltage. threshold level fast mode typically video amplitude. fast mode state also transferred SIF-AGC detector speed-up. case missing peak white pulses, gain increase limited typically comparing detected actual black level voltage with corresponding reference voltage. FPLL detector
amplifier consists three AC-coupled differential stages. Gain control performed emitter degeneration. total gain control range typically differential input impedance typically parallel with Tuner VIF-AGC
This block adapts voltages, generated VIF-AGC SIF-AGC detectors, internal signal processing amplifiers performs tuner control current generation. onset tuner control current generation either I2C-bus (see Table optionally potentiometer case that I2C-bus information cannot stored, related device). presence potentiometer automatically detected I2C-bus setting disabled. Furthermore, derived from detector voltage, comparator used test corresponding input voltage higher than This information read I2C-bus (bit VIFLEV
amplifier output signal into frequency detector into phase detector limiting amplifier removing video During acquisition frequency detector produces current proportional frequency difference between signals. After frequency lock-in phase detector produces current proportional phase difference between signals. currents from frequency phase detectors charged into loop filter which controls locks frequency phase carrier. positive modulated signal, charging currents gated composite sync order avoid signal distortion case overmodulation. gating depth switchable I2C-bus.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
divider
TDA9885; TDA9886
Video demodulator amplifier
VIF-FPLL operates integrated radiation relaxation oscillator double picture carrier frequency. control voltage, required tune double picture carrier frequency, generated loop filter frequency phase detector. possible frequency range (typical value). oscillator frequency divided-by-two provide differential square wave signals with exactly degrees phase difference, independent frequency, FPLL detectors, video demodulator intercarrier mixer. digital acquisition help
video demodulator realized multiplier which designed distortion large bandwidth. signal multiplied with phase' signal VIF-PLL VCO. demodulator output signal into video preamplifier level shift stage with integrated low-pass filter achieve carrier harmonics attenuation. output signal preamplifier VIF-AGC detector (see Section 8.3) sound trap mode also internally integrated sound carrier trap (see Section 8.8). differential trap output signal converted amplified following postamplifier. video output level CVBS (p-p). bypass mode output signal preamplifier directly through postamplifier CVBS. output video level (p-p) using external sound trap with overall loss. Noise clipping provided both cases. Sound carrier trap
Each relaxation oscillator VIF-PLL FM-PLL demodulator wide frequency range. prevent false locking PLLs with respect catching range, digital acquisition help provides individual control, until frequency within preselected standard dependent lock-in window PLL. in-window out-window control FM-PLL additionally used mute audio stage auto mute selected I2C-bus). working principle digital acquisition help follows. output connected down counter which predefined start value (standard dependent). frequency clocks down counter fixed gate time. Thereafter, down counter stop value analysed. case stop value higher (lower) than expected value range, frequency lower (higher) than wanted lock-in window frequency range. positive (negative) control current injected into loop filter consequently frequency increased (decreased) counting cycle starts. gate time well control logic acquisition help circuit dependent precision reference signal REF. Operation crystal oscillator possible well connecting this input serial capacitor external reference frequency, e.g. tuning system oscillator. signal derived from corresponding down counter stop value after counting cycle. last four bits latched read I2C-bus (see Table Also digital-to-analog converted value given current AFC.
sound carrier trap consists reference filter, phase detector sound trap itself. sound carrier reference signal into reference low-pass filter shifted nominal degrees. phase detector compares original reference signal with signal shifted reference filter produces voltage charging discharging integrated capacitor with current proportional phase difference between both signals, respectively frequency error integrated filters. voltage controls frequency position reference filter sound trap. accurate frequency position different standards sound carrier reference signal. sound trap itself constructed three separate traps realize sufficient suppression first second sound carriers. amplifier
amplifier consists three AC-coupled differential stages. Gain control performed emitter degeneration. total gain control range typically differential input impedance typically parallel with
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
8.10 SIF-AGC detector 8.12
TDA9885; TDA9886
demodulator
gain control performed detection component demodulator output signal. This signal corresponds directly voltage output amplifier that constant signal supplied demodulator single reference mixer. switching gain input amplifier SIF-AGC detector I2C-bus, internal level sound lower than sound. This adapt SIF-AGC characteristic VIF-AGC characteristic. adaption ideal picture-to-sound carrier ratio comparator, integrated capacitor charged discharged generation required gain. sound, reaction time slow closed loop). reducing this sound time constant event decreasing amplitude step, load current capacitor increased (fast mode) when VIF-AGC detector positive modulation mode) operates fast mode too. additional circuit (threshold approximately ensures very fast gain reduction large increasing amplitude step. 8.11 Single reference mixer
amplitude modulated amplifier output signal both two-stage limiting amplifier that removes linear multiplier. result multiplication signal with limiter output signal demodulation (passive synchronous demodulator). demodulator output signal low-pass filter that attenuates carrier harmonics input amplifier SIF-AGC detector audio amplifier. 8.13 demodulator acquisition help
narrow-band FM-PLL detector consists Gain controlled amplifier detector Narrow-band PLL. intercarrier signal from intercarrier mixer input AC-coupled gain controlled amplifier with stages. gain controlled output signal phase detector narrow-band FM-PLL demodulator). good selectivity robustness against disturbance caused video signal, high linearity gain controlled amplifier phase detector well constant signal level required. gain control done means phase' demodulator carrier (from output amplifier). demodulation output into comparator charging discharging integrated capacitor. This leads mean value loop control gain amplifier. demodulator realized narrow-band with external loop filter, which provides necessary selectivity (bandwidth approximately kHz). achieve good selectivity, linear phase detector constant input level required. gain controlled intercarrier signal from amplifier phase detector. phase detector controls loop filter integrated radiation relaxation oscillator. designed frequency range from MHz. within FM-PLL phase-locked incoming signal, which frequency modulated. well this, control voltage superimposed voltage. Therefore, tracks with signal. voltage present loop filter typically (RMS) deviation. This signal buffer audio amplifier. correct locking supported digital acquisition help circuit (see Section 8.6).
With present system high performance Hi-Fi stereo sound processing achieved. simplified application without filter, single reference mixer switched intercarrier mode I2C-bus. single reference mixer generates sound intercarrier signal. realized linear multiplier which multiplies amplifier output signal VIF-PLL signal degrees output) which locked picture carrier. this mixer operates quadrature mixer intercarrier mode provides suppression frequency video signals. mixer output signal internally high-pass low-pass combination demodulator well operational amplifier intercarrier output SIOMAD.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
8.14 Audio amplifier mute time constant 8.15
TDA9885; TDA9886
Internal voltage stabilizer
audio amplifier consists parts: preamplifier output amplifier. preamplifier used sound operational amplifier with internal feedback, high gain high common mode rejection. voltage from demodulator (RMS) frequency deviation amplified operating point control circuit (with external capacitor CAF), preamplifier decoupled from voltage. low-pass characteristic amplifier reduces harmonics sound intercarrier signal output terminal. sound switchable de-emphasis network (with external capacitor) implemented between preamplifier output amplifier. output amplifier provides required output level rail-to-rail output stage. preceding stage makes input selector switching between sound, sound mute state. gain switched between (normal) (reduced). Switching mute state controlled automatically, dependent digital acquisition help case FM-PLL required frequency window. This done time constant: fast switching mute state slow (typically switching no-mute state. switching functions controlled I2C-bus: sound, sound forced mute Auto mute enable disable De-emphasis with Audio gain normal reduced.
band circuit internally generates voltage approximately independent supply voltage temperature. voltage regulator circuit, connected this voltage, produces constant voltage 3.55 which used internal reference voltage. 8.16 I2C-bus transceiver module address
device controlled 2-wire I2C-bus microcontroller. wires carry serial data (SDA) serial clock (SCL) information between devices connected I2C-bus. device I2C-bus slave transceiver with auto-increment. circuit operates clock frequencies kHz. slave address sent from master slave receiver. avoid conflicts real application with other devices providing similar complementing functions, there four possible slave addresses available. These Module Addresses (MADs) selected connecting resistors SIOMAD and/or pins SIF1 SIF2 (see Fig.23). SIOMAD relates with pins SIF1 SIF2 relate with slave addresses this device given Table power-on preset value dependent SIOMAD chosen 45.75 NTSC default (pin SIOMAD left open-circuit) 58.75 NTSC (resistor SIOMAD). this device used without I2C-bus NTSC only device. Remark: case using device without I2C-bus, then rise time supply voltage after switching power must longer than
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
Table Slave address detection SELECTABLE ADDRESS SLAVE ADDRESS MAD1 MAD2 MAD3 MAD4 I2C-BUS CONTROL Read format I2C-bus read format (slave transmits data) BYTE slave address Table Explanation Table FUNCTION START condition, generated master Table read command, generated master acknowledge bit, generated slave 8-bit data word, transmitted slave (see Table acknowledge-not bit, generated master STOP condition, generated master
TDA9885; TDA9886
RESISTOR SIF1 SIF2 SIOMAD
Table
BYTE data
SYMBOL Slave address Data
master generates acknowledge when received dataword READ. master next generates acknowledge, then slave begins transmitting dataword READ, until master generates acknowledge-not transmits STOP condition.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
9.1.1 SLAVE ADDRESS
TDA9885; TDA9886
first module address MAD1 standard address (see Table Table Slave addresses; notes
SLAVE ADDRESS NAME MAD1 MAD2 MAD3 MAD4 Notes activation external resistor: Table Fig.23. applications without I2C-bus: Tables 9.1.2 Table AFCWIN Table AFCWIN VIFLEV CARRDET AFC[4:1] PONR Note VIFLEV CARRDET AFC4 AFC3 DATA BYTE Data read register (status register) VALUE (HEX)
AFC2 AFC1 PONR
Description status register bits VALUE window ±1.6 window; note ±1.6 window input level high level; input voltage (typically) level carrier detection detection detection Automatic frequency control Table Power-on reset after Power-on reset after supply breakdown after successful reading status register DESCRIPTION
input applied, then AFCWIN fact that forced window border fast lock-in behaviour.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
Table Automatic frequency control bits; note AFC4 Note nominal frequency fVIF. Write format I2C-bus write format (slave receives data); note BYTE slave address Note auto-increment subaddress stops subaddress Table Explanation Table SYMBOL Slave address Subaddress (SAD) Data data Table write command, generated master acknowledge bit, generated slave Table FUNCTION START condition, generated master BYTE subaddress BYTE bits data AFC3 AFC2 AFC1
TDA9885; TDA9886
fVIF 187.5 kHz) 162.5 137.5 112.5 87.5 62.5 37.5 12.5 12.5 37.5 62.5 87.5 112.5 137.5 162.5 187.5 kHz)
Table
BYTE bits data
8-bit data words, transmitted master (see Tables STOP condition
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
9.2.1 SUBADDRESS
TDA9885; TDA9886
more than data byte transmitted, then auto-increment performed: starting from transmitted subaddress auto-increment subaddress accordance with order Table Table Definition subaddress (second byte after slave address); note REGISTER switching mode adjust mode data mode Notes don't care. allowed. Bits will ignored internal hardware. 9.2.2 DATA BYTE SWITCHING MODE A7(2) A6(3) A5(3) A4(3) A3(3) A2(3)
Table description register switching mode (SAD VALUE high-impedance, disabled HIGH low-impedance, active Output port switching external input high-impedance, disabled HIGH low-impedance, active Forced audio mute standard modulation positive note used negative used Carrier mode mode intercarrier mode Auto mute output active inactive DESCRIPTION Output port switching monitoring
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
Note positive choose second SIF. 9.2.3 DATA BYTE ADJUST MODE VALUE Video mode (sound trap) sound trap bypass sound trap active DESCRIPTION
TDA9885; TDA9886
Table description register adjust mode (SAD VALUE Audio gain De-emphasis time constant De-emphasis Tuner takeover point adjustment Table DESCRIPTION
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
Table Tuner takeover point adjustment bits
TDA9885; TDA9886
ADJUSTMENT (dB) Note equal (RMS). 0(1)
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
9.2.4 DATA BYTE DATA MODE
TDA9885; TDA9886
Table description register data mode (SAD Note positive modulation choose MHz. Table Options extended mode; register FUNCTION Gain Note corresponding port function disabled (set `high-impedance'); Table Chapter Table Characteristics, note port function port function normal gain port function port function minimum gain port function VIF-AGC output(1) normal gain VIF-AGC external input(1) port function external gain VALUE VIF-AGC port features dependent Table standard gating gating case positive modulation gating case positive modulation VIF, tuner minimum gain dependent Table Vision intermediate frequency selection Table Sound intercarrier frequency selection (sound MHz; note DESCRIPTION
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
Table standard selection VIDEO SELECT BITS Note
TDA9885; TDA9886
fVIF (MHz) 58.75(1) 45.75(1) 38.9 38.0 33.9 33.4 applicable applicable
SIOMAD used selection different NTSC standards without I2C-bus. With resistor SIOMAD, fVIF 58.75 MHz; without resistor SIOMAD, fVIF 45.75 (NTSC-M). Table Data setting after power-on reset (default setting with resistor SIOMAD) REGISTER Switching mode Adjust mode Data mode
Table Data setting after power-on reset (default setting without resistor SIOMAD) REGISTER Switching mode Adjust mode Data mode
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
LIMITING VALUES accordance with Absolute Maximum Rating System (IEC 60134). SYMBOL supply voltage voltage pins VIF1, VIF2, SIF1, SIF2, OP1, OP2, FMPLL TAGC Tstg Tamb short-circuit time ground storage temperature ambient temperature TDA9885T (SO24), TDA9885TS (SSOP24), TDA9886T (SO24) TDA9886TS (SSOP24) TDA9885HN (HVQFN32) TDA9886HN (HVQFN32) electrostatic discharge voltage pins note note Notes PARAMETER
TDA9885; TDA9886
CONDITIONS
MIN.
MAX. +150 +400 +3500
UNIT
-400 -4000
Machine model accordance with SNW-FQ-302B: class discharging capacitor 0.75 series inductance. Human body model accordance with SNW-FQ-302A: class discharging capacitor series resistor. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) TDA9885T (SO24) TDA9885TS (SSOP24) TDA9885HN (HVQFN32) TDA9886T (SO24) TDA9886TS (SSOP24) TDA9886HN (HVQFN32) PARAMETER thermal resistance from junction ambient CONDITIONS free VALUE UNIT
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
CHARACTERISTICS Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "CCIR line line 330" "NTC-7 Composite" measurements taken test circuit Fig.23; unless otherwise specified. SYMBOL Supply (pin Ptot POWER-ON RESET VP(start) VP(stop) supply voltage start reset supply voltage reset decreasing supply voltage increasing supply voltage; I2C-bus transmission enable applications without I2C-bus video output video output note within range; Fig.7 supply voltage supply current total power dissipation note PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
time constant network input voltage sensitivity (RMS value) maximum input voltage (RMS value) overload input voltage (RMS value) internal amplitude difference between picture sound carrier gain control range lower limit bandwidth upper limit bandwidth differential input resistance differential input capacitance input voltage
amplifier (pins VIF1 VIF2) Vi(VIF)(rms) Vi(max)(rms) Vi(ovl)(rms) VIF(int)
GVIF(cr) BVIF(-3dB)(ll) BVIF(-3dB)(ul) Ri(dif) Ci(dif) fVCO(max) fVIF
1.93
note note
FPLL true synchronous video demodulator; note maximum oscillator frequency carrier regeneration vision carrier operating frequencies 2fPC Table 2003 33.4 33.9 38.0 38.9 45.75 58.75
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL fVIF tacq Vi(lock)(rms) PARAMETER frequency window digital acquisition help acquisition time input voltage sensitivity locked (RMS value) cycle time digital acquisition help steepness phase detector steepness definition: fVIF/VVPLL definition: IVPLL/VIF CONDITIONS related fVIF; Fig.10 kHz; note MIN.
TDA9885; TDA9886
TYP. ±2.3
MAX.
UNIT
measured pins VIF1 VIF2; maximum gain
Tcy(DAH) KO(VIF) KD(VIF)
MHz/V µA/rad
Video output (pin CVBS) NORMAL MODE (SOUND CARRIER TRAP ACTIVE) SOUND CARRIER Vo(v)(p-p) Vsync Vclip(u) Vclip(l) Ibias(int) Io(sink)(max) Io(source)(max) Vo(CVBS) Vo(bl) Vo(bl)(v) video output voltage (peak-to-peak value) video output voltage difference ratio between video (black-to-white) sync level sync voltage level upper video clipping voltage level lower video clipping voltage level output resistance internal bias current emitter-follower maximum output sink current maximum output source current deviation CVBS output voltage black level tilt vertical black level tilt worst case standard differential gain gain control gain control negative modulation vision carrier modulated test line (VITS) only note Fig.5 difference between standard 1.90 2.33 3.00
Gdif
"CCIR 330"; note
standard standard
S/NW
differential phase weighted signal-to-noise ratio
"CCIR 330"
weighted accordance with "CCIR 567"; Fig.11; note
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL S/NUW IM(blue) PARAMETER intermodulation attenuation `blue' CONDITIONS Fig.12; note IM(yellow) intermodulation attenuation `yellow' Fig.12; note Vr(PC)(rms) funw(p-p) residual picture carrier (RMS value) robustness unwanted frequency deviation picture carrier (peak-to-peak value) robustness modulator imbalance fundamental wave harmonics residual carrier; serration pulses; standard; note residual carrier; serration pulses; standard; L-gating note load; note note MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
unweighted signal-to-noise ratio note
spur PSRRCVBS
suppression video signal harmonics suppression spurious elements power supply ripple rejection CVBS
fripple video signal; grey level; positive negative modulation; Fig.6
STANDARD INCLUDING KOREA; Bv(-3dB)(trap) SC1(60kHz) SC2(60kHz) td(g)(cc) video bandwidth including sound carrier trap attenuation first sound carrier fSC1 attenuation second sound carrier attenuation second sound carrier fSC2 group delay colour carrier frequency video bandwidth including sound carrier trap attenuation first sound carrier fSC1 attenuation second sound carrier ftrap MHz; note 3.95 4.05
attenuation first sound carrier 4.724 4.724 3.58 MHz; Fig.14
STANDARD; Fig.15 Bv(-3dB)(trap) SC1(60kHz) ftrap MHz; note 4.90 5.00
attenuation first sound carrier 5.742
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL SC2(60kHz) td(g)(cc) PARAMETER attenuation second sound carrier fSC2 group delay colour carrier frequency video bandwidth including sound carrier trap attenuation first sound carrier fSC1 attenuation second sound carrier attenuation second sound carrier fSC2 group delay colour carrier frequency video bandwidth including sound carrier trap attenuation first sound carrier fSC1 attenuation second sound carrier attenuation second sound carrier fSC2 group delay colour carrier frequency CONDITIONS 5.742 4.43 MHz; Fig.16 MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
STANDARD; Fig.17 Bv(-3dB)(trap) SC1(60kHz) SC2(60kHz) td(g)(cc) ftrap MHz; note 5.40 5.50
attenuation first sound carrier 6.55 6.55 4.43
STANDARD; Fig.18 Bv(-3dB)(trap) SC1(60kHz) SC2(60kHz) td(g)(cc) ftrap MHz; note 5.50 5.95
attenuation first sound carrier 6.742 6.742 4.28
Video output (pin CVBS) TRAP BYPASS MODE SOUND CARRIER OFF; note Vo(v)(p-p) Vsync Vclip(u) Vclip(l) Bv(-1dB) Bv(-3dB) video output voltage (peak-to-peak value) sync voltage level upper video clipping voltage level lower video clipping voltage level video bandwidth video bandwidth load load Fig.5 0.95 1.35 1.10 1.25
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL S/NW PARAMETER weighted signal-to-noise ratio CONDITIONS MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
weighted accordance with "CCIR 567"; Fig.11; note
S/NUW VIF-AGC; note tresp(inc)
unweighted signal-to-noise ratio note
response time increasing step
negative modulation; note positive modulation; note
ms/dB ms/dB dB/V
tresp(dec)
response time decreasing step
negative modulation; note positive modulation; note standard; fast mode standard; normal mode; note
Vi(VIF) VVAGC CRstps
amplitude step activating standard fast mode gain control voltage range control steepness Fig.7 definition: GVIF/VVAGC; VVAGC Tables
Vth(VIF) VAGC Ich(max) Ich(add)
threshold voltage high level input
maximum charge current additional charge current
standard
standard: event missing VITS pulses white video content standard; normal mode standard; fast mode
Idch
discharge current
Tuner (pin TAGC); Figs Vi(VIF)(start1)(rms) input signal voltage minimum starting point tuner takeover pins VIF1 VIF2 (RMS value) input signal voltage maximum starting point tuner takeover pins VIF1 VIF2 (RMS value) ITAGC RTOP RTOP I2C-bus (see Table ITAGC RTOP RTOP I2C-bus (see Table
Vi(VIF)(start2)(rms)
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL QVTOP PARAMETER tuner takeover point accuracy CONDITIONS ITAGC RTOP RTOP I2C-bus (see Table ITAGC from external source ITAGC MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
QVTOP/T Vsat Isink
takeover point variation with temperature permissible output voltage saturation voltage sink current
0.03
0.07 0.75
dB/K
tuner gain reduction; VTAGC maximum tuner gain reduction; VTAGC
slip automatic gain control tuner gain current from
circuit (pin AFC); Fig.10; notes Vsat(ul) Vsat(ll) Io(source) Io(sink) AFCstps QfVIF(a) QfVIF(d) upper limit saturation voltage lower limit saturation voltage output source current output sink current control steepness analog accuracy circuit digital accuracy circuit I2C-bus definition: IAFC/fVIF IAFC fREF IAFC fREF MHz; digit mode; intercarrier output SIOMAD mode; output Vi(max)(rms) maximum input voltage (RMS value) mode; intercarrier output SIOMAD mode; output Vi(ovl)(rms) GSIF(cr) BSIF(-3dB)(ll) BSIF(-3dB)(ul) Ri(dif) Ci(dif) overload input voltage (RMS value) gain control range lower limit bandwidth upper limit bandwidth differential input resistance differential input capacitance input voltage note note note mode; Fig.9 0.85 digit 1.05 1.25 µA/kHz
digit
amplifier (pins SIF1 SIF2) Vi(SIF)(rms) input voltage sensitivity (RMS value)
1.93
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL SIF-AGC detector tresp response time increasing decreasing step fast step increasing decreasing slow step increasing decreasing Single reference intercarrier mixer (pin SIOMAD) Vo(intc)(rms) intercarrier output level (RMS value) mode; SC1; standard; without modulation intercarrier mode; PC/SC1 off; note Bintc(-3dB)(ul) Vr(SC)(rms) upper limit intercarrier bandwidth residual sound carrier (RMS value) fundamental wave harmonics mode intercarrier mode Vr(PC)(rms) residual picture carrier (RMS value) fundamental wave harmonics mode intercarrier mode Ibias(int) Io(sink)(max) Io(source)(max) Io(source) suppression video signal harmonics output resistance output voltage internal bias current emitter follower maximum output sink current maximum output source current output source current MAD2 activated; note intercarrier mode; fvideo note 0.90 0.75 PARAMETER CONDITIONS MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
1.15 0.93
1.20
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL PARAMETER CONDITIONS MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
FM-PLL demodulator; notes SOUND INTERCARRIER OUTPUT (PIN SIOMAD) VFM(rms) intercarrier level gain controlled operation FM-PLL (RMS value) intercarrier level lock-in (RMS value) intercarrier level carrier detect (RMS value) sound intercarrier operating frequencies Table Table corresponding PC/SC ratio input pins VIF1 VIF2
VFM(lock)(rms) VFM(det)(rms)
AUDIO OUTPUT (PIN AUD) Vo(AF)(rms) output voltage (RMS value) deviation; de-emphasis deviation; de-emphasis Vo(AF)(cl)(rms) Vo(AF)/T output clipping level (RMS value) output voltage variation with temperature total harmonic distortion frequency deviation note output I2C-bus; note BAF(-3dB) bandwidth
10-3 10-3 dB/K 0.15 0.50 ±110
without de-emphasis; measured with FM-PLL filter Fig.23
S/NW(AF)
weighted signal-to-noise ratio FM-PLL only; audio signal deviation; de-emphasis black picture; Fig.19
Vr(SC)(rms)
residual sound carrier (RMS value) suppression demodulator
fundamental wave harmonics; without de-emphasis referenced deviation; de-emphasis; kHz; fripple Fig.6
AM(sup)
PSRRFM
power supply ripple rejection
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL PARAMETER CONDITIONS MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
FM-PLL FILTER (PIN FMPLL) Vloop Io(source)(PD)(max) Io(sink)(PD)(max) Io(source)(DAH) Io(sink)(DAH) tW(DAH) Tcy(DAH) KO(FM) KD(FM) Audio amplifier DE-EMPHASIS NETWORK (PIN DEEM) output resistance de-emphasis; Table de-emphasis; Table VAF(rms) Vdec Ich(max) Idch(max) VO(AUD) RL(DC) BAF(-3dB)(ul) BAF(-3dB)(ll) mute 2003 audio signal (RMS value) output voltage VAUD dependent intercarrier frequency VO(AUD) 1.15 1.15 AC-coupled note I2C-bus 2.37 1.50 1.50 2.37 1.85 1.85 loop voltage maximum phase detector output source current maximum phase detector output sink current output source current digital acquisition help output sink current digital acquisition help pulse width digital acquisition help current cycle time digital acquisition help steepness phase detector steepness definition: fFM/VFMPLL definition: IFMPLL/FM MHz/V µA/rad
DECOUPLING (PIN AFD) decoupling voltage leakage current maximum charge current maximum discharge current
AUDIO OUTPUT (PIN AUD) output resistance output voltage load resistance load resistance load capacitance upper limit bandwidth audio amplifier lower limit bandwidth audio amplifier mute attenuation signal note
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL Vjump PARAMETER jump voltage switching output mute state vice versa CONDITIONS activated digital acquisition help I2C-bus mute MIN.
TDA9885; TDA9886
TYP.
MAX. ±150
UNIT
operation; notes INTERCARRIER PERFORMANCE; note S/NW weighted signal-to-noise ratio PC/SC ratio pins VIF1 VIF2 black picture white picture sine wave (black-to-white modulation) sound carrier subharmonics; 2.75 SINGLE REFERENCE PERFORMANCE; notes S/NW(SC1) weighted signal-to-noise ratio PC/SC1 ratio pins VIF1 VIF2; deviation); "CCIR 468" black picture white picture sine wave (black-to-white modulation)
square wave (black-to-white modulation) sound carrier subharmonics; 2.75 sound carrier subharmonics; 2.87
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL S/NW(SC2) PARAMETER weighted signal-to-noise ratio CONDITIONS PC/SC2 ratio pins VIF1 VIF2; deviation); "CCIR 468" black picture white picture sine wave (black-to-white modulation) MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
square wave (black-to-white modulation) sound carrier subharmonics; 2.75 sound carrier subharmonics; 2.87 operation STANDARD (PIN AUD); Figs note Vo(AF)(rms) BAF(-3dB) S/NW(AF) VO(AUD) PSRRAM Rxtal fref fref Vref(rms) Ro(ref) output voltage (RMS value) total harmonic distortion bandwidth weighted signal-to-noise ratio accordance with audio signal "CCIR 468" potential voltage power supply ripple rejection Fig.6 modulation modulation
2.37
±0.1
Reference frequency input (pin REF) input voltage input resistance resonance resistance crystal pull-up/down capacitance reference signal frequency tolerance reference signal frequency reference signal voltage (RMS value) output resistance reference signal source decoupling capacitance operation input external reference signal source terminal note operation crystal oscillator note note note operation input terminal
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SYMBOL PARAMETER CONDITIONS MIN.
TDA9885; TDA9886
TYP.
MAX.
UNIT
I2C-bus transceiver (pins SCL); notes fSCL Io(sink) Io(source) Io(sink) Io(sink/source)(max) Notes Values video sound parameters decreased Level headroom input level jumps during gain control setting. This parameter tested during production only given application information designing receiver circuit. Loop bandwidth (damping factor 1.9; calculated with sync level within gain control range). Calculation VIF-PLL filter done following formula: -3dB valid where: steepness phase detector steepness loop resistor; loop capacitor; BL-3dB loop bandwidth damping factor. Vi(VIF) (RMS); (VCO frequency offset related picture carrier frequency); white picture video modulation. Condition: luminance range steps) from ratio black-to-white amplitude black level noise voltage (RMS value CVBS). (B/G, standard). Noise analyzer setting: high-pass SC-trap switched intermodulation figures defined for: (referenced black white signal) (referenced colour carrier) 2003 clock frequency HIGH-level input voltage LOW-level input voltage HIGH-level input current LOW-level input current LOW-level output voltage output sink current output source current (sink current) -0.3 functions VIF-AGC output +1.5
Output ports (pins OP2); note LOW-level output voltage HIGH-level output voltage output sink current maximum output sink source current
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
Measurements taken with filter M1963M (sound shelf: dB); loop bandwidth kHz. Modulation Vestigial Side-Band (VSB); sound carrier off; fvideo MHz. Sound carrier fvideo MHz. load; sound carrier frequencies (depending standard) attenuated integrated sound carrier traps (see Figs absolute value transfer function). sound carrier trap bypassed switching I2C-bus. this full composite video spectrum appears CVBS. amplitude (p-p). selected I2C-bus, VIF-AGC voltage monitored OP2, used input. this case, both pins cannot used normal port function. response time valid input level range from match output signal different tuning systems current source output provided. test circuit given Fig.10. slope (voltage frequency) changed resistors tolerance reference frequency determines accuracy VIF-AFC, demodulator centre frequency maximum deviation. intercarrier output signal SIOMAD calculated following formula taking into account internal video signal with (p-p) reference: o(intc)(rms) i(SC) i(PC) where: correction term value, sound-to-picture carrier ratio pins VIF1 VIF2 correction term internal circuitry tolerance video output intercarrier output Vo(intc)(rms). normal operation (with I2C-bus) load SIOMAD allowed. second module address (MAD2) will activated application resistor between SIOMAD ground. this MAD2 activated, also power-on set-up state activates frequency 58.75 MHz. input level (RMS); input level (RMS) unmodulated. Measured with deviation typical output voltage (RMS). output signal attenuated (RMS) I2C-bus. handling frequency deviation more than kHz, output signal reduced order avoid clipping (THD lower limit audio bandwidth depends value capacitor AFD. value leads fAF(-3dB) leads fAF(-3dB) measurements modulator meet following specifications: Incidental phase modulation black-to-white jump less than degrees. performance, measured with television demodulator AMF2 (audio output, weighted ratio) better than deviation kHz) sine wave black-to-white video modulation. Picture-to-sound carrier ratio PC/SC1 (transmitter).
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
Calculation loop filter parameters done approximately using following formulae: -3dB 1.55 formulae only valid under following conditions: where: steepness phase detector steepness loop resistor; series capacitor; parallel capacitor; natural frequency PLL; BL-3dB loop bandwidth damping factor. examples, Table PC/SC ratio calculated addition transmitter PC/SC1 ratio filter PC/SC1 ratio. This PC/SC ratio necessary achieve S/NW values noted. different PC/SC ratio will change these values. Measurements taken with filter G1984 (Siemens) vision sound (sound shelf: dB). Picture-to-sound carrier ratio transmitter PC/SC Input level pins VIF1 VIF2 Vi(SIF) (RMS) sync level, deviation sound carrier, Measurements accordance with "CCIR 468". De-emphasis signal output SIOMAD analysed test demodulator TDA9820. ratio this device more than related deviation kHz, accordance with "CCIR 468". Measurements taken with filter K3953 vision (suppressed sound carrier) K9453 sound (suppressed picture carrier). Input level Vi(SIF) (RMS), deviation). Measurements taken with filter K9453 (Siemens) sound (suppressed picture carrier). value determines accuracy resonance frequency crystal. depends type crystal used. able operate 1-pin crystal oscillator input well external reference signal input, e.g. from tuning system. lines will pulled down switched off. characteristics accordance with I2C-bus specification fast mode (maximum clock frequency kHz). Information about I2C-bus found brochure "The I2C-bus (order number 9398 40011). Port port open-collector outputs.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
Table Examples note (FM-PLL filter) BL-3dB (kHz) (nF) (pF)
TDA9885; TDA9886
Table Input frequencies carrier ratios DESCRIPTION carrier carrier Picture-to-sound carrier ratio SYMBOL fSC1 fSC2 STANDARD 38.9 33.4 33.158 STANDARD 45.75 58.75 41.25 54.25 STANDARD 38.9 32.4 ACCENT STANDARD 33.9 40.4 UNIT
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, full pagewidth
trap bypass mode normal mode 2.72 3.41 3.20 zero carrier level white level
1.83
1.80
black level
1.20
sync level
MHC115
Fig.5 Typical video signal levels output CVBS (sound carrier off).
handbook, full pagewidth
TDA9885 TDA9886
fripple
MHC114
Fig.6 Ripple rejection condition.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
MHC116
handbook, full pagewidth
VVAGC
TAGC (µA)
Vi(VIF) (dBµV) VVAGC VIF-AGC voltage only measured controlled I2C-bus (see Table 15). ITAGC tuner current mode with RTOP setting I2C-bus ITAGC tuner current mode with RTOP setting I2C-bus ITAGC tuner current mode with RTOP setting I2C-bus
Fig.7 Typical tuner characteristic.
handbook, halfpage
MHB159
MHC117
Vi(VIF) (dBµV)
handbook, halfpage
VSAGC
RTOP
Vi(SIF) (dBµV)
mode. mode.
Fig.8
Typical tuner takeover point function resistor RTOP.
Fig.9 Typical SIF-AGC characteristic.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, full pagewidth
lock range without filter window VAFC -100 +100 +200 38.9 38.71 39.09 (MHz)
MHC113
IAFC (µA) -200
TDA9885 TDA9886 (23)
IAFC
VAFC
numbers TDA9885HN TDA9886HN parenthesis.
Fig.10 Typical analog characteristic.
MHC112
handbook, halfpage
handbook, halfpage
13.2
(dB)
13.2
BLUE
YELLOW
MHA739
Vi(VIF) (dBµV)
sound carrier, with respect sync level. chrominance carrier, with respect sync level. picture carrier, with respect sync level. sound carrier levels take into account sound shelf attenuation (SAW filter G1984M).
Fig.11 Typical signal-to-noise ratio function input voltage.
Fig.12 Input signal conditions.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
MHC122
handbook, full pagewidth
(dB)
minimum requirements
(MHz)
Fig.13 Typical amplitude response sound trap standard (including Korea).
handbook, full pagewidth
group delay (ns)
MHB167
ideal characteristic pre-correction transmitter
minimum requirements
-100
(MHz)
Overall delay shown, here maximum ripple specified.
Fig.14 Typical group delay sound trap standard.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, full pagewidth
(dB)
MHB168
minimum requirements
(MHz)
Fig.15 Typical amplitude response sound trap standard.
handbook, full pagewidth
group delay (ns)
MHB169
ideal characteristic pre-correction transmitter
minimum requirements
-100
(MHz)
Overall delay shown, here maximum ripple specified.
Fig.16 Typical group delay sound trap standard.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
MHC123
handbook, full pagewidth
(dB)
minimum requirements
(MHz)
Fig.17 Typical amplitude response sound trap standard.
MHB171
handbook, full pagewidth
(dB)
minimum requirements
(MHz)
Fig.18 Typical amplitude response sound trap standard.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, full pagewidth
MHC118
S/NW
(dB)
PC/SC ratio gain controlled operation FM-PLL
Signal. Noise H-picture (CCIR weighted quasi peak). Noise black picture (CCIR weighted quasi peak).
Conditions: PC/SC ratio measured pins VIF1 VIF2; transformer; deviation; de-emphasis.
Fig.19 Audio signal-to-noise ratio function picture-to-sound carrier ratio intercarrier mode.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, full pagewidth
MHC119
S/NW
(dB)
(dBµV)
Signal. Noise.
Condition:
Fig.20 Typical audio signal-to-noise ratio function input signal standard.
handbook, full pagewidth
MHC120
(kHz)
CAGC
Fig.21 Typical total harmonic distortion function audio frequency standard.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, full pagewidth
MHC121
signals value video (p-p)
antenna input (dBµV)
insertion loss
10-1
slip tuning gain control range
10-2 (TOP)
10-3 0.66 10-3
insertion loss gain 10-4
10-5 0.66 10-5
VHF/UHF tuner tuner filter amplifier, demodulator video TDA9885, TDA9886
Depends TOP.
Fig.22 Front-end level diagram.
2003
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2003
TEST APPLICATION INFORMATION
Philips Semiconductors
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
input
output
VIF-PLL filter
CVBS output
external reference
tuner output
(22)
AGND (20) CVBS (18) VAGC (16) TAGC (15) n.c.
SIF2 (27)
SIF1 (26)
(24)
(23)
VPLL (21)
TDA9885 TDA9886
(30) VIF1 input (31) VIF2 FMPLL DEEM DGND (10)
(11) SIOMAD
select
FM-PLL filter
audio output
intercarrier output
MHC124
TDA9885; TDA9886
numbers TDA9885HN TDA9886HN parenthesis. Optional I2C-bus address selection. Option used used 1000 (R/W) 1001 (R/W) 1000 (R/W) 1001 (R/W)
Product specification
Different loop filter comparison with application circuit different input characteristics (SAW filter transformer). connected TDA9885.
Fig.23 Test circuit.
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book, full pagewidth
2003
BC847C BA277 BA277 BA277 FILTER K9456 SIF2 (27) SIF1 (26) (24) (23) (22) (30) VIF1 input (31) VIF2 FMPLL
Philips Semiconductors
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
CVBS output
fref
tuner
BC847
AGND (20) CVBS (18) VAGC
(16)
VPLL (21)
TAGC (15)
n.c.
TDA9885 TDA9886
DGND FILTER K3953 output positive supply 2C-bus controller (10)
(11) SIOMAD
DEEM
2C-bus
intercarrier output
TDA9885; TDA9886
MHC125
Product specification
numbers TDA9885HN TDA9886HN parenthesis. outputs VIF-AGC voltage, then used switching. connected TDA9885. Optional measures improve performance within TV-set application.
Fig.24 Application circuit.
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
PACKAGE OUTLINES SO24: plastic small outline package; leads; body width
TDA9885; TDA9886
SOT137-1
index detail
scale
DIMENSIONS (inch dimensions derived from original dimensions) UNIT inches max. 2.65 2.45 2.25 0.25 0.01 0.49 0.36 0.32 0.23 15.6 15.2 0.61 0.60 0.30 0.29 1.27 0.05 10.65 10.00 0.043 0.039 0.25 0.01 0.25 0.01 0.004
0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
Note Plastic metal protrusions 0.15 (0.006 inch) maximum side included. OUTLINE VERSION SOT137-1 REFERENCES 075E05 JEDEC MS-013 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
SSOP24: plastic shrink small outline package; leads; body width
SOT340-1
index detail
scale
DIMENSIONS original dimensions) UNIT max. 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 0.65 1.25 1.03 0.63 0.13
Note Plastic metal protrusions maximum side included. OUTLINE VERSION SOT340-1 REFERENCES JEDEC MO-150 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
TDA9885; TDA9886
HVQFN32: plastic thermal enhanced very thin quad flat package; leads; terminals; body 0.85
SOT617-3
terminal index area
detail
terminal index area DIMENSIONS original dimensions) UNIT A(1) max. 0.05 0.00 0.30 0.18 3.75 3.45 3.75 3.45
scale
0.05
0.05
Note Plastic metal protrusions 0.075 maximum side included. OUTLINE VERSION SOT617-3 REFERENCES -JEDEC MO-220 JEITA -EUROPEAN PROJECTION ISSUE DATE 02-04-18 02-10-22
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
SOLDERING 15.1 Introduction soldering surface mount packages
TDA9885; TDA9886
overcome these problems double-wave soldering method specifically developed. wave soldering used following conditions must observed optimal results: double-wave soldering method comprising turbulent wave with high upward pressure followed smooth laminar wave. packages with leads sides pitch (e): larger than equal 1.27 footprint longitudinal axis preferred parallel transport direction printed-circuit board; smaller than 1.27 footprint longitudinal axis must parallel transport direction printed-circuit board. footprint must incorporate solder thieves downstream end. packages with leads four sides, footprint must placed angle transport direction printed-circuit board. footprint must incorporate solder thieves downstream side corners. During placement before soldering, package must fixed with droplet adhesive. adhesive applied screen printing, transfer syringe dispensing. package soldered after adhesive cured. Typical dwell time leads wave ranges from seconds depending solder material applied, SnPb Pb-free respectively. mildly-activated flux will eliminate need removal corrosive residues most applications. 15.4 Manual soldering
This text gives very brief insight complex technology. more in-depth account soldering found "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 90011). There soldering method that ideal surface mount packages. Wave soldering still used certain surface mount ICs, suitable fine pitch SMDs. these situations reflow soldering recommended. 15.2 Reflow soldering
Reflow soldering requires solder paste suspension fine solder particles, flux binding agent) applied printed-circuit board screen printing, stencilling pressure-syringe dispensing before package placement. Driven legislation environmental forces worldwide lead-free solder pastes increasing. Several methods exist reflowing; example, convection convection/infrared heating conveyor type oven. Throughput times (preheating, soldering cooling) vary between seconds depending heating method. Typical reflow peak temperatures range from depending solder paste material. top-surface temperature packages should preferably kept: below (SnPb process) below (Pb-free process) SSOP-T packages packages with thickness packages with thickness volume called thick/large packages. below (SnPb process) below (Pb-free process) packages with thickness volume called small/thin packages. Moisture sensitivity precautions, indicated packing, must respected times. 15.3 Wave soldering
component first soldering diagonally-opposite leads. voltage less) soldering iron applied flat part lead. Contact time must limited seconds When using dedicated tool, other leads soldered operation within seconds between
Conventional single wave soldering recommended surface mount devices (SMDs) printed-circuit boards with high component density, solder bridging non-wetting present major problems.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
15.5
TDA9885; TDA9886
Suitability surface mount packages wave reflow soldering methods PACKAGE(1) SOLDERING METHOD WAVE REFLOW(2) suitable suitable suitable suitable suitable suitable
BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, PLCC(5), LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP PMFP(8) Notes
suitable suitable(4)
suitable recommended(5)(6) recommended(7)
suitable
more detailed information packages refer "(LF)BGA Application Note" (AN01026); order copy from your Philips Semiconductors sales office. surface mount (SMD) packages moisture sensitive. Depending upon moisture content, maximum temperature (with respect time) body size package, there risk that internal external package cracks occur vaporization moisture them (the called popcorn effect). details, refer Drypack information "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". These transparent plastic packages extremely sensitive reflow soldering conditions must account processed through more than soldering cycle subjected infrared reflow soldering with peak temperature exceeding measured atmosphere reflow oven. package body peak temperature must kept possible. These packages suitable wave soldering. versions with heatsink bottom side, solder cannot penetrate between printed-circuit board heatsink. versions with heatsink side, solder might deposited heatsink surface. wave soldering considered, then package must placed angle solder wave direction. package footprint must incorporate solder thieves downstream side corners. Wave soldering suitable LQFP, TQFP packages with pitch larger than definitely suitable packages with pitch equal smaller than 0.65 Wave soldering suitable SSOP, TSSOP, VSSOP packages with pitch equal larger than 0.65 definitely suitable packages with pitch equal smaller than manual soldering suitable PMFP packages.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development
TDA9885; TDA9886
DEFINITION This data sheet contains data from objective specification product development. Philips Semiconductors reserves right change specification manner without notice. This data sheet contains data from preliminary specification. Supplementary data will published later date. Philips Semiconductors reserves right change specification without notice, order improve design supply best possible product. This data sheet contains data from product specification. Philips Semiconductors reserves right make changes time order improve design, manufacturing supply. Relevant changes will communicated Customer Product/Process Change Notification (CPCN).
Preliminary data Qualification
Product data
Production
Notes Please consult most recently issued data sheet before initiating completing design. product status device(s) described this data sheet have changed since this data sheet published. latest information available Internet data sheets describing multiple type numbers, highest-level product status determines data sheet status. DEFINITIONS Short-form specification data short-form specification extracted from full data sheet with same type number title. detailed information relevant data sheet data handbook. Limiting values definition Limiting values given accordance with Absolute Maximum Rating System (IEC 60134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Applications that described herein these products illustrative purposes only. Philips Semiconductors make representation warranty that such applications will suitable specified without further testing modification. DISCLAIMERS Life support applications These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips Semiconductors customers using selling these products such applications their risk agree fully indemnify Philips Semiconductors damages resulting from such application. Right make changes Philips Semiconductors reserves right make changes products including circuits, standard cells, and/or software described contained herein order improve design and/or performance. When product full production (status `Production'), relevant changes will communicated Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes responsibility liability these products, conveys licence title under patent, copyright, mask work right these products, makes representations warranties that these products free from patent, copyright, mask work right infringement, unless otherwise specified.
2003
Philips Semiconductors
Product specification
I2C-bus controlled single multistandard alignment-free IF-PLL demodulators
PURCHASE PHILIPS COMPONENTS
TDA9885; TDA9886
Purchase Philips components conveys license under Philips' patent components system provided system conforms specification defined Philips. This specification ordered using code 9398 40011.
2003
Philips Semiconductors worldwide company
Contact information additional information please visit Fax: 24825 sales offices addresses send e-mail
Koninklijke Philips Electronics N.V. 2003
SCA75
rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent- other industrial intellectual property rights.
Printed Netherlands
753504/02/pp56
Date release: 2003
Document order number:
9397 11443
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