TDA9884
|
|
|
Top Searches for this datasheet
VSB uhf modulator - VSB uhf modulator
TDA9820 - TDA9820
SIEMENS saw filter - SIEMENS saw filter
philips TV receiver modules I2C - philips TV receiver modules I2C
G1984M - G1984M
g1984* - g1984*
TDA9884 - TDA9884
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL mobile reception
Rev. 2006 Product data sheet
TDA9884 alignment-free multistandard (PAL, SECAM NTSC) vision sound signal demodulator positive negative modulation, including sound processing. device specially prepared mobile applications.
Features
supply voltage Gain controlled wide-band amplifier, AC-coupled Multistandard true synchronous demodulation with active carrier regeneration: very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response Gated phase detector L-accent standard Fully integrated VCO, alignment-free, frequencies switchable negative positive modulated standards I2C-bus Digital acquisition help, frequencies 33.4 MHz, 33.9 MHz, 38.0 MHz, 38.9 MHz, 45.75 58.75 reference frequency input: signal from tuning system operating crystal oscillator detector gain control, operating peak sync detector negative modulated signals peak white detector positive modulated signals Mobile mode negative modulation (VIF SIF) provides very fast reaction time External setting AGCSW; VIF-AGC SIF-AGC monitor outputs Precise fully digital detector with 4-bit digital-to-analog converter; bits readable I2C-bus adjustable I2C-bus alternatively with potentiometer Fully integrated sound carrier trap MHz, MHz, MHz; controlled FM-PLL oscillator input single reference mode; controlled True split sound mode sound demodulation level SIF-AGC gain controlled amplifier, single reference mixer able operate high performance single reference mode intercarrier mode, switchable I2C-bus demodulator without extra reference circuit Alignment-free selective FM-PLL demodulator with high linearity noise
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Four selectable I2C-bus addresses I2C-bus control functions I2C-bus transceiver with programmable
Quick reference data
Table Symbol Video part Vi(VIF)(rms) GVIF(cr) fVIF input voltage sensitivity (RMS value) gain control range vision carrier operating frequencies video output Figure Table fVIF Vo(v)(p-p) frequency window digital related fVIF; Figure acquisition help video output voltage (peak-to-peak value) Figure normal mode (sound carrier trap active) sound carrier trap bypass mode sound carrier Gdif differential gain 33.4 33.9 38.0 38.9 45.75 58.75 ±2.3 Quick reference data Parameter supply voltage supply current Conditions
[1][2]
Unit
0.95
1.10
1.25
"ITU-T J.63 line 330"
standard standard
Bv(-1dB)
differential phase video bandwidth
"ITU-T J.63 line 330"
trap bypass mode sound carrier off; load; ftrap ftrap ftrap ftrap
Bv(-3dB)(trap)
video bandwidth including sound carrier trap
3.95 4.90 5.40 5.50
4.05 5.00 5.50 5.95
S/NW PSRRCVBS
attenuation first sound carrier standard; standard; weighted signal-to-noise ratio Figure
power supply ripple rejection fripple video signal; CVBS grey level; positive negative modulation; Figure
Rev. 2006
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Symbol AFCstps Audio part Vo(AF)(rms)
Quick reference data .continued Parameter control steepness output voltage (RMS value) total harmonic distortion Conditions definition: IAFC/fVIF deviation; de-emphasis deviation; de-emphasis without de-emphasis; measured with FM-PLL filter Figure 0.85 1.05 0.15 1.25 0.50 Unit µA/kHz
BAF(-3dB)
bandwidth
S/NW(AF)
weighted signal-to-noise ratio FM-PLL only: audio signal deviation; de-emphasis accordance with "ITU-R BS.468-4"
AM(sup)
suppression demodulator
referenced deviation; de-emphasis; kHz; fripple Figure
PSRR
power supply ripple rejection
Vo(intc)(rms)
intercarrier output level (RMS value)
mode; SC1; standard; without modulation intercarrier mode; PC/SC1
Reference frequency input (pin REF) fref Vref(rms) reference signal frequency reference signal voltage (RMS value) operation input terminal
Values video sound parameters decreased applications without I2C-bus, time constant supply must (e.g. µF). Condition: luminance range steps) from load: sound carrier frequencies (depending standard) attenuated integrated sound carrier traps (see Figure Figure absolute value transfer function). Measurement using unified weighting filter ("ITU-T J.61"), high-pass filter, low-pass filter subcarrier notch filter ("ITU-T J.64"). intercarrier output signal SIOMAD calculated following formulae taking into account internal video signal with (p-p) reference: intc where:
correction term value, sound-to-picture carrier ratio pins VIF1 VIF2 correction
term internal circuitry tolerance video output intercarrier output Vo(intc)(rms). able operate 1-pin crystal oscillator input well external reference signal input, e.g. from tuning system.
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Ordering information
Table Ordering information Package Name TDA9884TS TDA9884HN SSOP24 HVQFN32 Description plastic shrink small outline package; leads; body width plastic thermal enhanced very thin quad flat package; leads; terminals; body 0.85 Version SOT340-1 SOT617-3 Type number
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxx xxxxx
Product data sheet Rev. 2006
Koninklijke Philips Electronics N.V. 2006. rights reserved. TDA9884_2
Block diagram
Philips Semiconductors
CVAGC(pos)
VIF-PLL filter VPLL (21)
external reference signal crystal
TAGC (15) CAGC(neg)
VAGC (17)
(16)
AFC(1) (23)
TUNER
VIF-AGC
DIGITAL CONTROL
DETECTOR
VIF2 VIF1
(31) (30) VIF-PLL
SOUND CARRIER TRAPS
(18) CVBS video output: (p-p) [1.1 (p-p) without trap]
TDA9884
SIF2 SIF1 (27) (26) SINGLE REFERENCE MIXER INTERCARRIER MIXER DEMODULATOR SUPPLY SIF-AGC CAGC OUTPUT PORTS 2C-BUS TRANSCEIVER NARROW-BAND FM-PLL DEMODULATOR AUDIO PROCESSING SWITCHES DEEM de-emphasis network audio output
I2C-bus controlled multistandard alignment-free IF-PLL
(22)
(20) (14) AGND AGCSW
(24) (10)
DGND
(11) SIOMAD
FMPLL FM-PLL filter
001aae451
sound intercarrier output select
TDA9884
numbers TDA9884HN parentheses. SIF-AGC monitor output AFC.
Block diagram
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Pinning information
Pinning
VIF1 VIF2 FMPLL DEEM DGND
SIF2 SIF1 VPLL AGND CVBS VAGC TAGC AGCSW
001aae450
TDA9884TS
SIOMAD
configuration SOT340-1 (SSOP24)
VIF2
VIF1
SIF2
SIF1
n.c.
n.c.
n.c.
terminal index area FMPLL DEEM DGND n.c.
n.c. VPLL AGND n.c. CVBS VAGC
001aae449
Koninklijke Philips Electronics N.V. 2006. rights reserved.
TDA9884HN
SIOMAD
n.c.
n.c.
AGCSW
Transparent view
configuration SOT617-3 (HVQFN32)
description
Table Symbol VIF1 VIF2 n.c.
TDA9884_2
description TDA9884TS TDA9884HN differential input differential input connected output port open-collector Description
Product data sheet
Rev. 2006
TAGC
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
description .continued TDA9884TS TDA9884HN FM-PLL loop filter de-emphasis output capacitor decoupling input capacitor digital ground connected audio output tuner TakeOver Point (TOP) resistor adjustment I2C-bus data input output I2C-bus clock input sound intercarrier output select with resistor connected connected fast external enable switch tuner output crystal reference signal input VIF-AGC capacitor standard composite video output connected analog ground VIF-PLL loop filter supply voltage output output port open-collector connected differential input select with resistor differential input select with resistor connected connected Description
Table Symbol FMPLL DEEM DGND n.c. SIOMAD n.c. n.c. AGCSW TAGC VAGC CVBS n.c. AGND VPLL n.c. SIF1 SIF2 n.c. n.c.
Functional description
Figure shows simplified block diagram device which comprises following functional blocks:
amplifier Tuner VIF-AGC VIF-AGC detector
TDA9884_2 Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
FPLL detector divider digital acquisition help Video demodulator amplifier Sound carrier trap amplifier SIF-AGC detector Single reference mixer demodulator demodulator acquisition help Audio amplifier mute time constant Internal voltage stabilizer I2C-bus transceiver
amplifier
amplifier consists three AC-coupled differential stages. Gain control performed emitter degeneration. total gain control range typically differential input impedance typically parallel with
Tuner VIF-AGC
This block adapts voltages, generated VIF-AGC SIF-AGC detectors, internal signal processing amplifiers performs tuner control current generation. Normally derived from VIF-AGC, true split sound mode derived from SIF-AGC. onset tuner control current generation either I2C-bus (see Table optionally potentiometer case that I2C-bus information cannot stored). presence potentiometer automatically detected I2C-bus setting disabled. Furthermore, derived from detector voltage, comparator used test corresponding input voltage higher than This information read I2C-bus (bit VIFLEV
VIF-AGC detector
Gain control performed sync level detection (negative modulation) peak white detection (positive modulation). negative modulation, sync level voltage compared with reference voltage (nominal sync level) comparator which charges discharges integrated capacitor directly generation required gain. With mobile mode currents increased factor approximately very fast reaction. event detector, gain increase time constant (discharge current) additionally reduces with too-low signal. positive modulation, white peak level voltage compared with reference voltage (nominal white level) comparator which charges (fast) discharges (slow) external capacitor directly generation required gain. need
TDA9884_2 Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
very long time constant gain increase because peak white level appear only once field. order reduce this time constant, additional level detector increases discharging current capacitor (fast mode) event decreasing amplitude step controlled detected actual black level voltage. threshold level fast mode typically video amplitude. fast mode state also transferred SIF-AGC detector speed-up. case missing peak white pulses, gain increase limited typically comparing detected actual black level voltage with corresponding reference voltage.
FPLL detector
amplifier output signal into frequency detector into phase detector limiting amplifier removing video During acquisition frequency detector produces current proportional frequency difference between signals. After frequency lock-in phase detector produces current proportional phase difference between signals. currents from frequency phase detectors charged into loop filter which controls locks frequency phase carrier. positive modulated signal, charging currents gated composite sync order avoid signal distortion case overmodulation. gating depth switchable I2C-bus.
divider
VIF-FPLL operates integrated radiation relaxation oscillator double picture carrier frequency. control voltage, required tune double picture carrier frequency, generated loop filter frequency phase detector. possible frequency range (typical value). oscillator frequency divided-by-two provide differential square wave signals with exactly degrees phase difference, independent frequency, FPLL detectors, video demodulator intercarrier mixer.
digital acquisition help
Each relaxation oscillator VIF-PLL FM-PLL demodulator wide frequency range. prevent false locking PLLs with respect catching range, digital acquisition help provides individual control, until frequency within preselected standard dependent lock-in window PLL. in-window out-window control FM-PLL additionally used mute audio stage auto mute selected I2C-bus). working principle digital acquisition help follows. output connected down counter which predefined start value (standard dependent). frequency clocks down counter fixed gate time. Thereafter, down counter stop value analyzed. case stop value higher (lower) than expected value range, frequency lower (higher) than wanted lock-in window frequency range. positive (negative) control current injected into loop filter consequently frequency increased (decreased) counting cycle starts.
TDA9884_2 Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
gate time well control logic acquisition help circuit dependent precision reference signal REF. Operation crystal oscillator possible well connecting this input serial capacitor external reference frequency, e.g. tuning system oscillator. signal derived from corresponding down counter stop value after counting cycle. last four bits latched read I2C-bus (see Table 10). Also digital-to-analog converted value given current AFC.
Video demodulator amplifier
video demodulator realized multiplier which designed distortion large bandwidth. signal multiplied with phase' signal VIF-PLL VCO. demodulator output signal into video preamplifier level shift stage with integrated low-pass filter achieve carrier harmonics attenuation. output signal preamplifier VIF-AGC detector (see Section 7.3) sound trap mode also internally integrated sound carrier trap (see Section 7.8). differential trap output signal converted amplified following post-amplifier. video output level CVBS (p-p). bypass mode output signal preamplifier directly through post-amplifier CVBS. output video level (p-p) using external sound trap with overall loss. Noise clipping provided both cases.
Sound carrier trap
sound carrier trap consists reference filter, phase detector sound trap itself. sound carrier reference signal into reference low-pass filter shifted nominal degrees. phase detector compares original reference signal with signal shifted reference filter produces voltage charging discharging integrated capacitor with current proportional phase difference between both signals, respectively frequency error integrated filters. voltage controls frequency position reference filter sound trap. accurate frequency position different standards sound carrier reference signal. sound trap itself constructed three separate traps realize sufficient suppression first second sound carriers.
amplifier
amplifier consists three AC-coupled differential stages. Gain control performed emitter degeneration. total gain control range typically differential input impedance typically parallel with
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
7.10 SIF-AGC detector
gain control performed detection component demodulator output signal. This signal corresponds directly voltage output amplifier that constant signal supplied demodulator single reference mixer. switching gain input amplifier SIF-AGC detector I2C-bus, internal level sound lower than sound. This adapt SIF-AGC characteristic VIF-AGC characteristic. adaption ideal picture-to-sound carrier ratio comparator, integrated capacitor charged discharged generation required gain. sound, reaction time slow closed loop). reducing this sound time constant event decreasing amplitude step, charging discharging currents capacitor increased factor (fast mode) when VIF-AGC detector positive modulation mode) operates fast mode too. additional circuit (threshold approximately ensures very fast gain reduction large increasing amplitude step. negative modulation mode also fast mode. negative modulation mobile mode currents increased additionally factor
7.11 Single reference mixer
With present system high performance Hi-Fi stereo sound processing achieved. simplified application without filter, single reference mixer switched intercarrier mode I2C-bus. single reference mixer generates sound intercarrier signal. realized linear multiplier which multiplies amplifier output signal VIF-PLL signal degrees output) which locked picture carrier. this mixer operates quadrature mixer intercarrier mode provides suppression frequency video signals. true split sound mode VIF-PLL locked synthesizer. this sound intercarrier signal generated independently from vision carrier that case level, sound demodulation possible where VIF-PLL would unlock. true split sound mode demodulation available. mixer output signal internally high-pass low-pass combination demodulator well operational amplifier intercarrier output SIOMAD.
7.12 demodulator
amplitude modulated amplifier output signal both two-stage limiting amplifier that removes linear multiplier. result multiplication signal with limiter output signal demodulation (passive synchronous demodulator). demodulator output signal low-pass filter that attenuates carrier harmonics input amplifier SIF-AGC detector audio amplifier.
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
7.13 demodulator acquisition help
narrow-band FM-PLL detector consists
Gain controlled amplifier detector Narrow-band
intercarrier signal from intercarrier mixer input AC-coupled gain controlled amplifier with stages. gain controlled output signal phase detector narrow-band FM-PLL demodulator). good selectivity robustness against disturbance caused video signal, high linearity gain controlled amplifier phase detector well constant signal level required. gain control done means phase' demodulator carrier (from output amplifier). demodulation output into comparator charging discharging integrated capacitor. This leads mean value loop control gain amplifier. demodulator realized narrow-band with external loop filter, which provides necessary selectivity (bandwidth approximately kHz). achieve good selectivity, linear phase detector constant input level required. gain controlled intercarrier signal from amplifier phase detector. phase detector controls loop filter integrated radiation relaxation oscillator. designed frequency range from MHz. within FM-PLL phase-locked incoming signal, which frequency modulated. well this, control voltage superimposed voltage. Therefore, tracks with signal. voltage present loop filter typically (RMS) deviation. This signal buffer audio amplifier. correct locking supported digital acquisition help circuit (see Section 7.6).
7.14 Audio amplifier mute time constant
audio amplifier consists parts:
preamplifier output amplifier
preamplifier used sound operational amplifier with internal feedback, high gain high common mode rejection. voltage from demodulator (RMS) frequency deviation amplified operating point control circuit (with external capacitor CAF), preamplifier decoupled from voltage. low-pass characteristic amplifier reduces harmonics sound intercarrier signal output terminal. sound switchable de-emphasis network (with external capacitor) implemented between preamplifier output amplifier. output amplifier provides required output level rail-to-rail output stage. preceding stage makes input selector switching between sound, sound mute state. gain switched between (normal) (reduced).
TDA9884_2 Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Switching mute state controlled automatically, dependent digital acquisition help case FM-PLL required frequency window. This done time constant: fast switching mute state slow (typically switching no-mute state. switching functions controlled I2C-bus:
sound, sound forced mute Auto mute enable disable De-emphasis with Audio gain normal reduced
7.15 Internal voltage stabilizer
band circuit internally generates voltage approximately independent supply voltage temperature. voltage regulator circuit, connected this voltage, produces constant voltage 3.55 which used internal reference voltage.
7.16 I2C-bus transceiver module address
device controlled 2-wire I2C-bus microcontroller. wires carry serial data (SDA) serial clock (SCL) information between devices connected I2C-bus. device I2C-bus slave transceiver with auto-increment. circuit operates clock frequencies kHz. slave address sent from master slave receiver. avoid conflicts real application with other devices providing similar complementing functions, there four possible slave addresses available. These Module Addresses (MADs) selected connecting resistors SIOMAD and/or pins SIF1 SIF2 (see Figure 23). SIOMAD relates pins SIF1 SIF2 relate slave addresses this device given Table power-on preset value dependent SIOMAD chosen 45.75 NTSC default (pin SIOMAD left open-circuit) 58.75 NTSC (resistor SIOMAD). this device used without I2C-bus NTSC only device. Remark: case using device without I2C-bus, then rise time supply voltage after switching power must longer than
Table Slave address detection Selectable address MAD1 MAD2 MAD3 MAD4 Resistor SIF1 SIF2 SIOMAD
Slave address
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
I2C-bus control
Read format
Table I2C-bus read format (slave transmits data) Byte data Byte slave address Table Symbol Slave address Data Explanation Table Function START condition, generated master Table read command, generated master acknowledge bit, generated slave 8-bit data word, transmitted slave, Table acknowledge-not bit, generated master STOP condition, generated master
master generates acknowledge when received dataword READ. master next generates acknowledge, then slave begins transmitting dataword READ, until master generates acknowledge-not transmits STOP condition.
8.1.1 Slave address
first module address MAD1 standard address, Table
Table Symbol MAD1 MAD2 MAD3 MAD4
Slave addresses[1][2] Value (hex)
activation external resistor: Table Figure applications without I2C-bus: Table Table
8.1.2 Data byte
Table AFCWIN VIFLEV AFC3 AFC2 AFC1 CARRDET AFC4 Data read register (status register) PONR
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Description status register bits Value Description window ±1.6 window[1] ±1.6 window input level high level; input voltage (typically) level carrier detection detection detection automatic frequency control Table power-on reset after power-on reset after supply breakdown after successful reading status register
Table Symbol AFCWIN
VIFLEV
CARRDET
AFC[4:1] PONR
input applied, then AFCWIN fact that forced window border fast lock-in behavior.
Table AFC4
Automatic frequency control bits[1] fVIF AFC3 AFC2 AFC1 187.5 kHz) 162.5 137.5 112.5 87.5 62.5 37.5 12.5 12.5 37.5 62.5 87.5 112.5 137.5 162.5 187.5 kHz)
nominal frequency fVIF.
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Write format
Table I2C-bus write format (slave receive data)[1] Byte subaddress Byte bits data Byte bits data Byte slave address
auto-increment subaddress stops subaddress
Table Symbol
Explanation Table Function START condition, generated master Table write command, generated master acknowledge bit, generated slave Table 8-bit data words, transmitted master (see Table Table Table STOP condition
Slave address Subaddress (SAD) Data data
8.2.1 Subaddress
more than data byte transmitted, then auto-increment performed: starting from transmitted subaddress auto-increment subaddress accordance with order Table
Table Register switching mode adjust mode data mode
don't care. allowed. Bits will ignored internal hardware.
Definition subaddress (second byte after slave address)[1] A7[2] A6[3] A5[3] A4[3] A3[3] A2[3]
8.2.2 Data byte switching mode
Table
TDA9884_2
description register switching mode (SAD Value Description output port e.g. switching monitoring high-impedance, disabled HIGH low-impedance, active output port e.g. switching external input high-impedance, disabled HIGH low-impedance, active
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
description register switching mode (SAD .continued Value Description forced audio mute standard modulation mobile mode positive TV[1] positive TV[1][2] negative negative mobile mode[2][3] carrier mode mode intercarrier mode auto mute output active inactive video mode (sound trap) sound trap bypass sound trap active
Table
positive choose second SIF. SIF-AGC monitor output AFC. (VIF/SIF) provides very fast reaction time.
8.2.3 Data byte adjust mode
Table description register adjust mode (SAD Value Description audio gain de-emphasis time constant de-emphasis tuner takeover point adjustment Table
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Tuner takeover point adjustment bits adjustment (dB) 0[1]
Table
equal (RMS).
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
8.2.4 Data byte data mode
Table Table Options port function VIF-AGC output[1][2][3] VIF-AGC external input[1][2][3] VIF-AGC output[1][2][3] external gain Gain
description register data mode (SAD Value Description VIF-AGC features dependent Table standard gating gating case positive modulation gating case positive modulation optimum multipath condition optimum overmodulation condition VIF, tuner minimum gain dependent Table vision intermediate frequency selection Table Table sound intercarrier frequency selection (sound IF); only valid setting according Table (for positive modulation choose MHz)
Function port function port function port function port function
normal gain minimum gain normal gain
corresponding port function disabled (set `high-impedance'); Table selected I2C-bus, VIF-AGC voltage monitored OP2. this case, cannot used normal port function. selected I2C-bus, alternatively used external control, activated AGCSW. this case, cannot used normal port function.
Table
standard selection fVIF (MHz) 58.75[1] 45.75[1] 38.9 38.0 33.9 33.4
Video select bits
SIOMAD used selection different NTSC standards without I2C-bus. With resistor SIOMAD, fVIF 58.75 MHz; without resistor SIOMAD, fVIF 45.75 (NTSC-M).
Koninklijke Philips Electronics N.V. 2006. rights reserved.
TDA9884_2
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
True split sound mode Function fsynth (MHz) Sound (MHz)
Table standard Table Register
Data setting after power-on reset (default setting with resistor SIOMAD)
Switching mode Adjust mode Data mode Table Register Switching mode Adjust mode Data mode
Data setting after power-on reset (default setting without resistor SIOMAD)
selection different NTSC standards without I2C-bus, application SIOMAD used (see Figure 23). Without resistor, NTSC-M selected (fVIF 45.75 MHz); with resistor, frequency 58.75 (see Table 19).
Limiting values
Table Limiting values accordance with Absolute Maximum Rating System (IEC 60134). Symbol Parameter supply voltage voltage pins VIF1, VIF2, OP1, FMPLL, AGCSW, AFC, OP2, SIF1 SIF2 TAGC Tstg Tamb Vesd short-circuit time ground storage temperature ambient temperature electrostatic discharge voltage machine model human body model
Conditions
Unit
-400 -4000
+150 +400 +4000
TDA9884_2
Class according EIA/JESD22-A115-A. Class according JESD22-A114-B.
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Thermal characteristics
Table Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction ambient TDA9884TS (SSOP24) TDA9884HN (HVQFN32) free free Conditions Unit
Characteristics
Table Characteristics Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Supply (pin Ptot supply voltage supply current total power dissipation supply voltage start reset supply voltage reset time constant network input voltage sensitivity (RMS value) decreasing supply voltage increasing supply voltage; I2C-bus transmission enable applications without I2C-bus
[1][2]
Parameter
Conditions
Unit
Power-On Reset (POR) VP(start) VP(stop)
amplifier (pins VIF1 VIF2) Vi(VIF)(rms) video output
Vi(max)(rms) Vi(ovl)(rms) VIF(int)
maximum input video output voltage (RMS value) overload input voltage (RMS value) internal amplitude within range; difference between picture sound carrier gain control range lower limit bandwidth upper limit bandwidth
Rev. 2006
GVIF(cr) BVIF(-3dB)(ll) BVIF(-3dB)(ul)
TDA9884_2
Figure
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Ri(dif) Ci(dif) fVCO(max) Parameter differential input resistance differential input capacitance input voltage demodulator[5] 2fPC maximum oscillator frequency carrier regeneration vision carrier operating frequencies Conditions
1.93
Unit
FPLL true synchronous video
fVIF
Table
33.4 33.9 38.0 38.9 45.75 58.75 ±2.3
fVIF
frequency window digital acquisition help acquisition time input voltage sensitivity locked (RMS value) cycle time digital acquisition help steepness phase detector steepness
related fVIF; Figure
tacq Vi(lock)(rms)
measured pins VIF1 VIF2; maximum gain
Tcy(DAH) KO(VIF) KD(VIF)
definition: fVIF/VVPLL definition: IVPLL/VIF
MHz/V µA/rad
Video output (pin CVBS) Normal mode (sound carrier trap active) sound carrier Vo(v)(p-p) video output voltage Figure (peak-to-peak value) video output voltage difference ratio between video (black-to-white) sync level sync voltage level upper video clipping voltage level lower video clipping voltage level difference between standard 1.90 2.33 3.00
Vsync Vclip(u) Vclip(l)
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Ibias(int) Parameter output resistance internal bias current emitter-follower maximum output sink current maximum output source current deviation CVBS output voltage black level tilt gain control gain control negative modulation Conditions
Unit
Io(sink)(max)
Io(source)(max)
Vo(CVBS) Vo(bl) Vo(bl)(v)
vertical black level tilt vision carrier modulated worst case test line (VITS) only standard differential gain
Gdif
"ITU-T J.63 line 330"
standard standard
S/NW S/NUW IM(blue)
differential phase weighted signal-to-noise ratio unweighted signal-to-noise ratio intermodulation attenuation `blue'
"ITU-T J.63 line 330"
Figure
Figure Figure fundamental wave harmonics
[10]
[10]
IM(yellow)
intermodulation attenuation `yellow' residual picture carrier (RMS value)
Vr(PC)(rms) funw(p-p)
residual carrier; robustness unwanted frequency serration pulses; standard deviation picture carrier (peak-to-peak value) robustness residual carrier; modulator imbalance serration pulses; standard; L-gating suppression video load; signal harmonics
[11]
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol spur PSRRCVBS Parameter suppression spurious elements power supply ripple rejection CVBS fripple video signal; grey level; positive negative modulation; Figure ftrap
[13]
Conditions
[12]
Unit
standard including Korea; Figure Bv(-3dB)(trap) video bandwidth including sound carrier trap attenuation first sound carrier attenuation first sound carrier fSC1 3.95 4.05
SC1(60kHz)
SC2(60kHz)
attenuation 4.724 second sound carrier 4.724 attenuation second sound carrier fSC2 group delay color carrier frequency video bandwidth including sound carrier trap attenuation first sound carrier attenuation first sound carrier fSC1 3.58 MHz; Figure ftrap
[13]
td(g)(cc)
standard; Figure Bv(-3dB)(trap) 4.90 5.00
SC1(60kHz)
SC2(60kHz)
attenuation 5.742 second sound carrier attenuation 5.742 second sound carrier fSC2 group delay color carrier frequency video bandwidth including sound carrier trap attenuation first sound carrier 4.43 MHz; Figure ftrap
[13]
td(g)(cc)
standard; Figure Bv(-3dB)(trap) 5.40 5.50
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol SC1(60kHz) Parameter attenuation first sound carrier fSC1 Conditions Unit
SC2(60kHz)
attenuation 6.55 second sound carrier 6.55 attenuation second sound carrier fSC2 group delay color carrier frequency video bandwidth including sound carrier trap attenuation first sound carrier attenuation first sound carrier fSC1 4.43
td(g)(cc)
standard; Figure Bv(-3dB)(trap) ftrap
[13]
5.50
5.95
SC1(60kHz)
SC2(60kHz)
attenuation 6.742 second sound carrier attenuation 6.742 second sound carrier fSC2 group delay color carrier frequency 4.28
td(g)(cc)
Video output (pin CVBS) Trap bypass mode sound carrier off[14] Vo(v)(p-p) Vsync Vclip(u) Vclip(l) Bv(-1dB) Bv(-3dB) S/NW S/NUW video output voltage Figure (peak-to-peak value) sync voltage level upper video clipping voltage level lower video clipping voltage level video bandwidth video bandwidth weighted signal-to-noise ratio unweighted signal-to-noise ratio load; load; Figure
0.95 1.35
1.10
1.25
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol VIF-AGC[15] tresp(inc) response time increasing step negative modulation; normal mode negative modulation; mobile mode positive modulation; step: tresp(dec) response time decreasing step negative modulation normal mode fast normal mode mobile mode fast mobile mode positive modulation normal mode; step: normal mode fast mode Vi(VIF) amplitude step activating fast mode gain control voltage range control steepness standard
[16] [16] [16][17] [16] [16][17] [16]
Parameter
Conditions
Unit µs/dB µs/dB
[16]
[16]
0.08 0.25 0.01
ms/dB ms/dB ms/dB ms/dB ms/dB ms/dB
[16] [16][18]
VVAGC CRstps Vth(VIF) VAGC Ich(max) Ich(add)
Figure definition: GVIF/VVAGC; VVAGC
dB/V
threshold voltage Table Table high level input maximum charge current additional charge current discharge current AGCSW)[19]; standard standard: event missing VITS pulses white video content standard; normal mode standard; fast mode
Idch
input switch (pin Vext(AGCOFF) Vext(AGCON)
Table
voltage level external voltage level external input resistance
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Parameter input current input voltage switching delay external Conditions VAGCSW AGCSW open-circuit VAGCSW Unit
switching delay external VAGCSW input signal voltage minimum starting point tuner takeover pins VIF1 VIF2 (RMS value) ITAGC RTOP RTOP I2C-bus (see Table
Tuner (pin TAGC); Figure Figure Figure Vi(VIF)(start1)(rms)
Vi(VIF)(start2)(rms)
ITAGC RTOP input signal voltage maximum RTOP starting point I2C-bus (see Table tuner takeover pins VIF1 VIF2 (RMS value) input signal voltage minimum starting point tuner takeover pins SIF1 SIF2 (RMS value) input signal voltage maximum starting point tuner takeover pins SIF1 SIF2 (RMS value) tuner takeover point accuracy true split sound mode; ITAGC RTOP RTOP I2C-bus (see Table true split sound mode; ITAGC RTOP RTOP I2C-bus (see Table
Vi(SIF)(start1)(rms)
Vi(SIF)(start2)(rms)
22.5
QVTOP
ITAGC RTOP RTOP I2C-bus (see Table normal mode true split sound mode 0.03 0.07 dB/K
QVTOP/T
takeover point variation with temperature permissible output voltage saturation voltage
ITAGC
Vsat
TDA9884_2
from external source ITAGC
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Isink Parameter sink current Conditions tuner gain reduction; VTAGC maximum tuner gain reduction; VTAGC slip automatic gain control lower limit saturation voltage lower limit saturation voltage output source current output sink current control steepness analog accuracy circuit digital accuracy circuit I2C-bus SIF-AGC monitor source current SIF-AGC monitor sink current input voltage sensitivity (RMS value) mode; intercarrier output SIOMAD mode; output Vi(max)(rms) maximum input mode; voltage (RMS value) intercarrier output SIOMAD mode; output Vi(ovl)(rms) GSIF(cr) BSIF(-3dB)(ll) overload input voltage (RMS value) gain control range lower limit bandwidth mode; Figure
0.75
Unit
tuner gain current from
circuit (pin AFC)[20][21]; Figure Vsat(ul) Vsat(ll) Io(source) Io(sink) AFCstps QfVIF(a) QfVIF(d) definition: IAFC/fVIF IAFC fREF IAFC fREF MHz; digit 0.85 1.05 1.25 µA/kHz
digit
digit
SIF-AGC monitor (pin AFC)[20]; Table Io(source) Io(sink)
amplifier (pins SIF1 SIF2) Vi(SIF)(rms)
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol BSIF(-3dB)(ul) Ri(diff) Ci(diff) SIF-AGC detector tresp response time increasing decreasing step fast step; normal mode increasing decreasing fast step; mobile mode increasing decreasing slow step increasing decreasing Single reference intercarrier mixer (pin SIOMAD) Vo(intc)(rms) intercarrier output mode; SC1; level (RMS value) standard; without modulation intercarrier mode; PC/SC1 Bintc(-3dB)(ul) upper limit intercarrier bandwidth residual sound carrier (RMS value) fundamental wave harmonics mode intercarrier mode Vr(PC)(rms) residual picture carrier (RMS value) fundamental wave harmonics mode intercarrier mode
TDA9884_2
Parameter upper limit bandwidth differential input resistance differential input capacitance input voltage
Conditions
1.93
Unit
[20]
[20]
[22]
0.25
Vr(SC)(rms)
suppression video intercarrier mode; signal harmonics fvideo output resistance output voltage
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Ibias(int) Parameter internal bias current emitter follower maximum output sink current maximum output source current output source current MAD2 activated
[23]
Conditions
0.90
1.15
Unit
Io(sink)(max) Io(source)(max) Io(source)
0.75
0.93
1.20
FM-PLL Sound intercarrier output (pin SIOMAD) VFM(rms) corresponding PC/SC ratio intercarrier level input pins VIF1 VIF2 gain controlled operation FM-PLL (RMS value) intercarrier level lock-in (RMS value) intercarrier level carrier detect (RMS value) sound intercarrier operating frequencies Table
VFM(lock)(rms)
VFM(det)(rms)
Table
true split sound mode; Table
Audio output (pin AUD) Vo(AF)(rms) output voltage (RMS value) deviation; de-emphasis deviation; de-emphasis Vo(AF)(cl)(rms) Vo(AF)/T output clipping level (RMS value) output voltage variation with temperature total harmonic distortion deviation; de-emphasis
10-3 10-3 dB/K
0.15
0.50
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Parameter frequency deviation Conditions output I2C-bus BAF(-3dB) bandwidth without de-emphasis; measured with FM-PLL filter Figure FM-PLL only; deviation; de-emphasis black picture; Figure Vr(SC)(rms) residual sound carrier (RMS value) suppression demodulator fundamental wave harmonics; without de-emphasis referenced deviation; de-emphasis; kHz; fripple Figure
[25] [25]
±110
Unit
S/NW(AF)
weighted signal-to-noise ratio audio signal
AM(sup)
PSRR
power supply ripple rejection loop voltage maximum phase detector output source current maximum phase detector output sink current output source current digital acquisition help output sink current digital acquisition help pulse width digital acquisition help current cycle time digital acquisition help steepness phase detector steepness
FM-PLL filter (pin FMPLL) Vloop Io(source)(PD)(max)
Io(sink)(PD)(max)
Io(source)(DAH)
Io(sink)(DAH)
tW(DAH)
Tcy(DAH) KO(FM) KD(FM)
definition: fFM/VFMPLL definition: IFMPLL/FM
MHz/V µA/rad
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Audio amplifier De-emphasis network (pin DEEM) output resistance de-emphasis; Table de-emphasis; Table VAF(rms) Vdec Ich(max) Idch(max) audio signal (RMS value) output voltage decoupling voltage leakage current maximum charge current maximum discharge current output resistance output voltage load resistance load resistance load capacitance upper limit bandwidth audio amplifier lower limit bandwidth audio amplifier mute attenuation signal jump voltage switching output mute state vice versa I2C-bus activated digital acquisition help I2C-bus mute
[26]
Parameter
Conditions
Unit
2.37 1.50 1.50
1.85 1.85
VAUD
decoupling (pin AFD) dependent intercarrier frequency VO(AUD) 1.15 1.15
Audio output (pin AUD) VO(AUD) RL(DC) BAF(-3dB)(ul) AC-coupled 2.37
BAF(-3dB)(ll)
mute Vjump
±150
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol operation[27][29] weighted signal-to-noise ratio PC/SC ratio pins VIF1 VIF2 black picture white picture sine wave (black-to-white modulation) sound carrier subharmonics; 2.75 Single reference performance[31][32] S/NW(SC1) weighted signal-to-noise ratio PC/SC1 ratio pins VIF1 VIF2; deviation); "ITU-R BS.468-4" black picture white picture sine wave (black-to-white modulation) square wave (black-to-white modulation) sound carrier subharmonics; 2.75 sound carrier subharmonics; 2.87 Parameter Conditions Unit
Intercarrier performance[30] S/NW
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol S/NW(SC2) Parameter weighted signal-to-noise ratio Conditions PC/SC2 ratio pins VIF1 VIF2; deviation); "ITU-R BS.468-4" black picture white picture sine wave (black-to-white modulation) square wave (black-to-white modulation) sound carrier subharmonics; 2.75 sound carrier subharmonics; 2.87 operation standard (pin AUD)[33]; Figure Figure Vo(AF)(rms) BAF(-3dB) S/NW(AF) output voltage (RMS value) total harmonic distortion bandwidth weighted signal-to-noise ratio audio signal potential voltage power supply ripple rejection input voltage input resistance resonance resistance crystal pull-up/down capacitance reference signal frequency tolerance reference signal frequency operation crystal oscillator
[34]
Unit
modulation modulation
accordance with "ITU-R BS.468-4"
VO(AUD) PSRR
fripple Figure
2.37
Reference frequency input (pin REF) Rxtal fref fref ±0.1
[35]
[21]
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Table Characteristics .continued Tamb Table input frequencies; standard used specification (fPC 38.9 MHz; 33.4 MHz; PC/SC fmod Hz); input level Vi(VIF) (RMS) (sync level B/G; peak white level input from broadband transformer video modulation DSB; residual carrier video signal accordance with "ITU-T J.63 line line 330" "NTC-7 Composite"; measurements taken test circuit Figure unless otherwise specified. Symbol Vref(rms) Ro(ref) Parameter Conditions Unit reference signal operation input terminal voltage (RMS value) output resistance reference signal source decoupling capacitance external reference signal source clock frequency HIGH-level input voltage LOW-level input voltage HIGH-level input current LOW-level input current LOW-level output voltage output sink current output source current LOW-level output voltage HIGH-level output voltage output sink current maximum output sink source current functions VIF-AGC output operation input terminal
I2C-bus transceiver (pins SCL)[36][37] fSCL Io(sink) Io(source) -0.3 +1.5
Output ports (pins OP2)[15][19][38] Io(sink) Io(sink/source)(max) (sink current)
Values video sound parameters decreased applications without I2C-bus, time constant supply must (e.g. µF). Level headroom input level jumps during gain control setting. This parameter tested during production only given application information designing receiver circuit.
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Loop bandwidth (damping factor 1.9; calculated with sync level within gain control range). Calculation VIF-PLL filter done following formulae: -3dB valid 1.2; where:
steepness phase detector steepness loop resistor; loop capacitor; BL-3dB
loop bandwidth damping factor. Vi(VIF) (RMS); (VCO frequency offset related picture carrier frequency); white picture video modulation. Condition: luminance range steps) from Measurement using unified weighting filter ("ITU-T J.61"), high-pass filter, low-pass filter subcarrier notch filter ("ITU-T J.64"). Noise analyzer setting: high-pass SC-trap switched
[10] intermodulation figures defined for: (referenced black white signal)
(referenced color carrier)
[11] Measurements taken with filter M1963M (sound shelf: dB); loop bandwidth kHz. Modulation VSB; sound carrier off; fvideo MHz. [12] Measurements taken with filter M1963M (sound shelf: dB); loop bandwidth kHz. Sound carrier fvideo MHz. [13] load; sound carrier frequencies (depending standard) attenuated integrated sound carrier traps (see Figure Figure absolute value transfer function). [14] sound carrier trap bypassed switching I2C-bus. this full composite video spectrum appears CVBS. amplitude (p-p). [15] selected I2C-bus, VIF-AGC voltage monitored OP2. this case, cannot used normal port function. [16] response time valid input level range from [17] fast mode will activated automatically, within time typically mobile mode normal mode event occurs. event charge current pulse into capacitor reaching reference voltage sync level. [18] fast mode will activated automatically, black level drops down half sync amplitude. [19] selected I2C-bus, alternatively used external control, activated AGCSW. this case, cannot used normal port function. [20] usable output SIF-AGC. match output signal different tuning systems current source output provided. test circuit given Figure steepness changed resistors mobile mode internal SIF-AGC switched AFC. this case disabled. [21] tolerance reference frequency determines accuracy VIF-AFC, demodulator center frequency maximum deviation. [22] intercarrier output signal SIOMAD calculated following formulae taking into account internal video signal with (p-p) reference: intc where:
correction term value, sound-to-picture carrier ratio pins VIF1 VIF2 correction term internal circuitry tolerance video output intercarrier output Vo(intc)(rms). [23] normal operation (with I2C-bus) load SIOMAD allowed. second module address (MAD2) will activated application resistor between SIOMAD ground. this MAD2 activated, also power-on setup state activates frequency 58.75 MHz. [24] input level (RMS); input level (RMS) unmodulated.
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
[25] Measured with deviation typical output voltage (RMS). output signal attenuated (RMS) I2C-bus. handling frequency deviation more than kHz, output signal reduced order avoid clipping (THD [26] lower limit audio bandwidth depends value capacitor AFD. value leads fAF(-3dB) leads fAF(-3dB) [27] measurements modulator meet following specifications: Incidental phase modulation black-to-white jump less than degrees. performance, measured with television demodulator AMF2 (audio output, weighted ratio) better than deviation kHz) sine wave black-to-white video modulation. Picture-to-sound carrier ratio PC/SC1 (transmitter). [28] Calculation loop filter parameters done approximately using following formulae:
BL-3dB fo(1.55 formulae only valid under following conditions: 5CP, where: steepness phase detector steepness loop resistor; series
capacitor; parallel capacitor; natural frequency PLL; BL-3dB loop bandwidth damping factor. examples, Table [29] PC/SC ratio calculated addition transmitter PC/SC1 ratio filter PC/SC1 ratio. This PC/SC ratio necessary achieve S/NW values noted. different PC/SC ratio will change these values. [30] Measurements taken with filter G1984 (Siemens) vision sound (sound shelf: dB). Picture-to-sound carrier ratio transmitter PC/SC Input level pins VIF1 VIF2 Vi(SIF) (RMS) sync level, deviation sound carrier, Measurements accordance with "ITU-R BS.468-4". De-emphasis [31] signal output SIOMAD analyzed test demodulator TDA9820. ratio this device more than related deviation kHz, accordance with "ITU-R BS.468-4". [32] Measurements taken with filter K3953 vision (suppressed sound carrier) K9453 sound (suppressed picture carrier). Input level Vi(SIF) (RMS), deviation). [33] Measurements taken with filter K9453 (Siemens) sound (suppressed picture carrier). [34] value determines accuracy resonance frequency crystal. depends type crystal used. [35] able operate 1-pin crystal oscillator input well external reference signal input, e.g. from tuning system. [36] lines will pulled down switched off. [37] characteristics accordance with I2C-bus specification fast mode (maximum clock frequency kHz). Information about I2C-bus found brochure "The I2C-bus (order number 9398 40011). [38] Port port open-collector outputs.
Table Table carrier carrier
Examples Table note Table (FM-PLL filter) (nF) Input frequencies carrier ratios Symbol standard fSC1 fSC2 38.9 33.4 33.158 standard 45.75 58.75 41.25 54.25 standard accent standard Unit 38.9 32.4 33.9 40.4 (pF)
BL-3dB (kHz)
Description
Picture-to-sound carrier ratio
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
(dBµV)
mhc576
(dB)
mhc112
RTOP
Vi(VIF) (dBµV)
Vi(VIF). Vi(SIF); true split sound mode.
Typical tuner takeover point function resistor RTOP
Typical signal-to-noise ratio function input voltage
13.2 13.2
BLUE
YELLOW
mha739
sound carrier, with respect sync level. chrominance carrier, with respect sync level. picture carrier, with respect sync level. sound carrier levels take into account sound shelf attenuation (SAW filter G1984M).
Input signal conditions
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
lock range without filter window VAFC -100 IAFC
IAFC (µA) -200
+100 +200 38.9 38.71 39.09 (MHz)
001aae454
TDA9884
(23)
VAFC
numbers TDA9884HN parentheses.
Typical analog characteristic
TDA9884
fripple
001aae455
Ripple rejection condition
trap bypass mode normal mode 2.72 3.41 3.20 zero carrier level white level
1.83
1.80
black level
1.20
sync level
mhc115
Typical video signal levels output CVBS (sound carrier off)
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
mhc116
VVAGC
TAGC (µA)
Vi(VIF) (dBµV)
VVAGC VIF-AGC voltage only measured controlled I2C-bus (see Table 18). ITAGC tuner current with RTOP setting I2C-bus ITAGC tuner current with RTOP setting I2C-bus ITAGC tuner current with RTOP setting I2C-bus
Typical tuner characteristic
mhc581
VSAGC
TAGC (µA)
Vi(SIF) (dBµV)
VSAGC SIF-AGC voltage mode only measured controlled I2C-bus (see Table 14). ITAGC tuner current true split sound mode with RTOP setting I2C-bus ITAGC tuner current true split sound mode with RTOP setting I2C-bus ITAGC tuner current true split sound mode with RTOP setting I2C-bus
Typical tuner characteristic
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
mhc118
S/NW
(dB)
PC/SC ratio gain controlled operation FM-PLL
Conditions: PC/SC ratio measured pins VIF1 VIF2; transformer; deviation; de-emphasis. Signal. Noise H-picture (weighted accordance with "ITU-R BS.468-4" quasi peak). Noise black picture (weighted accordance with "ITU-R BS.468-4" quasi peak).
Audio signal-to-noise ratio function picture-to-sound carrier ratio intercarrier mode
S/NW (dB)
mhc119
(dBµV)
Condition: Signal. Noise (weighted accordance with "ITU-R BS.468-4" quasi peak).
Typical audio signal-to-noise ratio function input signal standard
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
mhc120
10-2
10-1
(kHz)
CAGC
Typical total harmonic distortion function audio frequency standard
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
antenna input (dBµV)
001aae456
signals value video (p-p)
insertion loss
10-1
slip tuning gain control range VIF-AGC
10-2 (TOP)
10-3 0.66 10-3
insertion loss gain 10-4
10-5 0.66 10-5
VHF/UHF tuner tuner filter amplifier, demodulator video TDA9884
Depends TOP.
Front-end level diagram
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
H(s) (dB)
mhc122
minimum requirements
(MHz)
Typical amplitude response sound trap standard (including Korea)
group delay (ns)
mhb167
ideal characteristic pre-correction transmitter
minimum requirements
-100
(MHz)
Overall delay shown, here maximum ripple specified.
Typical group delay sound trap standard
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
H(s) (dB)
mhb168
minimum requirements
(MHz)
Typical amplitude response sound trap standard
group delay (ns)
mhb169
ideal characteristic pre-correction transmitter
minimum requirements
-100
(MHz)
Overall delay shown, here maximum ripple specified.
Typical group delay sound trap standard
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
mhc123
H(s) (dB)
minimum requirements
(MHz)
Typical amplitude response sound trap standard
mhb171
H(s) (dB)
minimum requirements
(MHz)
Typical amplitude response sound trap standard
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxx xxxxx
Product data sheet Rev. 2006
Koninklijke Philips Electronics N.V. 2006. rights reserved. TDA9884_2
Application information
Philips Semiconductors
port
BC847C BA277 BA277
CVBS output
fref
tuner
FILTER K9456
VIF-AGC(1)
SIF-AGC
CVAGC
BC847
BA277
SIF2 (27)
SIF1 (26)
(24)
(23)
(22)
VPLL (21)
AGND (20)
CVBS (18)
VAGC (17)
(16)
TAGC (15)
AGCSW (14)
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
(30) VIF1
(31) VIF2
FMPLL
DEEM
DGND
(10)
(11) SIOMAD
VIF/SIF
FILTER K3953
Cde-em
output FM-PLL filter external input positive supply 2C-bus controller
2C-bus
intercarrier output
001aae453
TDA9884
numbers TDA9884HN parentheses. Table note Table Table note Table Optional measures improve performance within TV-set application.
Application circuit
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxx xxxxx
Product data sheet Rev. 2006
Koninklijke Philips Electronics N.V. 2006. rights reserved. TDA9884_2
Test information
Philips Semiconductors
input
optional VIF-AGC
output
VIF-PLL filter(3)
CVBS output
external reference
tuner output
CVAGC
SIF2 (27)
SIF1 (26)
(24)
AFC(2) (23)
(22)
VPLL (21)
AGND (20)
CVBS (18)
VAGC (17)
(16)
TAGC (15)
AGCSW (14)
TDA9884
(30) VIF1 input
(31) VIF2
FMPLL
DEEM
DGND
(10)
(11) SIOMAD
I2C-bus controlled multistandard alignment-free IF-PLL
Cde-em
select
optional VIF-AGC input
FM-PLL filter
audio output
intercarrier output
001aae452
TDA9884
numbers TDA9884HN parentheses. Optional I2C-bus address selection; Table SIF-AGC monitor output AFC. Different loop filter comparison with application circuit different input characteristics (SAW filter transformer).
Test circuit
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
I2C-bus address selection[1] used 1000 011S 1001 011S 1000 010S 1001 010S
Table Option
used
selection bit.
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Package outline
SSOP24: plastic shrink small outline package; leads; body width SOT340-1
index detail
scale
DIMENSIONS original dimensions) UNIT max. 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 0.65 1.25 1.03 0.63 0.13
Note Plastic metal protrusions maximum side included. OUTLINE VERSION SOT340-1 REFERENCES JEDEC MO-150 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Package outline SOT340-1 (SSOP24)
TDA9884_2 Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
HVQFN32: plastic thermal enhanced very thin quad flat package; leads; terminals; body 0.85
SOT617-3
terminal index area
detail
terminal index area DIMENSIONS original dimensions) UNIT A(1) max. 0.05 0.00 0.30 0.18 3.75 3.45 3.75 3.45
scale
0.05
0.05
Note Plastic metal protrusions 0.075 maximum side included. OUTLINE VERSION SOT617-3 REFERENCES -JEDEC MO-220 JEITA -EUROPEAN PROJECTION ISSUE DATE 02-04-18 02-10-22
Package outline SOT617-3 (HVQFN32)
TDA9884_2 Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Soldering
15.1 Introduction soldering surface mount packages
This text gives very brief insight complex technology. more in-depth account soldering found Data Handbook IC26; Integrated Circuit Packages (document order number 9398 90011). There soldering method that ideal surface mount packages. Wave soldering still used certain surface mount ICs, suitable fine pitch SMDs. these situations reflow soldering recommended.
15.2 Reflow soldering
Reflow soldering requires solder paste suspension fine solder particles, flux binding agent) applied printed-circuit board screen printing, stencilling pressure-syringe dispensing before package placement. Driven legislation environmental forces worldwide lead-free solder pastes increasing. Several methods exist reflowing; example, convection convection/infrared heating conveyor type oven. Throughput times (preheating, soldering cooling) vary between seconds seconds depending heating method. Typical reflow peak temperatures range from depending solder paste material. top-surface temperature packages should preferably kept:
below (SnPb process) below (Pb-free process)
BGA, HTSSON.T SSOP.T packages packages with thickness packages with thickness volume called thick/large packages.
below (SnPb process) below (Pb-free process) packages with
thickness volume called small/thin packages. Moisture sensitivity precautions, indicated packing, must respected times.
15.3 Wave soldering
Conventional single wave soldering recommended surface mount devices (SMDs) printed-circuit boards with high component density, solder bridging non-wetting present major problems. overcome these problems double-wave soldering method specifically developed. wave soldering used following conditions must observed optimal results:
double-wave soldering method comprising turbulent wave with high upward
pressure followed smooth laminar wave.
packages with leads sides pitch (e):
larger than equal 1.27 footprint longitudinal axis preferred parallel transport direction printed-circuit board;
TDA9884_2 Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
smaller than 1.27 footprint longitudinal axis must parallel transport direction printed-circuit board. footprint must incorporate solder thieves downstream end.
packages with leads four sides, footprint must placed angle
transport direction printed-circuit board. footprint must incorporate solder thieves downstream side corners. During placement before soldering, package must fixed with droplet adhesive. adhesive applied screen printing, transfer syringe dispensing. package soldered after adhesive cured. Typical dwell time leads wave ranges from seconds seconds depending solder material applied, SnPb Pb-free respectively. mildly-activated flux will eliminate need removal corrosive residues most applications.
15.4 Manual soldering
component first soldering diagonally-opposite leads. voltage less) soldering iron applied flat part lead. Contact time must limited seconds When using dedicated tool, other leads soldered operation within seconds seconds between
15.5 Package related soldering information
Table Package[1] BGA, HTSSON.T[3], LBGA, LFBGA, SQFP, SSOP.T[3], TFBGA, VFBGA, XSON DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, PLCC[5], LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP CWQCCN.L[8], PMFP[9], WQCCN.L[8]
Suitability surface mount packages wave reflow soldering methods Soldering method Wave suitable suitable[4] Reflow[2] suitable suitable
suitable recommended[5][6] recommended[7]
suitable suitable suitable suitable
suitable
more detailed information packages refer (LF)BGA Application Note (AN01026); order copy from your Philips Semiconductors sales office. surface mount (SMD) packages moisture sensitive. Depending upon moisture content, maximum temperature (with respect time) body size package, there risk that internal external package cracks occur vaporization moisture them (the called popcorn effect). details, refer Drypack information Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These transparent plastic packages extremely sensitive reflow soldering conditions must account processed through more than soldering cycle subjected infrared reflow soldering with peak temperature exceeding measured atmosphere reflow oven. package body peak temperature must kept possible.
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
These packages suitable wave soldering. versions with heatsink bottom side, solder cannot penetrate between printed-circuit board heatsink. versions with heatsink side, solder might deposited heatsink surface. wave soldering considered, then package must placed angle solder wave direction. package footprint must incorporate solder thieves downstream side corners. Wave soldering suitable LQFP, TQFP packages with pitch larger than definitely suitable packages with pitch equal smaller than 0.65 Wave soldering suitable SSOP, TSSOP, VSSOP packages with pitch equal larger than 0.65 definitely suitable packages with pitch equal smaller than Image sensor packages principle should soldered. They mounted sockets delivered pre-mounted flex foil. However, image sensor package mounted client flex foil using soldering process. appropriate soldering profile provided request. soldering manual soldering suitable PMFP packages.
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Abbreviations
Table Acronym FPLL NTSC SECAM Abbreviations Description Automatic Frequency Control Automatic Gain Control Frequency Phase-Locked Loop Module Address National Television Standards Committee Phase Alternating Line Phase-Locked Loop Quasi Split Sound Sequentiel Couleur avec Memoire Sound Intermediate Frequency TakeOver Point Voltage-Controlled Oscillator Vision Intermediate Frequency Vestigial Side Band
Revision history
Table Revision history Release date 20060512 Data sheet status Product data sheet Change notice Supersedes TDA9884TS_1 Document TDA9884_2 Modifications:
format this data sheet been redesigned comply with presentation information standard Philips Semiconductors Added type number TDA9884HN Table inserted value tresp, fast step, mobile mode, increasing Product specification
TDA9884TS_1
20031128
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Legal information
18.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
Product status[3] Development Qualification Production
Definition This document contains data from objective specification product development. This document contains data from preliminary specification. This document contains product specification.
Please consult most recently issued document before initiating completing design. term `short data sheet' explained section "Definitions". product status device(s) described this document have changed since this document published differ case multiple devices. latest product status information available Internet
18.2 Definitions
Draft document draft version only. content still under internal review subject formal approval, which result modifications additions. Philips Semiconductors does give representations warranties accuracy completeness information included herein shall have liability consequences such information. Short data sheet short data sheet extract from full data sheet with same product type number(s) title. short data sheet intended quick reference only should relied upon contain detailed full information. detailed full information relevant full data sheet, which available request local Philips Semiconductors sales office. case inconsistency conflict with short data sheet, full data sheet shall prevail.
result personal injury, death severe property environmental damage. Philips Semiconductors accepts liability inclusion and/or Philips Semiconductors products such equipment applications therefore such inclusion and/or customer's risk. Applications Applications that described herein these products illustrative purposes only. Philips Semiconductors makes representation warranty that such applications will suitable specified without further testing modification. Limiting values Stress above more limiting values defined Absolute Maximum Ratings System 60134) cause permanent damage device. Limiting values stress ratings only operation device these other conditions above those given Characteristics sections this document implied. Exposure limiting values extended periods affect device reliability. Terms conditions sale Philips Semiconductors products sold subject general terms conditions commercial sale, published including those pertaining warranty, intellectual property rights infringement limitation liability, unless explicitly otherwise agreed writing Philips Semiconductors. case inconsistency conflict between information this document such terms conditions, latter will prevail. offer sell license Nothing this document interpreted construed offer sell products that open acceptance grant, conveyance implication license under copyrights, patents other industrial intellectual property rights.
18.3 Disclaimers
General Information this document believed accurate reliable. However, Philips Semiconductors does give representations warranties, expressed implied, accuracy completeness such information shall have liability consequences such information. Right make changes Philips Semiconductors reserves right make changes information published this document, including without limitation specifications product descriptions, time without notice. This document supersedes replaces information supplied prior publication hereof. Suitability Philips Semiconductors products designed, authorized warranted suitable medical, military, aircraft, space life support equipment, applications where failure malfunction Philips Semiconductors product reasonably expected
18.4 Trademarks
Notice: referenced brands, product names, service names trademarks property their respective owners. I2C-bus logo trademark Koninklijke Philips Electronics N.V.
Contact information
additional information, please visit: sales office addresses, send email
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Notes
TDA9884_2
Koninklijke Philips Electronics N.V. 2006. rights reserved.
Product data sheet
Rev. 2006
Philips Semiconductors
TDA9884
I2C-bus controlled multistandard alignment-free IF-PLL
Contents
7.10 7.11 7.12 7.13 7.14 7.15 7.16 8.1.1 8.1.2 8.2.1 8.2.2 8.2.3 8.2.4 15.1 15.2 15.3 General description Features Quick reference data Ordering information Block diagram Pinning information Pinning description Functional description amplifier Tuner VIF-AGC VIF-AGC detector FPLL detector divider digital acquisition help Video demodulator amplifier Sound carrier trap amplifier SIF-AGC detector Single reference mixer demodulator demodulator acquisition help. Audio amplifier mute time constant Internal voltage stabilizer I2C-bus transceiver module address 2C-bus control Read format Slave address Data byte Write format Subaddress. Data byte switching mode Data byte adjust mode. Data byte data mode Limiting values. Thermal characteristics. Characteristics Application information. Test information Package outline Soldering Introduction soldering surface mount packages Reflow soldering Wave soldering 15.4 15.5 18.1 18.2 18.3 18.4 Manual soldering Package related soldering information Abbreviations Revision history Legal information Data sheet status Definitions Disclaimers. Trademarks Contact information Contents.
Please aware that important notices concerning this document product(s) described herein, have been included section `Legal information'.
Koninklijke Philips Electronics N.V. 2006.
rights reserved.
more information, please visit: sales office addresses, email Date release: 2006 Document identifier: TDA9884_2
Other recent searches
SPS-9130VG - SPS-9130VG SPS-9130VG Datasheet
SPE0512 - SPE0512 SPE0512 Datasheet
SMCJ170CA - SMCJ170CA SMCJ170CA Datasheet
LH543620 - LH543620 LH543620 Datasheet
HER101 - HER101 HER101 Datasheet
HER108 - HER108 HER108 Datasheet
FYS-18012AX - FYS-18012AX FYS-18012AX Datasheet
BX-XX - BX-XX BX-XX Datasheet
EFM-250D - EFM-250D EFM-250D Datasheet
DX-115APGP - DX-115APGP DX-115APGP Datasheet
DX-1151GP - DX-1151GP DX-1151GP Datasheet
1N4933 - 1N4933 1N4933 Datasheet
1N4937 - 1N4937 1N4937 Datasheet
Privacy Policy | Disclaimer
© 2013 Datasheets.org.uk