TAS5010-5112F2EVM TAS5112ADFD TAS5001
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TAS5010-5112F2EVM PurePath Digitalt customer evaluation module demonstrates integrated circuits, TAS5010 TAS5112ADFD from Texas Instruments. TAS5010 high performance 24-bit stereo digital modulator based Equibitt technology. This converts input serial digital audio data pulse width modulated (PWM) audio data stream. TAS5010 modulator accepts data with sample rate kHz. TAS5010 designed implementation together with TAS5112ADFD digital output stage driving loudspeakers stereo application. TAS5010 compatible with TAS5001 PCM-PWM modulator. maximum sample rate TAS5001 kHz. Together, TAS5010 TAS5112ADFD provide complete PurePath Digitalt conversion 3.3-V digital audio input stream 2x50 into loudspeakers. chipset ideal applications requiring excellent audio quality, minimum size weight, high power efficiency. chipset used range products such micro-components systems, home theater box, receivers, sets. TAS5010-5112F2EVM complete true digital amplifier including S/DIF receiver, audio interface, volume control, interface personal computer through parallel port, required control logic. amplifier reference design surrounded white line PCB.
Topic
Page
TAS5010-5112F2EVM Features
TAS5010-5112F2EVM Features
TAS5010-5112F2EVM Features
PurePath Digital reference design (double-sided plated-through
layout)
S/PDIF receiver with coaxial optical input (sampling rate
kHz)
audio interface (sampling rate: kHz) On-board volume control Auto-mute function Self-contained short circuit temperature protection system Digital audio processor (DAP), which include 24-bit volume control, digital
gain, bass treble control, parametric equalization, dedicated speaker equalization, loudness control, adjustable dynamic range compression/expansion.
control through software (DCT software from Texas Instruments) Default settings downloaded EEPROM with
software
Analog line input (use internal analog-to-digital converter DAP) Analog line output (use internal digital-to-analog converter DAP)
Figure 1-1. Simplified TAS5010-5112F2EVM Block Diagram
SOFTWARE PARRALLEL PORT INTERFACE ANALOG INPUT ANALOG OUTPUT OPTICAL INPUT COAXIAL INPUT TAS3002 DIGITAL AUDIO PROCESSOR TAS5112ADFD DIGITAL AUDIO POWER OUTPUT STAGE VOLUME CONTROL
DIR1703 S/PDIF RECEIVER
TAS5010 DIGITAL AUDIO PROCESSOR
INPUT
INTERFACE
DIR1703 from Texas Instruments/Burr-Brown used S/PDIF receiver system clock generator. This product digital audio interface receiver (DIR) that receives decodes audio data 96-kHz sampling rate. DIR1703 running configuration where automatically switches between mode crystal mode. When DIR1703 connected active digital source, running PLL-mode. system clock (SCKO) frequency depends incoming sampling rate (fs): SCKO When digital source represented, DIR1703 switches crystal mode. system clock frequency crystal mode depends external crystal connected DIR1703 receiver. TAS5010-5112F2EVM board, crystal-mode system clock 12.288 MHz. Crystal-mode operation used generate fixed clock when TAS5010-5112F2EVM board connected analog source. external anti-aliasing filter converter optimized 48-kHz sampling rates.
TAS5010-5112F2EVM Features
TAS3002 from Texas Instruments used digital audio processor (DAP). features controlled through interface. Adjustment sound level executed through with push buttons board. During power TAS3002 settings coefficients loaded from external serial EEPROM. TAS3002 coefficients control features DAP. Customized start settings downloaded EEPROM. This operation easy execute with personal computer, software, cable between TAS5010-5112F2EVM computer. TAS5010-5112F2EVM connected port computer.
Chapter
Detailed Description
This chapter describes TAS5010-5112F2EVM board regards board layout, jumpers, switches, buttons, connectors.
Topic
Page
Board Overview Description Jumper Settings Default Jumper Positioins Description Connectors Description Switches Buttons Description Indicators
Detailed Description
Board Overview
Board Overview
Figure 2-1. Board Outline With Connectors, Switches, Jumpers, Indicators
Connector S/PDIF Digital Audio Coaxial/RCA Input J600
Coaxial JMP130 JMP120
J100 S620
Optical
S/PDIF Digital Audio Optical/Toslink Input A/D-Converter Output D/A-Converter Input
S240
SAMPLE RATE CONTROL
J101
J541 J170 J160 MUTE
BYPASS DIGITAL AUDIO PROCESSOR Interface
*****
EQUALIZER ENABLE
ENABLE
DISABLE
BYPASSED
J400
LED223
LED222
LED221
Connector
J300 S341 S340
LED220
J581
TEMPERATURE WARNING
POWER
S/PDIF
Volume Control
PROTECTION MODE
Note: Indicates default jumper posistions.
physical structure TAS5010-5112F2EVM illustrated Figure 2-2. Block headings refer page headings TAS5010-5112F2EVM schematic.
Figure 2-2. Physical Structure TAS5010-5112F2EVM
POWER SUPPPLY SECTION AUDIO INPUT SECTION
CONTROL SECTION TAS5010 TAS5112ADFD REFERENCE DESIGN MODULATOR SECTION OUTPUT STAGE SECTION
DIGITAL AUDIO PROCESSOR SECTION
Speaker Right
ACTIVE JMP360
J580
Speaker Left
Switch between Optical Coaxial input
J540
S/PDIF ERROR ENABLE
RESET
Description Jumper Settings
Description Jumper Settings
There three jumpers board (J400 interface)
2.2.1
Double-Speed Control (JMP120)
JMP120 used double-speed TAS5010 (DBSPD, 39). TAS5010 operating single-speed mode DBSPD asserted double-speed asserted high. Single-speed required sampling rate kHz, 44.1 kHz, kHz, double-speed 88-kHz 96-kHz sampling rate. S/PDIF receiver automatically controls DBSPD JMP120 shunts (default setting). JMP120 shunts TAS5010 single-speed mode. JMP120 shunts TAS5010 double speed mode.
2.2.2
Enable/Disable S/PDIF-MUTE (JMP130)
JMP130 used disable S/PDIF-MUTE signal (S/PDIF-MUTE (DIR1703-UNLOCK DIR1703-ADFLG)). DIR1703-UNLOCK signal high until DIR1703 detects locks incoming digital signal. ADFLG signal high when S/PDIF data does include audio signal. S/PDIF-MUTE signal used shutdown output stage (the H-bridge stop switching). obtain click reduced shutdown necessary mute output stage before Reset TAS5010 asserted low. When board connected analog source digital source through interface, necessary disable UNLOCK warning. This done with JMP130 jumper. When JMP130 shunts UNLOCK warning enabled (default setting). warning signal disabled JMP130 shunts
2.2.3
Bypassing Equalizer Functions Digital Audio Processor (JMP360)
JMP360 used disable equalizer function DAP. equalizer function enabled JMP360 shunts equalizer disabled when JMP360 shunts Note: Bass treble flat when equalizer bypassed.
Detailed Description
Default Jumper Positioins
Default Jumper Positioins
Default jumper positions marked with grey rectangle Figure 2-3.
Figure 2-3. Default Jumper Positions
J600 J100 J540 JMP130 JMP120 J101 J541 J170 J160 J580 JMP360
J300
J581
Description Connectors
2.4.1 S/PDIF Digital Audio Coaxial/RCA Input (J100)
connector connected digital S/PDIF source through coaxial cable with characteristic impedance (e.g., RG59 cable). highest sampling rate supported this input kHz.
2.4.2
S/PDIF Optical (J101)
Toslink connector connected digital S/PDIF signal through optical cable. highest sampling rate supported this input kHz.
2.4.3
Analog input (J160) Analog Output (J170)
Analog sources connected converter through J160. analog line input optimized input signal with maximum voltage VRMS. Analog output from digital audio processor available P170. Maximum output level VRMS. numbers J170 equal numbers J160
Figure 2-4. Numbers Line Input/Output Connector (Top View)
Description Connectors
Table 2-1. Description J160 J170
Description Analog Input Connector (J160) Left Channel Input Ground Right Channel Input
Analog Output Connector (J170) Left Channel output Ground Right Channel Output
2.4.4
Interface (J300)
interface using attached special cable parallel/printer port This makes possible control TAS3002 digital audio processor totally from using special software saved PurePath Digitalt amplifier CD-ROM. interface also used control TAS3002 from external microcontroller your choice.
Figure 2-5. Numbers Parallel Port/I Interface/I (J300)
Table 2-2. Description J300
Description Power Reset Serial Data Line (SDA) Serial Clock Line (SCL) Serial Data Line Serial Clock Line Reserved Serial Data Line Serial Clock Line Name Schematic POWER-ON-RESET SDA-BI SCL-BI SDA-IN SCL-OUT future SDA-OUT SCL-IN
(SDA) (SCL) used communication between external micro-controller digital audio processor.
Detailed Description
Description Connectors
2.4.5
Loudspeaker Connectors (J540, J541, J580, J581)
speaker connectors accept standard plugs. high quality plugs speaker cable recommended.
Table 2-3. Description Loudspeaker Connectors
Reference Designator J540 J541 J580 J581 Description Left speaker positive output terminal Left speaker negative output terminal Right speaker positive output terminal Right speaker negative output terminal
Caution Both positive negative speaker outputs floating connected ground (f.ex. through oscilloscope).
2.4.6
Power Supply Connector
Figure 2-6. Numbers Connector (Top View)
Table 2-4. Description Connector
Description Supply voltage output stage (VHBR) Supply voltage control gate drive (V+) Ground Ground Name Schematic POWER-OUTPUT-STAGE
Description Switches Buttons
Description Switches Buttons
2.5.1 S/PDIF Input Selector Switch (S100)
S100 switches between optical coaxial S/PDIF input. When lever pressed direction J101, optical S/PDIF input selected. When lever pressed direction J100, coaxial S/PDIF input selected.
2.5.2
Bypass Digital Audio Processor Switch (S320)
When lever pressed direction S341, bypassed. When lever pressed direction U360 (TAS3002), signal path. Below S320 label (DAP ON), which indicates position lever inserted signal path. Warning
Bypassing equal maximum output power (attenuation dB). This might loud could possible damage your loudspeaker hearing.
2.5.3
Reset Board Button (S620)
This master RESET board. While this button held down, DIR1703, TAS3002, TAS5010, TAS5112ADFD held RESET latching errors cleared. Note that while RESET button held down, S/PDIF lights even valid S/PDIF input signal present, because DIR1703 S/PDIF receiver held RESET.
2.5.4
Mute Button (S240)
output stage muted (not switching) while this button held down unmutes when released.
2.5.5
Volume Control (S340 S341)
S341 S340: Volume control TAS3002 DAP. Press hold S341 button decrease output power level. Press hold S340 button increase output power level. Note: Change listening level slow. takes approximately seconds change attenuation from TAS3002 device implements soft volume control. This feature allows change from volume level another over entire range volume control (+18 mute). Above there risk signal clipping. Distortion output signals result signal clipping. Note: Significant signal clipping might result activation overcurrent protection system.
Detailed Description
Description Indicators
Description Indicators
2.6.1 Power (LED223)
green indicates that TAS5010-5112F2EVM board powered control circuitry
2.6.2
S/PDIF Input (LED222)
yellow indicates that S/PDIF input signal missing does contain valid audio data. Reasons have S/PDIF warning:
lever S/PDIF input selector switch (S100) placed wrong
position.
S/PDIF signal missing. Some players remove S/PDIF
output signal when drawer opened. Note: When SPDIF-MUTE signal from S/PDIF receiver disabled (JMP130 shunting S/PDIF indication disabled.
2.6.3
Temperature Warning (LED221)
yellow indicates that temperature TAS5112ADFD junction reached warning level. This step two-step thermal protection system implemented TAS5112ADFD device. temperature warning indication only; operation system unchanged. temperature increases further above shutdown level, error latch system goes into RESET mode. this point, Protection Mode will well Temperature Warning LED.
2.6.4
Protection Mode (LED220)
indicates that protection circuit engaged output stage shutdown mode. Possible causes shutdown mode:
speaker terminals shorted amplifier constantly overloaded (decrease volume level). speaker terminal shorted ground (f.ex. through oscilloscope) output stage thermal shutdown overload.
Check setup board carefully remove cause failure before pressing RESET (S620) disengage protection mode.
Chapter
Board Operation
This chapter describes TAS5010-5112F2EVM board operation.
Topic
Page
Power Supply Setup TAS5010-5112F2EVM With S/PDIF Input Setup TAS5010-5112F2EVM With Analog Line Input Interfacing Analog Line Output Controlling With Software
Board Operation
Power Supply
Power Supply
TAS5010-5112F2EVM powered from external power supplies. High-end audio performance requires stabilized power supply with ripple voltage output impedance. Note: length power supply cable must minimized. Increasing length cable equal increasing distortion amplifier high output levels frequencies.
3.1.1
Power Power Supply
single power supply connected TAS5010-5112F2EVM board. Short VHBR power cable (red white plugs). Voltage connected power supply allowed below maximum supply voltage depends speaker load resistance. Check recommended maximum supply voltage TAS5112ADFD data sheet (SLES094).
Table 3-1. Maximum Supply Voltage (Single Supply)
RLOAD Supply voltage (VHBR 29.5
3.1.2
Power With Power Supplies
When supplies power TAS5010-5112F2EVM, possible adjust output power with level voltage VHBR (pin J640). minimum VHBR voltage maximum voltage depends load resistance. Check recommended maximum supply voltage TAS5112ADFD data sheet (SLES094).
Table 3-2. Maximum H-bridge Voltage Load Impedance
RLOAD
Maximum VHBR voltage voltage
29.5
Figure 3-1. Recommended Power-Up Power-Down Sequence
VHBR
Setup TAS5010-5112F2EVM With S/PDIF Input
Setup TAS5010-5112F2EVM With S/PDIF Input
Connect board shown Figure 3-2. Select between coaxial optical input signal input selector switch (S100). Press lever S320 direction U360 TAS3002 wanted signal path (recommended during normal listening tests). There attenuation bypassed. signal path, start-up volume level depends what programmed serial EEPROM board. default startup volume level initially programmed below full scale, which some speakers still might loud. default volume level changed with software following conditions standard setup: jumpers default position. Speakers, power supply, required cable communication initially connected board. TAS5010-5112F2EVM powered with either power supplies (see Power Supply section). Power supplies initially switched OFF. Music player initially switched OFF. connection optional.
Figure 3-2. Board Connected S/PDIF Sources Personal Computer
Power Supply Power Supply
S/PDIF Coaxial/RCA cable
Connector J100
Coaxial
J600 S620
JMP120 S/PDIF ERROR ENABLE
VHBR
J540 GREEN
S100
Switch between Optical Coaxial input S/PDIF Optical/Toslink cable
JMP130
RESET SAMPLE RATE CONTROL
Optical
S240 MUTE
J101
J541 BLUE
J170 J160
SPEAKER LEFT
BYPASS DIGITAL AUDIO PROCESSOR Interface
*****
J580 GREEN
EQUALIZER ENABLE
ENABLE
S320
DISABLE
JMP360
ACTIVE
LED223
LED222
LED221
BYPASSED
LED220
J400
J300 Attached cable Interface (LPT Port) with software control: Volume Bass, Treble Loudness Equalizer Loudness S341 S340
J581 BLUE
SPEAKER RIGHT
VOLUME CONTROL
POWER S/PDIF
Note: Indicates default jumper posistions.
TEMPERATURE WARNING PROTECTION MODE
Board Operation
Setup TAS5010-5112F2EVM With Analog Line Input
3.2.1
Start-up Sequence
Turn power supply/supplies. Follow power-up power-down sequence described Power Supply section. Observe that green Power yellow S/PDIF lit. software from desktop activated (S320) attached cable connected from J300 Turn CD/DVD player play test Observe that yellow S/PDIF OFF. Observe that digital audio coming from left right speakers.
Setup TAS5010-5112F2EVM With Analog Line Input
Disable UNLOCK warning from S/PDIF receiver (JMP130: shunts
Connect TAS5010-5112F2EVM board with attached cable Connect analog source analog input (J160) Power TAS5010-5112F2EVM board Enable TAS3002 analog input with software Disable TAS3002 digital input (both SDIN1 SDIN2) with
software
TAS5010-5112F2EVM board ready play with analog source
Interfacing Analog Line Output
default analog line output (J170) active. analog line output connected analog tape recorders analog amplifiers (e.g., subwoofer).
Controlling With Software
Operating instructions software described Digital Audio Processor (DAP) Configuration Tool Operating Instruction user's guide, which located PurePath Digitalt Amplifier CD-ROM.
Chapter
Hints Measurement Performance
Read Digital Audio Measurements application note (SLAA114) introduction measurements true digital audio amplifiers. welcome audio precision test files available PurePath Digital amplifier CD-ROM. Note that AES17 filter required reach shown measurements. Specifications AES17 filter described Standard Method Digital Audio Engineering Measurement Digital Audio Equipment (the AES17 standard available from Audio Engineering Society www.aes.org). When evaluating performance digital amplifier section, bypass digital audio processor with S320 adjust settings neutral attenuation Connect TAS5010-5112F2EVM regulated power supply with short cable. length cable must exceed meters.
Hints Measurement Performance
IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. Customers responsible their products applications using components. minimize risks associated with customer products applications, customers should provide adequate design operating safeguards. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right relating combination, machine, process which products services used. Information published regarding third-party products services does constitute license from such products services warranty endorsement thereof. such information require license from third party under patents other intellectual property third party, license from under patents other intellectual property Reproduction information data books data sheets permissible only reproduction without alteration accompanied associated warranties, conditions, limitations, notices. Reproduction this information with alteration unfair deceptive business practice. responsible liable such altered documentation. Resale products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service unfair deceptive business practice. responsible liable such statements. Following URLs where obtain information other Texas Instruments products application solutions: Products Amplifiers Data Converters Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video Imaging Wireless Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265 Copyright 2004, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless
IMPORTANT NOTICE Texas Instruments (TI) provides enclosed product(s) under following conditions: This evaluation being sold intended ENGINEERING DEVELOPMENT EVALUATION PURPOSES ONLY considered commercial use. such, goods being provided complete terms required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found product incorporating goods. prototype, this product does fall within scope European Union directive electromagnetic compatibility therefore meet technical requirements directive. Should this evaluation meet specifications indicated User's Guide, returned within days from date delivery full refund. FOREGOING WARRANTY EXCLUSIVE WARRANTY MADE SELLER BUYER LIEU OTHER WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, INCLUDING WARRANTY MERCHANTABILITY FITNESS PARTICULAR PURPOSE. user assumes responsibility liability proper safe handling goods. Further, user indemnifies from claims arising from handling goods. Please aware that products received regulatory compliant agency certified (FCC, etc.). open construction product, user's responsibility take appropriate precautions with regard electrostatic discharge. EXCEPT EXTENT INDEMNITY FORTH ABOVE, NEITHER PARTY SHALL LIABLE OTHER INDIRECT, SPECIAL, INCIDENTAL, CONSEQUENTIAL DAMAGES. currently deals with variety customers products, therefore arrangement with user exclusive. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. Please read User's Guide and, specifically, Warnings Restrictions notice User's Guide prior handling product. This notice contains important safety information about temperatures voltages. further safety concerns, please contact application engineer. Persons handling product must have electronics training observe good laboratory practice standards. license granted under patent right other intellectual property right covering relating machine, process, combination which such products services might used.
Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated
WARNINGS RESTRICTIONS important operate this within input voltage range 29.5 output stage system supply. Exceeding specified input range cause unexpected operation and/or irreversible damage EVM. there questions concerning input range, please contact field representative prior connecting input power. Applying loads outside specified output range result unintended operation and/or possible permanent damage EVM. Please consult User's Guide prior connecting load output. there uncertainty load specification, please contact field representative. During normal operation, some circuit components have case temperatures greater than 60°C. designed operate properly with certain components above 60°C long input output ranges maintained. These components include limited linear regulators, switching transistors, pass transistors, current sense resistors. These types devices identified using schematic located User's Guide. When placing measurement probes near these devices during operation, please aware that these devices very warm touch. Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated
Information About Cautions Warnings
Preface
Read This First
About This Manual
This manual describes operation TAS5010-5112F2EVM evaluation module from Texas Instruments.
This Manual
This document contains following chapters:
Chapter Overview Chapter Detailed Description Board Chapter Board Operation Chapter Hints Measurements Performance
Information About Cautions Warnings
This book contain cautions warnings.
This example caution statement. caution statement describes situation that could potentially damage your software equipment.
This example warning statement. warning statement describes situation that could potentially cause harm you.
Trademarks
information caution warning provided your protection. Please read each caution warning carefully.
Related Documentation From Texas Instruments
following table contains list data manuals that have detailed descriptions integrated circuits used design TAS5010-5112F2EVM. data manuals obtained http://www.ti.com.
Part Number TAS5010PFB TAS5112ADFD TAS3002PFB DIR1703E LMV331IDBVR TPS3705-33DGN SN74LVC2GU04DBVR SN74LVC2G14DBVR SN74LVC2G08DCTR SN74LVC1G02DBVR SN74LVC1G32DBVR SN74LV21APWR Literature Number SLAS328 SLES094 SLAS307 SLES007 SLCS136 SLVS184 SCES197 SCES200 SCES198 SCES213 SCES219 SCES340
Additional TAS5010-5112F2EVM Documentation
Software User's Guide Controlling TAS3002 TAS5010-5112F2EVM Application Report (SLEA036) Data Manuals
Warning
This equipment intended laboratory test environment only. generates, uses, radiate radio frequency energy been tested compliance with limits computing devices pursuant subpart part rules, which designed provide reasonable protection against radio frequency interference. Operation this equipment other environments cause interference with radio communications, which case user expense will required take whatever measures required correct this interference.
Trademarks
Equibit PurePath Digital trademarks Texas Instruments.
Contents
Contents
Introduction TAS5010-5112F2EVM Features Detailed Description Board Overview Description Jumper Settings 2.2.1 Double-Speed Control (JMP120) 2.2.2 Enable/Disable S/PDIF-MUTE (JMP130) 2.2.3 Bypassing Equalizer Functions Digital Audio Processor (JMP360) Default Jumper Positioins Description Connectors 2.4.1 S/PDIF Digital Audio Coaxial/RCA Input (J100) 2.4.2 S/PDIF Optical (J101) 2.4.3 Analog input (J160) Analog Output (J170) 2.4.4 Interface (J300) 2.4.5 Loudspeaker Connectors (J540, J541, J580, J581) 2.4.6 Power Supply Connector Description Switches Buttons 2.5.1 S/PDIF Input Selector Switch (S100) 2.5.2 Bypass Digital Audio Processor Switch (S320) 2.5.3 Reset Board Button (S620) 2.5.4 Mute Button (S240) 2.5.5 Volume Control (S340 S341) Description Indicators 2.6.1 Power (LED223) 2.6.2 S/PDIF Input (LED222) 2.6.3 Temperature Warning (LED221) 2.6.4 Protection Mode (LED220) Board Operation Power Supply 3.1.1 Power Power Supply 3.1.2 Power With Power Supplies Setup TAS5010-5112F2EVM With S/PDIF Input 3.2.1 Start-up Sequence Setup TAS5010-5112F2EVM With Analog Line Input Interfacing Analog Line Output Controlling With Software
Hints Measurement Performance
Contents
Figures
Simplified TAS5010-5112F2EVM Block Diagram Board Outline With Connectors, Switches, Jumpers, Indicators Physical Structure TAS5010-5112F2EVM Default Jumper Positions Numbers Line Input/Output Connector (Top View) Numbers Parallel Port/I2C Interface/I2C (J300) Numbers Connector (Top View) Recommended Power-Up Power-Down Sequence Board Connected S/PDIF Sources Personal Computer
Tables
Description J160 J170 Description J300 Description Loudspeaker Connectors Description Connector Maximum Supply Voltage (Single Supply) Maximum H-bridge Voltage Load Impedance
Evaluation Module TAS5010 Digital Audio Processor TAS5112ADFD Digital Audio Power Output Stage
TAS5010-5112F2EVM
User's Guide
June 2004
Digital Audio/Speaker
SLEU056
IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. Customers responsible their products applications using components. minimize risks associated with customer products applications, customers should provide adequate design operating safeguards. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right relating combination, machine, process which products services used. Information published regarding third-party products services does constitute license from such products services warranty endorsement thereof. such information require license from third party under patents other intellectual property third party, license from under patents other intellectual property Reproduction information data books data sheets permissible only reproduction without alteration accompanied associated warranties, conditions, limitations, notices. Reproduction this information with alteration unfair deceptive business practice. responsible liable such altered documentation. Resale products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service unfair deceptive business practice. responsible liable such statements. Following URLs where obtain information other Texas Instruments products application solutions: Products Amplifiers Data Converters Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video Imaging Wireless Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265 Copyright 2004, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless
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