SRAM edac datasheets and application notes, data sheet, circuit, pdf, cross reference, pinout, datasheet

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	1 - 50 of about 307 for SRAM edac
First line: SRAM edac Simulating Events EDAC Actel RTAX-S Field Programmable Gate Array (FPGA) provides embedded user static addition single-event-upset (SEU)-enhanced logic, including embedded triple-module redundancy (TMR) registers. embedded user SRAM coupled with error detection correction (EDAC) core, incl Abstract: .. The embedded user SRAM coupled with the error detection and correction EDAC core, included in the Actel SmartGen core generator, provides mitigation of soft errors within the SRAM blocks .. Tags: SRAM edac sram 2114 RTAX-S edac 2114 static ram 2114 SRAM AC304	1727.04 Kb	15 Pages	Original

First line: TM5005* orbit 32 16MB SRAM TM5004 SRAM edac SPACE PRODUCTS 16Mb SRAM Abstract: .. FEATURES: • 8, 16, or 32 bit addressable • Four 512k x 8 SRAM architecture • 8/16/32 bit EDAC • RAD-PAK® radiation-hardened against natural space radiation • Total dose hardness > 100 krad Si ; dependent .. Tags: orbit 32 TM5005* TM5004 SRAM edac SRAM Space Electronics Random Access Memory radiation edac 16MB SRAM datasheet abstract..	160.1 Kb	1 Pages	Original

First line: SRAM edac vhdl code hamming edac memory verilog code hamming vhdl code hamming ecc vhdl code hamming Using EDAC RadTolerant RTAX-S FPGAs Axcelerator FPGAs Applies EDAC Core from Libero v7.1 Older Introduction Actel's newest designed-for-space Field Programmable Gate Array (FPGA) family, RTAX-S, high Abstract: .. FPGAs Applies to EDAC Core from Libero IDE v7.1 or Older. Introduction Actel's newest designed .. in the SRAM is insensitive to single bit changes, such as an image comprising millions of pixels .. Tags: vhdl code hamming ecc verilog code hamming vhdl code hamming edac memory SRAM edac vhdl code hamming vhdl code for 9 bit parity generator source code verilog for matrix transformation RDS ENCODER RAM 2114 error correction, verilog source edac 2114 static ram 2114 ram 2114 1kx4 AC273	239.61 Kb	17 Pages	Original

First line: verilog hdl code for parity generator SRAM edac� verilog code hamming vhdl code hamming SRAM edac Using EDAC RadTolerant RTAX-S/SL Axcelerator® FPGAs Applies EDAC Core from Libero v7.2 Newer Introduction newest Actel designed-for-space field programmable gate array (FPGA) family, RTAX-S/SL, high Abstract: .. standard SRAM circuits and an error detection and correction EDAC intellectual property IP core. The core is accessed via the Actel SmartGen Macro Builder software and implements a class .. Tags: SRAM edac vhdl code hamming verilog code hamming SRAM edacÂ verilog hdl code for parity generator vhdl code parity vhdl code for 9 bit parity generator source code verilog for park transformation source code verilog for matrix transformation ac319 AC319	672.15 Kb	23 Pages	Original

First line: 125-cd8 123-GND SRAM edac edac 90 pin SPACE PRODUCTS 8/16/32 SRAM EDAC Abstract: .. 8/16/32 BIT SRAM EDAC. 49S32DRP. ©1999 Space Electronics Inc.All rights reserved. 0901.99Rev0. FEATURES: • Operates as 8, 16, or 32 bit EDAC • No single event latchup > 100 MeV/mg/cm2 • Single event .. Tags: edac 90 pin 123-GND 125-cd8 SRAM edac MC12 cd18* datasheet abstract..	310.48 Kb	8 Pages	Original

First line: 31750 ANM052 Radiation Tolerant SRAM SPACE Applications purpose this document analyze selection criteria memory chips used Spacecraft computers. general trend implement more autonomous functions Spacecraft, making increased processor performances, requiring larger embedded flight software sizes larg Abstract: .. 4 DSP 56001+local RAM+ Program memory + 11 Megabytes SRAM. RGS DATA UNIT. MA 31750 48 Kword ROM 128 .. HW watchdog protection by EDAC of programme and data area is recommended. AOCS processor. Highly .. Tags: mmu ericsson 65664* atmel 2816 memory SRAM edac ORBIT SEMICONDUCTOR MA31751 MA31750 edac dsp radiation hard datasheet dsp radiation hard dsp "radiation hard" ASIC, 1750 68000 mmu 65656F ANM052	76.07 Kb	19 Pages	Original

First line: ANM052 Radiation Tolerant SRAM SPACE Applications purpose this document analyze selection criteria memory chips used Spacecraft computers. general trend implement more autonomous functions Spacecraft, making increased processor performances, requiring larger embedded flight software sizes larger sto Abstract: .. 56001+local RAM+ Program memory + 11 Megabytes SRAM. RGS DA. TA UNIT. MA 31750 48 Kword ROM 128 Kword .. Protection by EDAC of programme code area is recommended. Payload processor. Not critical .. Tags: microcontroller radiation hard datasheet mhs 80C32 MA31751 MA31750 processor architecture dsp radiation hard datasheet dsp radiation hard dsp "radiation hard" 56001 motorola ANM052	268.52 Kb	19 Pages	Original

First line: 80486DX2 computer motherboard circuit diagram 486 SPACE PRODUCTS RADIATION-HARDENED SINGLE BOARD COMPUTER Abstract: .. Memory • 512KB to 16MB RAD-PAK® SRAM 25 ns with EDAC • 64MB to 256MB DRAM with EDAC data storage • 128KB to 4MB of SEi RAD-PAK® EEPROM. Input/Output • VME32 Bus Controller, RS-232, RS-422, Parallel .. Tags: computer motherboard circuit diagram 486 7805A* MIL-STD-1773* SRAM edac MIL-STD-1553 connector MIL-STD-1553 cable connector intel 128K dram architecture of 80486DX2 80486DX2 80486* diagram circuits 7684RP 486DX2* circuits 486DX2* datasheet abstract..	235.22 Kb	14 Pages	Original

First line: mbe 3 SRAM edac UT8ER512K32 Aeroflex Colorado Springs Application Note Designing with UT8ER512K32 Monolithic RadHardTM SRAM This application note describes UT8ER512K32 Monolithic RadHard SRAM different system configurations, including detailed look signals interface. reader will also gain understand Abstract: .. 16M RadHardTM SRAM. 1. Introduction This application note describes how to use the UT8ER512K32 .. an under-standing of how error detection and correction EDAC functions and improves error .. Tags: UT8ER512K32 SRAM edac mbe 3 UT8ER512K32	62.51 Kb	11 Pages	Original

First line: 76-kHz SRAM edac 88-kHz UT8ER512K32 AS 15 -g Aeroflex Colorado Springs Errata Date: Part Number: Silicon Revision: Affected Date Codes: March 2008 UT8ER512K32 Monolithic RadHard SRAM Revision Prototypes Revision Prototypes Data Sheet Specification UT8ER512K32M UT8ER512K32S RECOMMENDED OPERATING COND Abstract: .. Part Number: UT8ER512K32 Monolithic 16M RadHard SRAM. Silicon Revision: Revision B .. A 8 Bypass EDAC Bit 3 0, 1 If 0, then normal EDAC operation will occur. If 1, then EDAC will be .. Tags: AS 15 -g UT8ER512K32 88-kHz SRAM edac 76-kHz UT8ER512K32 UT8ER512K32M UT8ER512K32S	11.93 Kb	3 Pages	Original

First line: edac 90 56 pin edac SPACE PRODUCTS 8/16/32 DRAM EDAC Abstract: .. • Operates as 8, 16, or 32 bit EDAC • No single event latchup > 100 MeV/mg/cm2 • Single event upset .. SRAM Chip Select Bus SRAM_CS0-3 I Selects memory modules 0 to 3 for read or write modules. Clock .. Tags: edac 90 SRAM edac preh 71400-020 plug MC12 56 pin edac datasheet abstract..	403.92 Kb	8 Pages	Original

First line: edac 90 pin UT8ER512K32* UT8ER512K32 UT8ER512K* Design Information Fact Sheet UT8ER52K32 Monolithic RadHard SRAM FEATURES 20ns read, write maximum access times Functionally compatible with traditional SRAM devices CMOS compatible inputs output levels, three-state bidirectional data volt I/O, volt co Abstract: .. write maximum access times â Functionally compatible with traditional 512K x 32 SRAM devices. â .. in space, the UT8ER512K32 employs an embedded EDAC error detection and correction with code .. Tags: UT8ER512K* UT8ER512K32 UT8ER512K32* edac 90 pin UT8ER512K32 UT8ER512K32M UT8ER512K32S	83.93 Kb	4 Pages	Original

First line: c-02 UT8ER1M32 32Megabit SRAM UT8ER2M32 64Megabit SRAM UT8ER4M32 128Megabit SRAM Preliminary Data Sheet December 2010 www.aeroflex.com/memories FEATURES 20ns Read, 10ns Write maximum access times available Functionally compatible with traditional SRAM devices CMOS compatible input output levels, thr Abstract: .. To reduce the bit error rates, the SRAM devices employ an embedded EDAC error detection and correction with user programmable auto scrubbing options. The SRAM devices can automatically correct .. Tags: c-02 UT8ER1M32 UT8ER2M32 UT8ER4M32 UT8ER1M32 UT8ER2M32 UT8ER4M32	217.38 Kb	27 Pages	Original

First line: 1E00 LR3330* mongoose LR33300* uart TX pdf SYNOVA 1333 Gateway Drive, Suite 1017, Melbourne 32901, (407) 726-0796 Visit site http://www.synova.com Mongoose-V 32-bit MIPS Microprocessor Architecture Description Abstract: .. The Memory Controller supports both SRAM and DRAM systems and provides on-chip wait-state .. • Error Detection and Correction EDAC • Expansion Interrupts • Dual UART • Timers • Debug .. Tags: uart TX pdf LR33300* mongoose LR3330* 1E00 datasheet abstract..	121.6 Kb	21 Pages	Original

First line: KC01 UT80196-KDS-AN-001 100-compatible Aeroflex UTMC Application Note UT80196-KDS-AN-001 Compatibility Differences Between UT80CXX196KD UT80CRH196KDS Table Cross Reference Applicable Products Product Name: UT80CRH196KD UT80C196KD UT80CRH196KDS 5962R98583 5962-98583 596202523 Device Type: Internal N Abstract:* .. EDAC Check Bit 5. Asserting the EDACEN pin will cause the error detection and correction engine .. 9674 Storage Elements 1482 Register Elements 8192 SRAM Storage Elements. Shape Parameter. 1 1.3 .. Tags: 100-compatible UT80196-KDS-AN-001 KC01 UT80196-KDS-AN-001	102.26 Kb	4 Pages	Original

First line: c-02 UT8ER512K* UT8ER512K32* UT8ER512K32 UT8ER512K32 Monolithic SRAM Data Sheet June 2010 www.aeroflex.com/memories FEATURES 20ns Read, 10ns Write maximum access times Functionally compatible with traditional 512K SRAM devices CMOS compatible input output levels, three-state bidirectional data Volta Abstract: .. Write maximum access times â Functionally compatible with traditional 512K x 32 SRAM devices. â .. The master is a full function device which features user defined autonomous EDAC scrubbing .. Tags: UT8ER512K32 UT8ER512K32* UT8ER512K* c-02 UT8ER512K32	237.66 Kb	20 Pages	Original

First line: UT102 Memory Card Advanced Product Information April 2000 FEATURES 150ns minimum address access time, mass storage solid-state memory card Asynchronous operation facilitate compatability many data architectures operating standby current, Volt options available Expansive architecture configured 512k Abstract: .. x 22 per page, 16 data bits and 6 EDAC bits Typical radiation performance: - Intrinsic total dose .. of 16M SRAM MCMs multi-chip-modules that are configured in pages of 512k x 22. Memory array .. Tags: MIL-STD-1553 connector MIL-STD-1553 UT102	27.73 Kb	1 Pages	Original

First line: UT131 Embedded Controller Card Advanced Product Information October 2000 FEATURES Broadband data acquisition card radiation-hardened applications converter 41.5KHz, Volt input range 11µs sample rate, 14-bit resolution On-board 16-bit, 16MHz, MCS-96 compatible microcontroller bytes user program Abstract: .. 64K bytes of user programmed PROM - 64K bytes of on-board SRAM with EDAC. Radiation-hardened; total dose irradiation testing to MIL-STD-883 Method 1019 - Total-dose: 50K rads Si C language software .. Tags: SRAM 64k PROM 64k rad hardened mcs-96 software MCS-96 development MCS-96 distributed control system DATA SHEET UT131	32.3 Kb	1 Pages	Original

First line: UT131 Embedded Controller Card Advanced Product Information June 2002 FEATURES Broadband data acquisition card converter 5KHz, Volt input range 11µs conversion time, 14-bit resolution, full scale accuracy On-board 16-bit, 16MHz, MCS-96 compatible microcontroller bytes user programmed PROM byte Abstract: .. 64K bytes of user programmed PROM - 64K bytes of on-board SRAM with EDAC. C language software drivers and utilities - Removable RS-232 de-bug monitor Available with 1Mbps Low Power Serial Data Bus .. Tags: mcs-96 software MCS-96 distributed control system DATA SHEET UT131	30.84 Kb	1 Pages	Original

First line: Multiplier/Divider Failure Negative Operands Treatments Call Return Address Failure with Large Displacement Byte Half-word Write SRAM Failure when Executing from SDRAM Wrong stored during exception trap Single-stepping over SWAP LDSTUB instruction locks Divide overflow will clear zero flag Register Abstract: .. If an application is executing in SDRAM, byte- and half-word writes to SRAM can fail if the EDAC or read-modify-write cycles are used. This “SRAM Write access” failure is due to a LEON2 VHDL model .. Tags: SRAM edac AT697E-2E-E datasheet abstract..	32.81 Kb	4 Pages	Original

First line: DO-7� edac 90 pin n39 transistor 29C532E 32-Bit Bus-Watch EDAC Error Detection Correction unit 29C532E EDAC very power bus-watch 32-bit Error Detection Correction unit (EDAC). EDAC used high integrity system monitoring correcting data values coming from memory space. Such buswatch EDAC connected pe Abstract:* .. If SRAM devices 1 or 4-bit are used in a memory system controlled by the 29C532E EDAC, it is only necessary to store 39 bits D [31..0] & C [6..0] . If SRAM devices 8-bit are used in a memory system controlled .. Tags: n39 transistor edac 90 pin DO-7Â edac 29C532E*	193.74 Kb	22 Pages	Original

First line: n39 transistor nxor* nxor 29C532E 32-Bit Bus-Watch EDAC Error Detection Correction unit Description 29C532E EDAC very power bus-watch 32-bit Error Detection Correction unit (EDAC). EDAC used high integrity system monitoring correcting data values coming from memory space. Such bus-watch EDAC connect Abstract: .. SRAM devices 1 or 4-bit are used in a memory system controlled by the 29C532E EDAC, it is only necessary to. store 39 bits D [31..0] & C [6..0] .If SRAM devices 8-bit are used in a memory system controlled .. Tags: nxor* nxor n39 transistor edac datasheet abstract..	114.75 Kb	25 Pages	Original

First line: nxor 29C532E 32-Bit Bus-Watch EDAC Error Detection Correction unit Description 29C532E EDAC very power bus-watch 32-bit Error Detection Correction unit (EDAC). EDAC used high integrity system monitoring correcting data values coming from memory space. Such bus-watch EDAC connected peripheral data wa Abstract: .. SRAM devices 1 or 4-bit are used in a memory system controlled by the 29C532E EDAC, it is only necessary to. store 39 bits D [31..0] & C [6..0] .If SRAM devices 8-bit are used in a memory system controlled .. Tags: nxor n39 transistor edac datasheet abstract..	405.73 Kb	25 Pages	Original

First line: radiation-hardened EEPROM Embedded Controller Card Plus Advanced Product Information 1999 FEATURES Broadband data acquisition card radiation-hardened applications 41.5KHz, Volt input range 11µs conversion time, 14-bit resolution On-board 16-bit, 20MHz, MCS-96 compatible microcontroller bytes Abstract: .. - 1M-bytes of data memory with EDAC 32-bit, 33MHz PCI port version 2.X compliant Radiation .. 1Mbps Low Power Serial Bus - Low level C software drivers - 16K bytes of SRAM 4 user defined RS-422 .. Tags: radiation-hardened EEPROM SRAM edac MCS-96 distributed control system DATA SHEET 256K-byte SRAM MCS-96	43.01 Kb	1 Pages	Original

First line: IMMEDIATE RELEASE: June 2010 CONTACT: Teresa Farris MARCOM Manager Aeroflex Colorado Springs 719-594-8035 (voice) 719-594-8468 (fax) Email: teresa.farris@aeroflex.com www.aeroflex.com/Memories AEROFLEX ANNOUNCES PRODUCTION 40Mbit SRAM MULTI-CHIP MODULES (MCM) MEMORIES COLORADO SPRINGS, Aeroflex Colo Abstract: .. For designs using external system EDAC controllers, Aeroflex offers. the UT8R1M39 SRAM MCM. Using a universal 132-lead package which integrates up to eight 16M or 20M memory die, Aeroflex’s .. Tags: UT8ER1M32 UT8R1M39	54.51 Kb	3 Pages	Original

First line: ACTEL CCGA 1152 pin configuration� RTAX2000* RTAX-S library RTAX1000S* Axcelerator FPGAs Application Note AC173 Differences Between RTAX-S/SL Axcelerator® RTAX-S/SL Actel's latest FPGA family designed space applications derivative Actel Axcelerator FPGA family. RTAX-S/SL architecture based Actel Abstract: .. SRAM does not employ TMR, error detection and correction Intellectual Property EDAC IP can be implemented to enhance SEU immunity. For EDAC implementation details, see Actel’s application .. Tags: Axcelerator FPGAs RTAX1000S* RTAX-S library RTAX2000* ACTEL CCGA 1152 pin configurationÂ RTAX-S RAM 2114 ACTEL CCGA 1152 pin configuration AC173 2114 SRAM AC173	53.7 Kb	4 Pages	Original

First line: UT8ER2M32 UT8ER512K32 6x10-16 UT8Q512E UT9Q512E Aeroflex Colorado Springs passion performance. Over years experience HiRel memories krads(Si) Mbit Gbit options Best-in-class density square inch Flight proven HiRel Memories Abstract: .. UT8Q512E 4M SRAM 512K x 8 3.3V 20 ns 5.0E4 >50 2.8E-8 >100 ■ 36 Q,V 5962-99607. UT8Q512K32E 16M SRAM .. The SEU error rate is driven by particle flux and EDAC scrub rate. The error rate is 6x10-16 .. Tags:* UT9Q512E UT8Q512E 6x10-16 UT8ER512K32 UT8ER2M32 datasheet abstract..	608.91 Kb	4 Pages	Original

First line: SPACE PRODUCTS SPARC-V7R Abstract: .. - 16 Mb SRAM + 4 Mb SRAM with built in EDAC ; optional 32 Mb + 4 Mb - 4 Mb EEPROM • On board SEL, TID sensors for on board device monitoring • On board DC/DC converter - optional • Engineering board in stock .. Tags: datasheet abstract..	416.71 Kb	5 Pages	Original

First line: RTAX2000S RTAX2000S* rtax250s cq352 RTAX2000* RTAX-S/SL RadTolerant FPGAs Abstract: .. Use of Error Detection and Correction EDAC IP included with Integrated SRAM Scrubber – Single-Bit Correction, Double-Bit Detection – Variable-Rate Background Refreshing Total Ionizing .. Tags: rtax250s cq352 RTAX2000S* sc Components rtax250s* RTAX2000S RTAX2000* datasheet abstract..	366.67 Kb	8 Pages	Original

First line: 484-pin UART windows UT699 32-bit Fault-Tolerant LEON 3FT/SPARCTM Processor Aeroflex Colorado Springs 800-645-8862 www.aeroflex.com/LEON August 2009 UT699 LEON Description Operates from 3.3V 2.5V core Multifunctional memory controller supports PROM, SRAM, SDRAM, Debug support unit with trace buffer Abstract: .. • Memory Inteface Error Correction: – The PROM, SRAM and SDRAM areas are EDAC protected using a 39, 7 block Hamming code– The EDAC uses 7 check bits CB[6:0]– The EDAC provides single-error correction .. Tags: UART windows 484-pin trap sparc 484-CLGA ahb fsm UT699	627.52 Kb	25 Pages	Original

First line: ups MEG pulsar PDF FILE radiation hardened cpu Success Story XL/QPRO Gamma-ray Large Area Space Telescope (GLAST) Tower Sapphire Computers Inc. recently designed prototype Tower GLAST space telescope program, using XC4000XL FPGAs. Abstract: .. The third FPGA is an XC4062XL which does the Reed-Solomon EDAC Error Detector And. Corrector .. L2 Cache SRAM ECC1 Meg. IO Bus Bridge Ethernet. Controller. Expansion Connectors. Timers .. Tags: radiation hardened cpu ups MEG pulsar PDF FILE XC4000XL Programmable Logic Controller radiation MPC106 XC4000XL	184.15 Kb	2 Pages	Original

First line: SDRAM edac Japan Servo L550 HIGHLY INTEGRATED, AUTOMATED SINGLE-CHIP DRIVE MANAGER DISK DRIVE CONTROLLER Abstract: .. 4 EDAC Block ■ Optimized ECC with up to six burst on-the-fly. OTF correction ■ Programmable 480 .. EDAC. SERVO. DSP. SRAM. FLASH. BUFFER SDRAM. READ CHANNEL. ATA BUS. ROM. ROM RAM. PERIPHERALS. SYNC or .. Tags: Japan Servo SDRAM edac STMicroelectronics date code format L5510	49.19 Kb	3 Pages	Original

First line: Japan Servo L550 HIGHLY INTEGRATED, AUTOMATED SINGLE-CHIP DRIVE MANAGER DISK DRIVE CONTROLLER Abstract: .. 4 EDAC Block ■ Optimized ECC with up to six burst on-the-fly. OTF correction ■ Programmable 480 .. EDAC. SERVO. DSP. SRAM. FLASH. BUFFER SDRAM. READ CHANNEL. ATA BUS. ROM. ROM RAM. PERIPHERALS. SYNC or .. Tags: Japan Servo STMicroelectronics date code format servo controller L5510	43.3 Kb	3 Pages	Original

First line: RTAX-S A54SX RTAX2000* ACTEL CCGA to FBGA Adapter rtax250s cq352 RTAX-S/SL RadTolerant FPGAs Radiation Performance SEU-Hardened Registers Eliminate Need TripleModule Redundancy (TMR) Immune Single-Event Upsets (SEU) LETTH MeV-cm2/mg Rate 10-10 Errors/Bit-Day Worst-Case Geosynchronous Orbit Expected Abstract: .. Use of Error Detection and Correction EDAC IP included with Integrated SRAM Scrubber – Single-Bit Correction, Double-Bit Detection – Variable-Rate Background Refreshing Total Ionizing .. Tags: rtax250s cq352 ACTEL CCGA to FBGA Adapter RTAX2000* A54SX RTAX-S RTAX1000S* TM1019	780.65 Kb	17 Pages	Original

First line: 7846A SDRAM edac EEPROM 16Mb Microelectronics' Product List Product Description Part Number Radiation Technology EDAC, LPT, LPT, LPT, Package Screening Style Level Abstract: .. Single Board Computer, PowerPC Based SCS750 EDAC, RP, RS, RH, TMR Standard 6u. cPCI. S or B .. Time Low Voltage 3.3V SRAM 20ns, 25ns or 30ns Access Time Low Voltage 3.3V SRAM 20ns, 25ns or .. Tags: EEPROM 16Mb SDRAM edac 7846A SMD 14 RP ALL DATA SHEET 79lv2040* 7805a* 48SD1616 datasheet abstract..	91.18 Kb	2 Pages	Original

First line: 64 bit cpci backplane w18 smd transistor smd transistor w18 smd transistor ab2 SMD CODE W17 UT699 32-bit Fault-Tolerant SPARCTM V8/LEON Processor Data Sheet July 2009 FEATURES Implemented 0.25m CMOS technology Flexible static design allows 66MHz clock rate MIPS throughput 66MHz base clock frequency Abstract: .. links • 8/16/32-bit memory controller with EDAC for external PROM and SRAM • 32-bit SDRAM controller with EDAC for external SDRAM • Timer unit with three 32-bit timers and watchdog • Interrupt .. Tags: SMD CODE W17 smd transistor ab2 smd transistor w18 w18 smd transistor 64 bit cpci backplane UT699	362.16 Kb	41 Pages	Original

First line: P8-P15 W17 smd package transistor 64 bit cpci backplane CERAMIC QUAD FLATPACK CQFP 14 pin SMD CODE W17 UT699 32-bit Fault-Tolerant SPARCTM V8/LEON Processor Data Sheet November 2009 FEATURES Implemented 0.25m CMOS technology Flexible static design allows 66MHz clock rate MIPS throughput 66MHz base c Abstract: .. links • 8/16/32-bit memory controller with EDAC for external PROM and SRAM • 32-bit SDRAM controller with EDAC for external SDRAM • Timer unit with three 32-bit timers and watchdog • Interrupt .. Tags: SMD CODE W17 CERAMIC QUAD FLATPACK CQFP 14 pin 64 bit cpci backplane W17 smd package transistor P8-P15 UT699	364.53 Kb	41 Pages	Original

First line: TRANSISTOR SMD MARKING CODE p1 diode ccb mg smd UT80CRH196KDS Microcontroller Datasheet March, 2008 www.aeroflex.com/radhard FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Control Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: diode ccb mg smd TRANSISTOR SMD MARKING CODE p1 UT80CRH196KDS UT80CRH196KDS s	210.81 Kb	41 Pages	Original

First line: UT80CRH196KDS UT80CRH196KDS Microcontroller Datasheet May, 2003 FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Controller Three Pulse-Width Modulated Outputs High Speed UART Seria Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: UT80CRH196KDS MCS-96 development MCS-96 marking 003H UT80CRH196KDS	176.26 Kb	43 Pages	Original

First line: UT80CRH196KDS Microcontroller Datasheet October, 2002 FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Controller Three Pulse-Width Modulated Outputs High Speed UART Serial Port Ded Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: MCS-96 development MCS-96 marking 003H UT80CRH196KDS	177.44 Kb	43 Pages	Original

First line: SPARC High-performance Low-power 32-bit Architecture Register Windows Integrated 32/64-bit Floating Point Unit Advanced Architecture Abstract: .. – EDAC Protection – Parity Protection Debug and Test Facilities – Debug Support Unit DSU for .. EDAC. RxD TxD. RxD TxD. GPI Bits PCI Bus. Ready Busy Add. .. JTAG TAP. TDS TDI TDO .. PROM. SRAM. SDRAM. I/O .. Tags: BUX 64 bexc AT697E datasheet abstract..	134.62 Kb	16 Pages	Original

First line: UT80CRH196KDS Microcontroller Advanced Datasheet April 2002 FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Controller Three Pulse-Width Modulated Outputs High Speed UART Serial Po Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: MCS-96 datasheet marking 003H UT80CRH196KDS	177.47 Kb	43 Pages	Original

First line: TRANSISTOR SMD MARKING CODE p1 UT80CRH196KD Microcontroller Datasheet September, 2002 FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Controller Three Pulse-Width Modulated Outputs Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: TRANSISTOR SMD MARKING CODE p1 UT80CRH196KD	199.57 Kb	44 Pages	Original

First line: UT80CRH196KD Microcontroller Datasheet October 2000 FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Controller Three Pulse-Width Modulated Outputs High Speed UART Serial Port Dedic Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: MCS-96 mcs 96 opcode marking 003H 8XC196kd UT80CRH196KD	199.06 Kb	41 Pages	Original

First line: 80C196KD* 56 pin edac UT80CRH196KD Microcontroller Datasheet April, 2002 FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Controller Three Pulse-Width Modulated Outputs High Speed U Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: 80C196KD* MCS-96 development marking 003H 8XC196KD 56 pin edac UT80CRH196KD	186.32 Kb	43 Pages	Original

First line: UT80CRH196KD Microcontroller Datasheet June 2000 FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Controller Three Pulse-Width Modulated Outputs High Speed UART Serial Port Dedicate Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: marking 003H UT80CRH196KD	199.85 Kb	41 Pages	Original

First line: UT80CRH196KD Microcontroller Datasheet September, 2002 FEATURES 20MHz 16-bit Microcontroller compatible with industry standard's MCS-96 Register Register Architecture 1000 Byte Register Three 8-bit Ports On-board Interrupt Controller Three Pulse-Width Modulated Outputs High Speed UART Serial Port De Abstract: .. 1000 byte scratch-pad SRAM and flip-flops can withstand charged particles with energies up to .. When configured for their alternate function, five of the bits are bi-directional EDAC check .. Tags: marking 003H UT80CRH196KD	182.29 Kb	43 Pages	Original

First line: SPARC High Performance Low-power 32-bit Architecture LEON2-FT 1.0.13 compliant Register Windows Advanced Architecture: On-chip Amba Stage Pipeline kbyte Multi-sets Data Cache kbyte Multi-sets Instruction Cache On-chip Peripherals: Memory Interface PROM Controller SRAM Controller SDRAM Controller Tim Abstract: .. – EDAC Protection – Parity Protection Debug and Test Facilities – Debug Support Unit DSU for .. EDAC. RxD TxD. RxD TxD. GPI bits PCI bus. Ready Busy Add. .. JTAG TAP. TDS TDI TDO .. Prom. SRAM. SDRAM. I/O .. Tags: bexc AT697E-2E-E AT697E Adapters-Plus* datasheet abstract..	99.25 Kb	16 Pages	Original

First line: ERC32 development board uart TX pdf Trap floating point 4-bit even parity checker circuit diagram PRW- 200 TSC695F Rad-Hard Rad-Hard 32-bit SPARC 32-bit SPARC Embedded Processor Embedded Processor User's Manual Rev.F March, 2001 Abstract: .. and an EDAC on the external data bus. The design is highly testable with the support of an On-Chip .. * The SRAM area is "emulated" by the extended ROM area. This area size can be upto 15 Mbytes .. Tags: PRW- 200 4-bit even parity checker circuit diagram Trap floating point uart TX pdf ERC32 development board erc32 inexact floating point trap 205-CB TSC695F	695.82 Kb	107 Pages	Original

First line: 4148G TSC695F SPARC 32-bit Space Processor User Manual 4148H-AERO-12/03 Table Contents Section Features. Description .1-2 Block Diagram.1-2 Description .1-2 System Architecture .1-5 Abstract: .. and an EDAC on the external data bus. The design is highly testable with the support of an On-chip .. The SRAM area is "emulated" by the extended ROM area. This area size can be up to 15M bytes from .. Tags: 4148G TSC695F user manual parity check mark space erc32 trap 0x61 erc32 inexact floating point trap ERC32 4-bit even parity using mux 8-1 TSC695F	770.68 Kb	110 Pages	Original

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