SN74HC74 SN54HC74
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5962-8405601VDA - 5962-8405601VDA
SN74HC74 - SN74HC74
SN54HC74 - SN54HC74
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR PRESET
Wide Operating Voltage Range Outputs Drive LSTTL Loads Power Consumption, 40-µA Typical ±4-mA Output Drive Input Current
SN54HC74 PACKAGE SN74HC74 PACKAGE (TOP VIEW)
description/ordering information
'HC74 devices contain independent D-type positive-edge-triggered flip-flops. level preset (PRE) clear (CLR) inputs sets resets outputs, regardless levels other inputs. When inactive (high), data data input meeting setup time requirements transferred outputs positive-going edge clock (CLK) pulse. Clock triggering occurs voltage level directly related rise time CLK. Following hold-time interval, data input changed without affecting levels outputs.
1CLR 1CLK 1PRE
2CLR 2CLK 2PRE
SN54HC74 PACKAGE (TOP VIEW)
1CLR 2CLR 1CLK 1PRE
2CLK 2PRE
internal connection
ORDERING INFORMATION
PDIP SOIC -40°C 85°C SSOP TSSOP CDIP -55°C 125°C LCCC PACKAGE Tube Tube Reel 2500 Reel Reel 2000 Reel 2000 Tube Reel 2000 Reel Tube Tube Tube ORDERABLE PART NUMBER SN74HC74N SN74HC74D SN74HC74DR SN74HC74DT SN74HC74NSR SN74HC74DBR SN74HC74PW SN74HC74PWR SN74HC74PWT SNJ54HC74J SNJ54HC74W SNJ54HC74FK SNJ54HC74J SNJ54HC74W HC74 HC74 HC74 HC74 TOP-SIDE MARKING SN74HC74N
SNJ54HC74FK Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
Copyright 2003, Texas Instruments Incorporated
products compliant MIL-PRF-38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
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SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR PRESET
FUNCTION TABLE INPUTS OUTPUTS
This configuration nonstable; that does persist when returns inactive (high) level.
logic diagram (positive logic)
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, -0.5 Input clamp current, VCC) (see Note Output clamp current, VCC) (see Note Continuous output current, VCC) Continuous current through Package thermal impedance, (see Note package 86°C/W package 96°C/W package 80°C/W package 76°C/W package 113°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR PRESET
recommended operating conditions (see Note
SN54HC74 Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage Input transition rise/fall time 3.15 1.35 1000 SN74HC74 3.15 1.35 1000 UNIT
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS -5.2 3.98 5.48 25°C 1.998 4.499 5.999 0.002 0.001 0.001 0.17 0.15 ±0.1 0.26 0.26 ±100 SN54HC74 ±1000 SN74HC74 3.84 5.34 0.33 0.33 ±1000 UNIT
POST OFFICE 655303
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SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR PRESET
timing requirements over recommended operating free-air temperature range (unless otherwise noted)
fclock Clock frequency Pulse duration high Data Setup time before inactive Hold time, data after 25°C SN54HC74 SN74HC74 UNIT
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER FROM (INPUT) (OUTPUT) fmax 25°C SN54HC74 SN74HC74 UNIT
operating characteristics, 25°C
PARAMETER Power dissipation capacitance flip-flop TEST CONDITIONS load UNIT
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SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR PRESET
PARAMETER MEASUREMENT INFORMATION
From Output Under Test Test Point (see Note Low-Level Pulse High-Level Pulse VOLTAGE WAVEFORMS PULSE DURATIONS Data Input Out-of-Phase Output In-Phase Output tPLH tPHL tPLH tPHL
LOAD CIRCUIT
Reference Input
Input
VOLTAGE WAVEFORMS SETUP HOLD INPUT RISE FALL TIMES
VOLTAGE WAVEFORMS PROPAGATION DELAY OUTPUT TRANSITION TIMES NOTES: includes probe test-fixture capacitance. Phase relationships between waveforms were chosen arbitrarily. input pulses supplied generators having following characteristics: MHz, clock inputs, fmax measured when input duty cycle 50%. outputs measured time with input transition measurement. tPLH tPHL same tpd.
Figure Load Circuit Voltage Waveforms
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Mar-2005
PACKAGING INFORMATION
Orderable Device 5962-8405601VCA 5962-8405601VDA 84056012A 8405601CA 8405601DA JM38510/65302B2A JM38510/65302BCA JM38510/65302BDA SN54HC74J SN74HC74ADBLE SN74HC74D SN74HC74DBLE SN74HC74DBR SN74HC74DR SN74HC74DT SN74HC74N SN74HC74N3 SN74HC74NSR SN74HC74PW SN74HC74PWLE SN74HC74PWR SN74HC74PWT SNJ54HC74FK SNJ54HC74J SNJ54HC74W
Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type CDIP LCCC CDIP LCCC CDIP CDIP SSOP SOIC SSOP SSOP SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP LCCC CDIP
Package Drawing
Pins Package Plan 2000 2000 2000 None None None None None None None None None None Pb-Free (RoHS) None Pb-Free (RoHS)
Lead/Ball Finish Call Call Call Call Call Call Call Call Call Call NIPDAU Call NIPDAU NIPDAU NIPDAU NIPDAU Call NIPDAU NIPDAU Call NIPDAU NIPDAU Call Call Call
Peak Temp Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Call Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Call Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-1-260C-UNLIM Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-NC-NC-NC Call Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-1-250C-UNLIM Call Level-1-250C-UNLIM Level-1-250C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC
2500 Green (RoHS Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) None Pb-Free (RoHS) Pb-Free (RoHS) None Pb-Free (RoHS) Pb-Free (RoHS) None None None
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Plan currently available please check latest availability information additional product content details. None: available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes.
Addendum-Page
PACKAGE OPTION ADDENDUM
www.ti.com
8-Mar-2005
Green (RoHS Sb/Br): defines "Green" mean "Pb-Free" addition, uses package materials that contain halogens, including bromine (Br) antimony (Sb) above 0.1% total product weight.
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDECindustry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
Addendum-Page
MECHANICAL DATA
MLCC006B OCTOBER 1996
(S-CQCC-N**)
TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
TERMINALS
0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004
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MECHANICAL DATA
MSSO002E JANUARY 1995 REVISED DECEMBER 2001
(R-PDSO-G**)
PINS SHOWN 0,65 0,38 0,22 0,15
PLASTIC SMALL-OUTLINE
0,25 0,09 5,60 5,00 8,20 7,40
Gage Plane 0,25 0,95 0,55
Seating Plane 2,00 0,05 0,10
PINS
6,50
6,50
7,50
8,50
10,50
10,50
12,90
5,90
5,90
6,90
7,90
9,90
9,90
12,30 4040065 12/01
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150
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MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,30 0,19
0,10
0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
3,10
5,10
5,10
6,60
7,90
9,80
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153
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