SLLS362D
|
|
|
Top Searches for this datasheet
SLLS362D - SLLS362D
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
Four ('391), Eight ('389) Sixteen ('387) Line Drivers Meet Exceed Requirements ANSI TIA-644 Standard Designed Signaling Rates Mbps With Very Radiation (EMI) Low-Voltage Differential Signaling With Typical Output Voltage 100- Load Propagation Delay Times Less Than Output Skew Less Than Part-to-Part Skew Less Than 35-mW Total Power Dissipation Each Driver Operating Driver High Impedance When Disabled With SN65' Version Bus-Pin Protection Exceeds Packaged Thin Shrink Small-Outline Package With 20-mil Terminal Pitch Low-Voltage (LVTTL) Logic Inputs Tolerant
'LVDS389 PACKAGE (TOP VIEW)
'LVDS387 PACKAGE (TOP VIEW)
description
This family four, eight, sixteen differential line drivers implements electrical characteristics low-voltage differential signaling (LVDS). This signaling technique lowers output voltage levels differential standard levels (such EIA/TIA-422B) reduce power, increase switching speeds, allow operation with 3.3-V supply rail. sixteen current-mode drivers will deliver minimum differential output voltage magnitude into 100- load when enabled.
'LVDS391 PACKAGE (TOP VIEW)
EN1,2 EN3,4
intended application this device signaling technique point-to-point multidrop baseband data transmission over controlled impedance media approximately transmission media printed-circuit board traces, backplanes, cables. large number drivers integrated into same substrate, along with pulse skew balanced signaling, allows extremely precise timing alignment clock data synchronous parallel data transfers. When used with companion 8-channel receivers, SN65LVDS386 SN65LVDS388, over million data transfers second single-edge clocked systems possible with very little power. (Note: ultimate rate distance data transfer dependent upon attenuation characteristics media, noise coupling environment, other system characteristics.)
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. Signaling rate, 1/t, where minimum unit interval expressed units bits/s (bits second)
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
Copyright 2001, Texas Instruments Incorporated
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
description (continued)
When disabled, driver outputs high impedance. Each driver input enable (EN) have internal pulldown that will drive input level when open circuited. SN65LVDS387, SN65LVDS389, SN65LVDS391 characterized operation from -40°C 85°C. SN75LVDS387, SN75LVDS389, SN75LVDS391 characterized operation from 70°C.
logic diagram (positive logic)
(1/4 'LVDS387 'LVDS389 shown) AVAILABLE OPTIONS PART NUMBER SN65LVDS387DGG SN75LVDS387DGG SN65LVDS389DBT SN75LVDS389DBT SN65LVDS391D SN75LVDS391D SN65LVDS391PW TEMPERATURE RANGE -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C DRIVERS BUS-PIN ('LVDS391 shown)
SN75LVDS391PW 70°C This package available taped reeled. order this packaging option, suffix part number (e.g., SN65LVDS387DGGR). DRIVER FUNCTION TABLE INPUT OPEN ENABLE OUTPUTS
high-level, low-level, irrelevant, high-impedance (off)
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
equivalent input output schematic diagrams
EQUIVALENT EACH INPUT TYPICAL OUTPUTS
Input
Output
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, Input voltage range: Inputs Electrostatic discharge: SN65' GND) Class A:15 SN75' GND) Class Continuous power dissipation (see Dissipation Rating Table) Storage temperature range 65°C 150°C Lead temperature (1/16 from case seconds 260°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: voltage values, except differential voltages, with respect network ground terminal. Tested accordance with MIL-STD-883C Method 3015.7. DISSIPATION RATING TABLE DERATING FACTOR ABOVE 25°C mW/°C mW/°C 16.7 mW/°C 70°C POWER RATING 1342 85°C POWER RATING 1089
PACKAGE
25°C 1071 2094
mW/°C This inverse junction-to-ambient thermal resistance when board-mounted (low-k) with flow.
recommended operating conditions
Supply voltage, High-level input voltage, Low-level input voltage, SN75' Operating free-air erature, temperature erating SN65' UNIT
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER |VOD| |VOD| VOC(SS) VOC(SS) VOC(PP) Differential output voltage magnitude Change differential output voltage magnitude between logic states Steady-state common-mode output voltage Change steady-state common-mode output voltage between logic states Peak-to-peak common-mode output voltage 'LVDS387 'LVDS389 Supply current 'LVDS391 'LVDS387 'LVDS389 'LVDS391 IO(OFF) High-level input current Low-level input current Short-circuit Short circuit output current High-impedance output current Power-off output current Input capacitance Output capacitance (4E6t) (4E6t) Disabled Disabled, Enabled, Figure TEST CONDITIONS Figure Figure 1.125 1.375 UNIT
typical values 25°C with 3.3-V supply.
switching characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER tPLH tPHL tsk(p) tsk(o) tsk(pp) tPZH tPZL tPHZ tPLZ Propagation delay time, low-to-high-level output Propagation delay time, high-to-low-level output Differential output signal rise time Differential output signal fall time Pulse skew (|tPHL tPLH|) Output skew Part-to-part Propagation delay time, high-impedance-to-high-level output Propagation delay time, high-impedance-to-low-level output Propagation delay time, high-level-to-high-impedance output Propagation delay time, low-level-to-high-impedance output Figure Figure TEST CONDITIONS UNIT
typical values 25°C with 3.3-V supply. tsk(o) magnitude time difference between tPLH tPHL drivers single device with their inputs connected together. tsk(pp) magnitude difference propagation delay times between specified terminals devices characterized this data sheet when both devices operate with same supply voltage, same temperature, have same test circuits.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
PARAMETER MEASUREMENT INFORMATION
(VOY VOZ)/2
Figure Voltage Current Definitions
Input 3.75 3.75
VTEST
Figure Test Circuit
Input 49.9 Places) VOC(PP) VOC(SS)
NOTE: input pulses supplied generator having following characteristics: pulse repetition rate (PRR) Mpps, pulse width includes instrumentation fixture capacitance within 0,06 D.U.T. measurement VOC(PP) made test equipment with bandwidth least MHz.
Figure Test Circuit Definitions Driver Common-Mode Output Voltage
Input Input Output Places) VOD(L) VOD(H) tPLH tPHL 100%
NOTE: input pulses supplied generator having following characteristics: pulse repetition rate (PRR) Mpps, pulse width includes instrumentation fixture capacitance within 0,06 D.U.T.
Figure Test Circuit, Timing, Voltage Definitions Differential Output Signal
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
PARAMETER MEASUREMENT INFORMATION
Input Places) 49.9 Places)
Input
tPZH
tPHZ
tPZL
tPLZ
NOTE: input pulses supplied generator having following characteristics: pulse repetition rate (PRR) Mpps, pulse width includes instrumentation fixture capacitance within 0,06 D.U.T.
Figure Enable Disable Time Circuit Definitions
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
TYPICAL CHARACTERISTICS
'LVDS391 SUPPLY CURRENT (RMS) SWITCHING FREQUENCY
outputs loaded enabled. Supply Current
Frequency
Figure
'LVDS387 SUPPLY CURRENT (RMS) SWITCHING FREQUENCY
Supply Current outputs loaded enabled. Frequency Frequency Supply Current outputs loaded enabled.
'LVDS389 SUPPLY CURRENT (RMS) SWITCHING FREQUENCY
Figure
Figure
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
TYPICAL CHARACTERISTICS
LOW-TO-HIGH PROPAGATION DELAY TIME FREE-AIR TEMPERATURE
Low-To-High Propagation Delay Time High-To-Low Propagation Delay Time
HIGH-TO-LOW PROPAGATION DELAY TIME FREE-AIR TEMPERATURE
Free-Air Temperature
Free-Air Temperature
Figure
LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT CURRENT
Low-Level Output Voltage 25°C 25°C
Figure
HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT CURRENT
Low-Level Output Current
High-Level Output Voltage
High-Level Output Current
Figure
Figure
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE TIME
Output Voltage
Time
Figure
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
APPLICATION INFORMATION
Host Power Balanced Interconnect Power DBn-1 DBn-2 DBn-3 DBn-3 DBn-2 DBn-1 Target
Host Controller
Target Controller
Clock Clock
SN65LVDS387 Indicates twisting conductors.
LVDS Receiver(s) Indicates line termination circuit.
Figure Typical Application Schematic
Signaling Rate Distance
ultimate data transfer rate over given cable trace length involves many variables. Starting with capabilities this LVDS driver reproduce data pulse short Mbps signaling rate) with less than pulse distortion, degradation this pulse transmission media will necessarily reduce timing margin receiving data link. timing uncertainty induced transmission media commonly referred jitter comes from numerous sources. characteristics particular transmission media quantified using eyepattern measurement such shown Figure which shows about jitter data pulse width.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
APPLICATION INFORMATION
height
jitter
width unit interval
Figure Typical LVDS Eyepattern generally accepted range jitter receiver inputs that allows data recovery unit interval (data pulse width). Table shows signaling rate achieved various cables lengths eyepattern jitter with typical LVDS driver. Table Signaling Rates Various Cables Eyepattern Jitter
LENGTH CABLE (Mbps) (Mbps) (Mbps) (Mbps) (Mbps) (Mbps)
Cable specified MHz, shield, outside conductor diameter 0.52 Cable specified MHz, shield, 0.52 Cable specified MHz, taped over shield, 0.52 Cable (exceeding specified MHz, braided over shield plus taped individual shield pair, 0.64 (AWG22) Cable (exceeding specified MHz, 0.64 (AWG22), shield Cable (exceeding specified MHz, "self-shielded", 0.64 (AWG22)
During synchronous parallel transfers, skew between data clock lines will also reduce timing margin. This must accounted system timing budget. Fortunately, output skew this LVDS driver will generally small portion this budget.
other LVDS products
other products applications notes LVDS LVDM product families visit site http://www.ti.com/sc/datatran.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
MECHANICAL DATA
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 0.008 (0,20) 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) 0.010 (0,25)
Gage Plane
0.010 (0,25) 0.044 (1,12) 0.016 (0,40)
Seating Plane 0.069 (1,75) 0.010 (0,25) 0.004 (0,10) 0.004 (0,10)
PINS
0.197 (5,00) 0.189 (4,80)
0.344 (8,75) 0.337 (8,55)
0.394 (10,00) 0.386 (9,80) 4040047 10/96
NOTES:
linear dimensions inches (millimeters). This drawing subject change without notice. Body dimensions include mold flash protrusion, exceed 0.006 (0,15). Falls within JEDEC MS-012
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
MECHANICAL DATA
(R-PDSO-G**)
PINS SHOWN 0,27 0,17
PLASTIC SMALL-OUTLINE PACKAGE
0,50
0,08
0,15 4,50 4,30 6,60 6,20 Gage Plane
0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
7,90
7,90
9,80
11,10
12,60
7,70
7,70
9,60
10,90
12,40 4073252/D 09/97
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion. Falls within JEDEC MO-153
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
MECHANICAL DATA
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,50
0,27 0,17
0,08
6,20 6,00
8,30 7,90
0,15
Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
12,60
14,10
17,10
12,40
13,90
16,90 4040078 12/97
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold protrusion exceed 0,15. Falls within JEDEC MO-153
POST OFFICE 655303
DALLAS, TEXAS 75265
SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
MECHANICAL DATA
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,30 0,19
0,10
0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
3,10
5,10
5,10
6,60
7,90
9,80
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgment, including those pertaining warranty, patent infringement, limitation liability. warrants performance products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Customers responsible their applications using components. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such products services might used. TI's publication information regarding third party's products services does constitute TI's approval, license, warranty endorsement thereof. Reproduction information data books data sheets permissible only reproduction without alteration accompanied associated warranties, conditions, limitations notices. Representation reproduction this information with alteration voids warranties provided associated product service, unfair deceptive business practice, responsible liable such use. Resale TI's products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service, unfair deceptive business practice, responsible liable such use. Also see: Standard Terms Conditions Sale Semiconductor Products. www.ti.com/sc/docs/stdterms.htm
Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
Other recent searches
uPD750108 - uPD750108 uPD750108 Datasheet
TC1047 - TC1047 TC1047 Datasheet
Si7676DP - Si7676DP Si7676DP Datasheet
MS2475 - MS2475 MS2475 Datasheet
IDTQS34XVH245 - IDTQS34XVH245 IDTQS34XVH245 Datasheet
2N3766 - 2N3766 2N3766 Datasheet
2N3767 - 2N3767 2N3767 Datasheet
Privacy Policy | Disclaimer
© 2013 Datasheets.org.uk