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PK2500 - PK2500
C-Programmable Controller
PK2500
Users Manual
PK2500 Users Manual
Part Number 019-0063 Revision Last revised February 2000 Printed U.S.A.
Copyright
1999 Z-World, Inc. rights reserved. Z-World reserves right make changes improvements products without providing notice.
Trademarks
Dynamic registered trademark Z-World, Inc. Windows registered trademark Microsoft Corporation PLCBus trademark Z-World, Inc.
Notice Users
When system failure cause serious consequences, protecting life property against such consequences with backup system safety device essential. buyer agrees that protection against consequences resulting from system failure buyers responsibility. This device approved life-support medical systems. Z-World products percent functionally tested. Additional testing include visual quality control inspections mechanical defects analyzer inspections. Specifications based characterization tested sample units rather than testing over temperature voltage each unit. Z-World qualify components operate within range parameters that different from manufacturers recommended range. This strategy believed more economical effective. Additional testing burn-in individual unit available special arrangement.
Company Address
Z-World, Inc.
2900 Spafford Street Davis, California 95616-6800 Telephone: Facsimile: Site: E-Mail: (530) 757-3737 (530) 753-5141 http://www.z orld.c zworld@zw orld.com
TABLE CONTENTS
About This Manual Chapter Overview
PK2500 Overview Features Core Module Other Features Optional Accessories Software Development Evaluation Tools Compliance
Chapter Getting Started
Initial PK2500 Setup Parts Required Connecting PK2500 Host Running Dynamic Test Communication Line Selecting Communications Rate, Port, Protocol Running Sample Program
Chapter Input/Output Configuration
PK2500 Inputs Outputs Flexible Inputs/Outputs Configuring Serial Communications Configuring Inputs Outputs Protected Digital Inputs High-Current Outputs RS-485 Protected Digital Inputs Converter Input Voltage Reference Output PK2500 Subsystems
Chapter System Development
PK2500 Operating Modes Changing PK2500s Operating Mode Running Program
PK2500
Contents
Using Digital Inputs/Outputs Protected Digital Inputs Read Inputs High-Current Outputs Outputs Serial Communication RS-232 Communication RS-232 Connector Pinouts RS-485 Network Termination Bias Resistors Relay Outputs Relay Outputs Analog-to-Digital Converter Inputs Scaling Input Range Theory Operation VOFF Voltage Divider Gain Finding VOFF Practical Considerations Input Impedance Frequency Response Analog-to-Digital Converter Using Analog Inputs Using Voltage Reference Additional Features Pulse-Width Modulated (PWM) Outputs Feature User-Programmable LEDs Real-Time Clock (RTC) Power Supervisor Output
Chapter Software Reference
Input/Output Software Drivers Digital Inputs/Outputs Level-Sensitive Interrupts Interrupt Service Routines Pulse-Width Modulation Outputs References Additional Software Features
Contents
PK2500
Advanced Input/Output Programming Digital Input Addressing Details Digital Output Relay Output Addressing Details Analog-to-Digital Converter Addressing Details Addressing Details RS-485 Driver Addressing Details Addressing Details Advanced Programming Functions
Appendix Troubleshooting
Dynamic Will Start Dynamic Loses Serial Link PK2500 Repeatedly Resets Common Programming Errors
Appendix Specifications
Electrical Mechanical Specifications Factory Default Jumper Positions Protected Digital Inputs Frequency Response IN-00 IN-05, IN-08 IN-15 Frequency Response IN-06 IN-07 Customization Frequency Response Input Range Default Pull-Up Assignments High-Current Drivers
Appendix Power Management
Power Failure Sequence Events Power-Failure Detection Circuitry
Appendix Sinking Sourcing Drivers
Selecting Sourcing Sinking Drivers Sinking Driver (Low-Side Drive) Sourcing Driver (High-Side Drive)
Appendix Serial Interface Board
Introduction External Dimensions
PK2500
Contents
Appendix Enclosure Mounting Appendix Nonvolatile Storage Appendix Interrupt Vectors
PK2500 Input/Output Real-Time Clock Registers Other Input/Output Addresses Interrupt Vectors Interrupt Priorities
Appendix Battery
Storage Conditions Shelf Life Instructions Replacing Lithium Battery Battery Cautions
Index
Contents
PK2500
ABOUT THIS MANUAL
This manual provides instructions installing, testing, configuring, interconnecting Z-World PK2500 controller. Instructions also provided using Dynamic functions.
Assumptions
Assumptions made regarding user's knowledge experience following areas. Ability design engineer target system that PK2500 will control. Understanding basics operating software program editing files under Windows Knowledge basics programming.
full treatment refer following texts. Programming Language Kernighan Ritchie and/or Reference Manual Harbison Steel
Knowledge basic assembly language architecture.
documentation from Zilog, refer following texts. Z180 User's Manual Z180 Serial Communication Controllers Microprocessor Family User's Manual
PK2500
About This Manual
Acronyms
Table lists defines acronyms that used this manual.
Table Acronyms
Acronym Meaning
EPROM EEPROM SRAM UART
Erasable Programmable Read-Only Memory Electronically Erasable Programmable Read-Only Memory Liquid Crystal Display Light-Emitting Diode Nonmaskable Interrupt Parallel Input/Output Circuit (Individually Programmable Input/Output) Programmable Reload Timer Random Access Memory Real-Time Clock Serial Interface Board Static Random Access Memory Universal Asynchronous Receiver Transmitter
Icons
Table displays defines icons that used this manual.
Table Icons
Icon Meaning Icon Meaning
Refer
Note
Please contact
Caution
High Voltage
Factory Default
viii About This Manual
PK2500
Conventions
Table lists defines typographic conventions that used this manual.
Table Typographic Conventions
Example Description
while IN-01. Italics
Courier font (bold) indicates program, fragment program, Dynamic keyword phrase. Program comments written Courier font, plain face. Indicates that something should typed instead italicized words (e.g., place filename, type file's name). Sans serif font (bold) signifies menu menu selection. ellipsis indicates that irrelevant program text omitted brevity that preceding program text repeated indefinitely. Brackets function's definition program segment indicate that enclosed directive optional. Angle brackets occasionally enclose classes terms. vertical indicates that choice should made from among items listed.
Edit
Number
black square indicates headers.
Measurements
diagram graphic measurements inches followed millimeters enclosed parenthesis.
PK2500
About This Manual
Blank
About This Manual
PK2500
CHAPTER
OVERVIEW
Chapter provides comprehensive overview description PK2500. following sections included. PK2500 Overview Features Flexibility Customization Optional Accessories Software Development Evaluation Tools Compliance
PK2500
Overview
PK2500 Overview
PK2500 small, powerful, extremely flexible system controller. PK2500 consists main board with core module provide processing power. core module provides processor, real time clock, supervisor, memory, control various inputs/outputs. rugged enclosure houses PK2500. base plate compatible with multiple mounting options, including rail. PK2500 programmed using Dynamic Z-Worlds version programming language. Figure illustrates PK2500 component layout.
Board
User
Battery
Relay Relay
Relay LEDs
(Run/Program)
CM7200 Board 8-pin Programming Header
(underside)
RealTime Clock Z180
SRAM Flash EPROM
Figure 1-1. PK2500 Component Layout (Top View, Case Removed)
Overview
PK2500
Features
PK2500 offers following features.
Core Module
Z180 microprocessor operating 18.432 MHz, 128K SRAM, 128K flash EPROM.
core module used PK2500 CM7200 that been modified include header location CM7200. BIOS also different from that supplied with regular stock CM7200s.
Other Features
Thirty pins (out total) available assigning various combinations. RJ-12 modular jack also provided RS-232 communication. Factory-configured with protected digital inputs, which have software-assignable level-sensitive interrupts, which configured RS-485 serial port. additional protected digital inputs available changing configuration highcurrent outputs. Factory-configured with high-current driver outputs banks each. outputs normally have sinking drivers, sinking optional sourcing drivers mixed between banks push-pull H-bridge operation. Three outputs each banks configured protected digital inputs. Four 12-bit analog/digital converter inputs. SPST relay outputs. RS-232 serial communication ports available. RS-485 serial port available reconfiguring protected digital inputs. bank digital outputs optionally provide pulsewidth modulation under software control. Switching voltage regulator with some excess capacity external loads. programmable LEDs. Quick-disconnect screw terminal blocks with pitch.
PK2500
Overview
Table lists versions PK2500 that available.
Table 1-1. PK2500 Series Features
Model Features
PK2500 PK2510
Standard full-featured model PK2500 with 9.216 clock, SRAM, fixed connectors
PK2500 also available without enclosure. PK2500 designed with flexibility mind. Nine input/output assignments assignable jumpers, allowing quick tailoring specific configurations. circuit layout PK2500 been optimized quick-turn custom manufacturing. Automated surface-mount manufacturing deliver PK2500 controller with exact hardware configuration required application.
Appendix provides detailed specifications PK2500.
Optional Accessories
following accessories available PK2500. Development containing manual with schematics, programming cable, adapter, sourcing high-current driver chip. Rail mounting kit. Sourcing driver kit. Serial Interface Board allow programming through special programming port, leaving serial channels available application.
ordering information, more details about various options prices, call your Z-World Sales Representative (530) 757-3737.
Software Development Evaluation Tools
Dynamic Z-Worlds Windows-based real-time language development system, used develop software PK2500. host downloads executable code through Serial Interface Board serial ports flash EPROM.
Z-Worlds Dynamic reference manuals provide complete software descriptions programming instructions.
PK2500
Overview
Compliance
PK2500 been tested approved competent body, found conformity with applicable equivalent standards. Note following requirements incorporating PK2500 your application comply with requirements. power supply provided with Development development purposes only. customers responsibility provide clean supply controller applications end-products. PK2500 been tested Light Industrial Immunity standards. Additional shielding filtering required industrial environment. PK2500 been tested EN55022 Class emission standards. Additional shielding filtering required meet Class emission standards.
Visit Technical Reference pages Z-World site http://www.zworld.com more information shielding filtering.
PK2500
Overview
Blank
Overview
PK2500
CHAPTER
GETTING STARTED
Chapter provides instructions connecting PK2500 host running sample program. following sections included. Initial PK2500 Setup Connecting PK2500 Host Running Dynamic Running Sample Program
PK2500
Getting Started
Initial PK2500 Setup
Parts Required
unregulated power supply Programming cable
Connecting PK2500 Host
PK2500 programmed directly through serial port through Serial Interface Board (SIB2). Connect power supply terminals shown Figure 2-1.
PK2500
Long Lead Shrink Wrap Short Lead Power Supply Leads
Figure 2-1. Power Supply Connections
plug transformer into wall until connections jumpers have been set. transformer other than supplied with Developers used, ensure that input voltage specifications exceeded. Appendix contains complete specifications PK2500.
Getting Started
PK2500
Ensure that Run/Program jumper (H2) installed shown Figure 2-2.
Run/Program Jumper
RJ-12 Connector
Figure 2-2. Run/Program Jumper Location
particular attention installation Run/Program jumper possible install jumper that pins connected. PK2500 will change modes this jumper installed incorrectly. Establish serial communication link Option 1Via RS-232 Serial Port adapter programming cable supplied with developers connect PK2500s RJ-12 (J2) socket appropriate computer port shown Figure 2-3.
PK2500 Programming Cable
Port
Adapter
Figure 2-3. Programming Connections RS-232 Port
PK2500
programming cable supplied with Developers avoid problems with mismatched plugs.
Getting Started
Option 2Via Optional Serial Interface Board (SIB2) SIB2 optional development tool that allows both serial ports available application. PK2500 uses Z-World CM7200 core module microprocessor core. CM7200 additional programming port, JP1, that connects 8-pin connector, bypassing PK2500s RJ-12 modular jack (J2). Connect RJ-12 cable between SIB2 RJ-12/DB9 adapter attached host (see Figure 2-4). Plug SIB2s 8-pin connector into header located CM7200. Observe polarity cable used connect SIB2 JP1. side cable closest marked blue, indicated Figure 2-4. PK2500 ready programming. transformer plugged
Running Dynamic
Test Communication Line
Double-click Dynamic icon start software. Note that attempts communicate with PK2500 each time Dynamic started. error messages displayed once communication established.
Appendix Troubleshooting, error message such Target Responding Communication Error appears. Once necessary changes have been made establish communication between host PK2500, Dynamic shortcut <Ctrl reset controller initiate communication.
Getting Started
PK2500
6-conductor RJ-12 Cable
Port
RJ12-to-DB9 Adapter
Blue Conductor
Board
Battery
View
CM7200 Board
Relay Relay
Run/Program Jumper
Figure 2-4. Programming Connections Serial Interface Board
PK2500
Getting Started
Selecting Communications Rate, Port, Protocol
communication rate, port, protocol selected choosing Serial Options from Dynamic OPTIONS menu. PK2500 supports communication baud rate 57,600 bps. However, Dynamic software shipped Z-World initialized different baud rate. begin, select communication rate 57,600 bps. slower rate required, which case PK2500 should reset with <Ctrl after lower rate selected. SIB2 automatically adjusts communication baud rate 9600 bps, 19,200 bps, 28,800 bps, 57,600 bps. Make sure that serial port used connect serial cable (COM1 COM2) selected Dynamic OPTIONS menu. Select 1-stop-bit protocol.
Running Sample Program
sample program FLASHLED.C supplied Dynamic SAMPLES\PK25xx subdirectory. This program flashes board. Prior running this test, sure communications parameters Dynamic that PK2500 handshaking properly. Compile program pressing choosing Compile from COMPILE menu. Dynamic compiles downloads program. program pressing choosing from menu. LEDs PK2500 will begin flashing differing rates. Press <Ctrl stop execution program. needed, press restart execution program. Dynamic SAMPLES\PK25xx subdirectory contains other sample programs that illustrate features PK2500. These programs used basis applications.
Getting Started
PK2500
INPUT/OUTPUT CONFIGURATION
Chapter describes built-in flexibility PK2500 controller describes configure available inputs/outputs. following sections included. PK2500 Inputs Outputs Configuring Serial Communications Configuring Inputs Outputs PK2500 Subsystems
CHAPTER
PK2500
Input/Output Configuration
PK2500 Inputs Outputs
PK2500 provides types inputs/outputs (I/O). Protected digital inputs High-current driver outputs Analog digital converter inputs Serial communication channels Relay outputs LEDs
Flexible Inputs/Outputs
PK2500 pins dedicated I/O. Some pins have fixed functions, others configured using jumpers. inputs outputs mixed matched suit particular application. Figure shows signal names pins Table Table list possible function combinations.
AIN0 AIN1 AIN2 AIN3/VREF IN-00 IN-01 IN-02 IN-03 IN-04 IN-05 IN-06 IN-07
RELAYS
OUT-00 OUT-01 OUT-02 OUT-03/IN-15 OUT-04/IN-14 OUT-05/IN-13 OUT-06 OUT-07 OUT-08 OUT-09/IN-12 OUT-10/IN-11 OUT-11/IN-10 IN-09/485+ IN-08/485GND
Programmable
Relay LEDs
RS-232
Figure 3-1. PK2500 Pinout
Input/Output Configuration
PK2500
Table 3-1. PK2500 Header Functions
Function Label Function (user assignable)
Converter Input Converter Input Converter Input Converter Input Analog Ground Protected Digital Input Protected Digital Input Protected Digital Input Protected Digital Input Protected Digital Input Protected Digital Input Protected Digital Input
AIN0 AIN1 AIN2 AIN3/VREF IN-00 IN-01 IN-02 IN-03 IN-04 IN-05 IN-06
IN-07 RELAYS-0-NO RELAYS-0-COM RELAYS-1-COM RELAYS-1-NO
Protected Digital Input Ground Relay normally open Relay common Relay common Relay normally open
Voltage Reference Output Protected Digital Input with level-sensitive interrupt (/INT0)* Protected Digital Input with level-sensitive interrupt (/INT1)*
These interrupts software-assignable. Chapter "Software Reference," further details.
PK2500
Input/Output Configuration
Table 3-2. PK2500 Header Functions
Function Label Function (user assignable)
OUT-00 OUT-01 OUT-02 OUT-03/IN-15 OUT-04/IN-14 OUT-05/IN-13 OUT-06 OUT-07 OUT-08 OUT-09/IN-12 OUT-10/IN-11 OUT-11/IN-10 IN-09/485+ IN-08/485GND
Power Supply Input High-Current Driver Supply Ground High-Current Output High-Current Output High-Current Output High-Current Output High-Current Output High-Current Output High Current Driver 6-11 supply High-Current Output High-Current Output High-Current Output High-Current Output High-Current Output High-Current Output Protected Digital Input Protected Digital Input Ground
Protected Digital Input Protected Digital Input Protected Digital Input Protected Digital Input Protected Digital Input Protected Digital Input +RS-485 Serial Communication -RS-485 Serial Communication
Input/Output Configuration
PK2500
Configuring Serial Communications
PK2500 serial-communication ports. Table provides three mutually exclusive combinations RS-232 RS-485 serial protocols that applied ports.
Table 3-3. PK2500 Serial Communication Configurations
Header Jumpers Configurations
Configuration
3-wire RS-232 handshaking)
Configuration
5-wire RS-232 (RTS/CTS handshaking) RS-485
Configuration
3-wire RS-232 handshaking) RS-485
PK2500
Input/Output Configuration
Configuring Inputs Outputs
This section describes configure specific application requirements.
Protected Digital Inputs High-Current Outputs
This section provides information setting jumpers header configure pins 1416 header high-current outputs (OUT-03 OUT-05 OUT-09 OUT-11) protected digital inputs (IN-10 IN-15). Figure illustrates jumper settings header When jumper installed, corresponding configured protected digital input. When jumper installed, corresponding configured high-current output.
Each channel individually desired.
OUT-11 OUT-10 OUT-09 OUT-05 OUT-04 OUT-03 IN-10 IN-11 IN-12 IN-13 IN-14 IN-15
OUTPUTS
INPUTS
Figure 3-2. Setting PK2500 Header Protected Digital Inputs High-Current Outputs
high-current driver output remains hardwired header pins when jumper installed header configure these pins protected digital inputs. enable output drivers channels configured protected digital inputs header unless appropriate jumpers have been removed configure these pins high-current outputs.
Input/Output Configuration
PK2500
RS-485 Protected Digital Inputs
This section provides information setting jumpers header configure pins header protected digital inputs (IN-08 IN-09) RS-485 communications port (RS-485+ RS-485-). Figure illustrates jumper settings header
IN-08 IN-09
RS-485
Figure 3-3. Setting PK2500 Header Protected Digital Inputs RS-485
Converter Input Voltage Reference Output
This section provides information setting jumpers header configure header converter input (AIN3) voltage reference output (VREF). Figure illustrates jumper settings header
AIN3
VREF
Figure 3-4. Setting PK2500 Header Converter Input Voltage Reference Output
PK2500
Input/Output Configuration
PK2500 Subsystems
Figure summarizes PK2500s subsystems.
Z180 Serial Serial Timers
Reset
RS-232
RS-485 LED1 LED2
Regulator
Flash EPROM
VRAM
Supervisor
VBAT
Internal Battery
Analog Inputs Protected Inputs
High-Current Outputs Configurable
Relay Outputs
Figure 3-5. PK2500 Subsystems
Input/Output Configuration
PK2500
CHAPTER
SYSTEM DEVELOPMENT
Chapter describes features PK2500 controller. following major sections included. PK2500 Operating Modes Running Program Using Digital Inputs/Outputs Protected Digital Inputs High-Current Outputs Serial Communication Relay Outputs Analog-to-Digital Converter Inputs Additional Features Pulse-Width Modulated Outputs User-Programmable LEDs Real-Time Clock (RTC) Power Supervisor Output
PK2500
System Development
PK2500 Operating Modes
PK2500 mutually exclusive operating modes, only which responds Dynamic Each mode explained detail below. Program Mode Program Mode, PK2500 runs under control which running Dynamic PK2500 must this mode compile program debug program. Program Mode, PK2500 matches baud rate port 57,600 bps. Baud rates 9600 bps, 19,200 bps, 28,800 bps, 57,600 possible. User LED, shown Figure 4-1, enabled remain continuously; disabled, off. Both LEDs available application being developed.
User
Battery
Figure 4-1. User Locations
Mode
Mode, PK2500 controller runs standalone. power-up, PK2500 checks onboard memory contains program. such program exists, PK2500 executes program immediately after powerup. Both LEDs under control application while PK2500 Mode. default User
PK2500 Mode will respond Dynamic running Programs cannot compiled debugged while PK2500 Mode. Mode, PK2500 takes approximately boot begin execution program flash EPROM.
System Development
PK2500
Table lists PK2500 activities modes.
Table 4-1. PK2500 Activities While Program Mode Mode
Operating Mode Jumper Activities
Program Mode
Installed
Compile program program under debugger
control
program without "polling."
Dynamic manuals description program polling. Mode Removed program (application)
Changing PK2500s Operating Mode
These steps describe change PK2500s operating mode. Disconnect power from PK2500. Locate Run/Program jumper that protrudes from board next RJ-12 connector (J2). Figure shows location jumper
Run/Program Jumper
RJ-12 Connector
Figure 4-2.
Location Run/Program Jumper
Select Mode Program Mode. Install jumper select Program Mode. Remove jumper select Mode. Reapply power restart PK2500 selected mode. particular attention installation Run/Program jumper possible install jumper that pins connected. PK2500 will change modes Run/Program jumper installed incorrectly.
PK2500 System Development
Running Program
Place PK2500 Program Mode (with Run/Program jumper installed cycle units power. Open program already open. Select Compile command from Compile menu, press errors detected, Dynamic compiles program automatically downloads into PK2500s onboard flash EPROM memory. Remove power from PK2500. Remove Run/Program jumper. Reapply power PK2500. This resets PK2500 Mode, downloaded program begins run. program loaded permanently PK2500s onboard flash EPROM. This program will automatically every time PK2500 powers Mode until another program loaded.
flash EPROM rated lifetime only 100,000 writes (unlimited reads). write flash EPROM from within loop. flash EPROM should written only response human request each write.
Follow these steps return Program Mode. Disconnect power from PK2500. Reinstall Run/Program jumper header Refer Figure jumper location. Reapply power PK2500.
System Development
PK2500
Using Digital Inputs/Outputs
Protected Digital Inputs
PK2500 provides protected digital inputs. These inputs designed logical data inputs, returning either Boolean (ON) (OFF). inputs accept voltages range with logic threshold This means that protected digital input returns (OFF) input voltage below returns (ON) input voltage above Protected digital inputs used with CMOS compatible hardware drivers sensors. This compatibility allows system interface directly with other electronic hardware such peripheral controllers various mechanical switches, including relay contacts. PK2500 also provides level-sensitive interrupts that wired parallel with protected inputs IN-06 IN-07. level-sensitive interrupts software-assignable.
Chapter Software Reference, additional details level-sensitive interrupts. Appendix Specifications, provides complete specifications PK2500s protected digital inputs.
Read Inputs following Dynamic software driver reads status specified protected digital input. eioBrdDI( unsigned chanNum Reads state input channel. PARAMETER: chanNum must number ranging from (for IN-00) through (for IN-15). RETURN VALUE: only input channel reads low. only input channel reads high. only chanNum range (eioErrorCode bitored with EIO_NODEV).
PK2500
System Development
sample input demonstration program DI.C SAMPLES\PK25xx subdirectory illustrates eioBrdDI driver. DI.C
#use eziopk25.lib #define INPUT0 PK2500 library Assign INPUT0 protected digital input IN-00 Create integer Initialize PK2500 Assign integer status INPUT0 %d\n, Print status IN-00 STDIO window Assign integer status INPUT0 %d\n, Print status IN-00 STDIO window program
main() eioBrdInit(0); eioBrdDI(INPUT0); printf(IN-00 Status: eioBrdDI(INPUT0); printf(IN-00 Status:
following steps explain sample input demonstration program. Open sample program. Compile program pressing choosing Compile from Compile menu. Connect wire from header PK2500 (+DC) header (IN-00). This connection provides logic level IN-00. Check make sure that does exceed limit protected digital inputs, before completing Step power supply included with Developers exceed Dynamic command (run/step over) single-step through program line marked this point, Dynamic STDIO window opens displays status IN-00. status IN-00 should status STDIO window open, check hardware connections program.
System Development PK2500
PK2500s protected inputs factory-configured pull-up. inputs then return logic level when connected ground.
Remove wire from header (+DC), connect this header (GND). Leave wire header (IN-01) connected. Dynamic command (run/step over) single-step through program line marked this point, Dynamic STDIO window opens displays status IN-00. status IN-00 should status STDIO window open, check hardware connections program. Continue press until program terminates. Repeat steps through desired other protected inputs.
High-Current Outputs
PK2500 provides high-current driver outputs banks six. Each group outputs factory-configured with sinking drivers, optionally configured with sourcing drivers. configuring bank sourcing other sinking, possible create push-pull bidirectional drivers control loads such small reversible motors. Each bank high-current driver outputs provide with maximum output output channel.
Appendix Sinking Sourcing Drivers, provides more information sinking sourcing drivers.
Outputs following Dynamic software turns specified high-current driver OFF. eioBrdDO( unsigned chanNum, char state Changes state output channel. PARAMETERS: chanNum must range from (for OUT-00) through (for OUT-11).
state only corresponding output disabled (OFF); only corresponding output enabled (ON)
RETURN VALUE: only chanNum within range. only chanNum range (eioErrorCode bitored with EIO_NODEV).
PK2500
System Development
sample input demonstration program DO.C SAMPLES\PK25xx subdirectory illustrates eioBrdDO driver.
DO.C
#use eziopk25.lib #define OUTPUT0 #define #define
main() eioBrdInit(0); initialize PK2500 eioBrdDO(OUTPUT0,OFF); Turn-off OUT-00 eioBrdDO(OUTPUT0,ON); Turn-on OUT-00 eioBrdDO(OUTPUT0,OFF); Turn OUT-00 program
PK2500 library Assign OUTPUT0 highcurrent output OUT-00 Assign logic value Assign logic value
following steps explain sample output demonstration program. Open sample program. Compile program pressing choosing Compile from Compile menu. Connect wire from header PK2500 (+DC) header (KA). Connect device such voltmeter between header (OUT-00) (KA), shown Figure 4-3, monitor status driver.
PK2500
OUT-00
Voltmeter
Figure 4-3. OUT-00 Status Example
System Development
PK2500
Exercise caution when connecting device highcurrent driver. exceed voltage current limitations high-current driver. Appendix contains complete specifications. Dynamic command (run/step over) single-step through program line marked this point, device should OFF. voltmeter will read approximately because output pulled ground. device OFF, check hardware connections program. Dynamic command (run/step over) single-step through program line marked this point, device should voltmeter will read approximately (+DC) because output pulled ground. device check hardware connections program. Dynamic command (run/step over) single-step through program line marked this point, device should again (the voltmeter will read approximately device OFF, check hardware connections program. Continue press until program terminates. Repeat steps through desired other outputs.
PK2500
System Development
Serial Communication
PK2500 provides serial communication ports that configured RS-232 and/or RS-485.
Chapter Input/Output Configuration, further details serial channel configurations.
RS-232 Communication
RS-232 asynchronous serial communication protocol that fullduplex (simultaneous bidirectional data transfer). RS-232 ports Dynamic software allow PK2500 communicate with other computers controllers. modem allows remote communication (including remote downloading) using X-modem protocol. RS-232 software drivers found Dynamic SAMPLES\AASC subdirectory.
Refer Dynamic manuals additional information remote downloading. optional Serial Interface Board leaves both serial ports available application during software development. special cable made access both RS-232 ports needed.
RS-232 Connector Pinouts 6-pin RJ-12 modular phone jack (J2) facilitates RS-232 connections. Table lists assignments connector
Table 4-2. Assignments
Handshaking (Configuration Handshaking (Configuration III)
RS-232 Transmit RS-232 Receive RS-232 RS-232 regulated
Transmit RS-232 Transmit RS-232 Receive RS-232 Receive RS-232 regulated
pull more than from
System Development
PK2500
RS-485 Network
PK2500 configured provide channel RS-485 communication. RS-485 asynchronous multidrop half-duplex standard that provides multidrop networking with maximum cable lengths 1000
Master
Termination Resistor: Required
Slave
Termination Resistor: Required
Slave
Termination Resistor: Required
Figure 4-4. RS-485 Multidrop Network
RS-485 drivers support nodes. transmission bandwidth reduced more than nodes added. Contact Z-World Technical Support assistance with large-scale network design.
PK2500 System Development
Dynamic provides library functions master-slave two-wire half-duplex RS-485 9-bit binary communications. This RS-485 hardware standard supports controllers network. software supports master unit, plus slave units (which consist combination Z-World controllers that support RS-485 protocol). resulting multidrop network (shown Figure 4-4) span kilometer, facilitating design robust distributive control system. Follow these steps configure multidrop network. Configure pins header RS-485 communications, outlined Configuring Serial Communications section Chapter Connect RS-485+ RS-485+ RS-485- RS-485- networked controllers, using single twisted-pair wires. Figure reference.
Refer Dynamic manuals additional information master-slave networking.
Termination Bias Resistors Termination bias resistors required multidrop network minimize reflections (echoing) keep network line active when idle state. Bias resistors required most cases master controller keep network line reliable. PK2500 factory-configured with bias resistors installed. external termination resistor required. jumper header determines whether onboard termination resistor connected network. termination resistor needed only physical ends network, shown Figure 4-4. resistor disconnected removing jumper. Figure summarizes jumper configuration.
Termination resistor connected
Termination resistor connected
Figure 4-5. PK2500 Jumper Settings Header Termination Resistor System Development PK2500
Relay Outputs
PK2500 relays drive external loads. contacts Relay available pins header while those Relay available pins header Both sets contacts normally open. relays rated load, example, maximum switching voltage
compliance, maximum relay switching voltage less than
LEDs provided provide visual development field diagnostics. turns when Relay activated. does same Relay Figure shows relay outputs.
RELAY
RELAYS
RELAY
Figure 4-6. Relay Outputs
onboard snubber network provided each relay attenuate switching transients that develop when inductive loads driven. Each network consists resistor series with capacitor. remotely possible some switching transients large enough cause disruptive interference PK2500 logic. This depends large degree size reactance load. This should problem because relays only rated resistive loads. Inductive loads should derated. External transient suppressors, such metal oxide
PK2500 System Development
varistors (MOVs) added parallel with relay contacts there problems despite built-in snubber circuitry. MOVs come range protective-voltage ratings. Select with voltage rating slightly higher than that load. Figure shows MOVs installed across relay outputs.
RELAYS
Relay Relay
MOVs
Relay
Relay
Figure 4-7. Installation Metal Oxide Varistors Suppress Transients
heat-shrink tubing over exposed portions leads, especially high voltages (over being switched.
Relay Outputs
following Dynamic software turns specified relay OFF. eioBrdRelay( unsigned chan, char onOff Changes state (whether relays energized) relays PK2500. PARAMETERS: chan identifies which relay switch0 Relay Relay
onOff specifies whether relay should energized (non-zero)
de-energized (zero). RETURN VALUE:
operation successful. only chan range (eioErrorCode bit-ored with EIO_NODEV).
System Development
PK2500
sample relay output demonstration program REL.C SAMPLES\PK25xx subdirectory illustrates eioBrdRelay driver. REL.C
#use eziopk25.lib #define OUTPUT0 #define #define PK2500 library Assign OUTPUT0 relay output REL0 Assign logic value Assign logic value
main() eioBrdInit(0); initialize PK2500 eioBrdRelay(OUTPUT0,OFF); Turn REL0 eioBrdRelay(OUTPUT0,ON); Turn REL0 eioBrdRelay(OUTPUT0,OFF); Turn REL0 program
following steps explain Relay Output Demonstration Program. Open sample program. Compile program pressing choosing Compile from Compile menu. Dynamic command (run/step over) single-step through program line marked this point, relay should OFF. relay OFF, check hardware connections program. Dynamic command (run/step over) single-step through program line marked this point, relay should should flash. relay check hardware connections program. Dynamic command (run/step over) single-step through program line marked this point, relay should again. relay OFF, check hardware connections program. Continue press until program terminates. Repeat steps through desired other relay output.
PK2500
System Development
Analog-to-Digital Converter Inputs
PK2500 four analog input channels that brought header analog inputs designated AIN0 AIN3, listed Table 4-3.
Table 4-3. Analog Input Channel Numbers
Header Signal Dynamic Channel
AIN0 AIN1 AIN2 AIN3
Analog Ground
header analog ground only. this ground other signals.
analog input channels configured wide range input voltages. default input range analog inputs analog inputs configured almost input range replacing resistors input amplifier circuit. Each analog channel consists inverting amplifier referenced userdefined offset voltage, shown Figure 4-8.
0.01
Input
converter
VREF
BOTTOM
Figure 4-8. Analog Input Amplifier
System Development
PK2500
Table shows analog input amplifier components.
Table 4-4. Analog Input Component References
Channel RTOP RBOTTOM
AIN0 AIN1 AIN2 AIN3
Changing values RBOTTOM sets gain offset channel. Figure shows locations RBOTTOM resistors.
Figure 4-9. Locations RBOTTOM Resistors
Table shows resistor values some common analog input voltage ranges.
Table 4-5. Resistor Values Common Input Ranges
Channel Input Range RBOTTOM
-10.0 0.25 0.25 0.10 0.10 +10.0 +0.020 0.100
PK2500
11.8 23.7 47.5 59.0 1180 23.7 46.4 93.1 47.5 3010
8.06 6.65 4.99 4.53 2.87 1.69 0.953 0.392 39.2 19.6 10.0 4.02 13.3 140.0 0.402
System Development
application requires input voltage range shown Table 4-5, correct values RBOTTOM determined using formulas presented next section. RBOTTOM both 1206-size surface-mount technology (SMT) resistors.
analog input resistors capacitors surface-mounted. proper techniques (see Z-World Technical Note 106, Soldering Desoldering Surface-Mount Chip Components) remove replace these parts.
Scaling Input Range
Once input range been determined, appropriate resistor values must selected. steps below describe this process. first step setting channel choose gain resistor. Equation (4-1) determine value gain resistor.
(4-1)
Next, select RBOTTOM using Equation (4-2).
RBOTTOM
(2.5 (2.5
(4-2)
Select appropriate resistor values. Standard resistor values found many electronics references catalogs. Using resistors will give better accuracy greater number choices than using resistors. select next standard value less than standard value closest computed value. Choosing lower value helps insure that input signal does exceed reference voltage ADC. RBOTTOM, select nearest standard value.
System Development
PK2500
verify that calculated values provide correct gain offset, plug VINmin VINmax into Equation (4-3).
RBOTTOM VOUT BOTTOM RBOTTOM RBOTTOM
(4-3)
VINmin should yield positive VOUT just less (within than VINmax should yield positive VOUT just greater (within than zero. Test circuit verify works properly. Example Given sensor that output VINmin follows. VINmax VINmin Determine value gain resistor using Equation (4-1).
(2)- 83.3 (ideal value).
Select RBOTTOM using Equation (4-2).
RBOTTOM
83.3 (2.5 (2)) (2.5) (105 5.71 (ideal value).
Select resistor values. next lower standard value 80.6 closest standard value RBOTTOM 5.76
PK2500
System Development
Now, check values plugging VINmin VINmax into Equation (4-3). Check VOUT VINmin.
80.6 (-1) VOUT
2.456
This value VOUT within using VINmin. Check VOUT VINmax.
80.6 VOUT
0.038
This value VOUT within using VINmax. Both VOUT numbers fall within acceptable output range. this example, with 80.6 RBOTTOM 5.76 analog channel will accept inputs from amplifier output then range from with little margin (~30 system error (for example, op-amp offset).
Theory Operation
This section presents complete analysis analog input circuit (see Figure 4-8). initial first-order approximation assumes following: Infinite open-loop gain, Zero output impedance, Zero voltage offset, Infinite input impedance, Zero input bias currents, Noiseless components.
System Development
PK2500
VOFF Voltage Divider voltage divider formed RTOP RBOTTOM provides offset voltage amplifier. offset voltage VOFF given Equation (4-4).
VOFF
BOTTOM BOTTOM RTOP
(4-4)
VREF PK2500 Gain Now, examine gain circuit. amplifier negative feedback topology will force error between amplifiers inputs zero. This implies following: V(INVERTING) V(NONINVERTING) VOFF Since there infinite impedance amps inputs, current through must equal current through current through determined Equation (4-5).
VOFF
(4-5)
current through IRg,
VOFF VOUT
(4-6)
Setting Equation (4-5) Equation (4-6) equal solving VOUT yields following:
VOUT VOFF
(4-7)
When VOFF zero, circuit scales factor -Rg/RIN. This gain. gain determined Equation (4-8).
(4-8)
This result agrees with gain classic inverting amplifier. Given desired input range, possible compute required circuit gain.
PK2500
System Development
amplifier needs input voltage range 0VREF input range ADC. Thus
(4-9)
PK2500 VREF shipped Once gain been computed, Equation (4-8) used compute Finding VOFF Once gain known, VOFF required center output range between VREF determined. Examine VOFF when minimum maximum. First, take case maximum VIN. Because circuit inverting amplifier, VINmax must VOUT zero. Start with Equation (4-7) substitute VOUT VINmax
VOFF VOFF
VOFF VOFF
(4-10)
Now, simplify using Equation (4-8). Substitute Equation (4-8) into Equation (4-10).
VOFF VOFF
VOFF VOFF
(4-11)
Then,
VOFF VINmax
(4-12)
System Development
PK2500
same thing VINmin. When VINmin presented VIN, VOUT VREF. true. Start with Equation (4-7) substitute VOUT VREF VINmin
VOFF VREF VOFF VOFF -VIN
VOFF VOFF
VOFF
(4-13)
VOFF VOFF
Rearrange solve VOFF.
VOFF
VOFF
VREF
(4-14)
Either Equation (4-12) Equation (4-14) used calculate VOFF.
Practical Considerations
Resistors available only discrete standard values. Once ideal values computed, standard value must selected. There more resistor values choose from than there resistor values. Also, resistors have lower temperature drift. There only slight difference cost between resistors. Resistors over should avoided. reasons avoid large resistor values circuit noise susceptibility part availability. Reducing adding external preamp alternative methods increasing gain large gain needed. PK2500 ±7.5 maximum offset voltage 25°C). This offset multiplied D.C. gain added VOUT. This means gain VOUT have offset input bias currents will also produce error voltages inputs that multiplied gain, will show offset VOUT. Fortunately, input bias currents very low, order picoamperes, this effect should negligible. avoid these offsets pushing VOUT beyond 0VREF range ADC, select smaller standard value than computed. This will sacrifice some dynamic range improved reliability. Selecting RBOTTOM matter picking standard value closest computed value.
PK2500 System Development
Input Impedance input impedance looking into circuit from just RIN. Note also that connected inverting input, which maintained amps negative feedback) VOFF. Gain increased sacrificing input impedance. fixed value will produce larger gain reduced. However, smaller will require source (often transducer) provide additional current, shown Equation (4-15).
VOFF
(4-15)
Frequency Response capacitor feedback loop fixes pole shown Equation (4-16). point single-pole filter hertz, capacitance.
(4-16)
filter will roll decade after This low-pass filter helps eliminate noise channel. pole should possible application. standard capacitor shipped 0.01
System Development
PK2500
Analog-to-Digital Converter
best converter with Z-World Dynamic drivers. This helps ensure that code will compatible with future versions PK2500 well other Z-World products. Using Analog Inputs factory calibrates each PK2500, storing each units individual zero offset actual gain each channel simulated EEPROM. library function eioBrdAI uses these calibration values provide adjusted readings analog inputs. float eioBrdAI( unsigned eioAddr Reads input performs analog-to-digital conversion. PARAMETERS: eioAddr specifies input read. eioAddr values through represent analog inputs through cause function return voltage read input. eioAddr values through also represent analog inputs through cause function return 12-bit data value analog input. RETURN VALUE: Voltage read eioAddr values through read successful. 12-bit data value read from converter eioAddr values through read successful. Sets eioErrorCode eioAddr range. eioBrdACalib( chanNum, float float Sets calibration constants needed eioBrdAI when called with chanNum equal function computes calibration coefficients stores them reserved locations nonvolatile memory. function eioBrdInit loads these constants from nonvolatile memory. PARAMETERS: chanNum must range from (for AIN0) through (for AIN3).
raw, digital reading corresponding applied analog resistance raw, digital reading corresponding applied analog resistance
PK2500
System Development
sample input demonstration program AI.C SAMPLES\PK25xx subdirectory illustrates eioBrdAI driver. AI.C
#use eziopk25.lib #define INPUTCHAN main(){ float raw, analog; eioBrdInit(0); initialize driver eioErrorCode clear error flag eioBrdAI(INPUTCHAN+16); read chan. read channel, scale with calibration constants eioErrorCode clear error flag analog eioBrdAI(INPUTCHAN); (eioErrorCode EIO_NODEV) printf(analog input channel doesnt exist!\n, INPUTCHAN); else printf(analog input channel reads 0x%04x, interpreted %f\n, INPUTCHAN, (int)raw, analog);
Using Voltage Reference jumpers header used configure header provide buffered copy internal reference voltage used converter. This useful applications such ratiometric measurements sensors need track same voltage reference used converter.
Channel op-amp serves buffer. draw more than since op-amps current drive limited. Chapter Input/Output Configuration, provides exact jumper configurations header serve either converter input voltage reference.
System Development
PK2500
Additional Features
This section provides information PK2500s additional features including pulse-width modulated outputs, user-programmable LEDs, real-time clock, power supervisor, output.
Pulse-Width Modulated (PWM) Outputs
high-current outputs PK2500 driven driver chips banks outputs each. feature available outputs either group time. supplied software provides levels support. first level provides easy-to-use fixed functions only four outputs. periods signals fixed 13.3 Hz), with resolution divisions period (8-bit resolution). Dynamic consumes about PK2500s processing power when used generate signals. second support level allows custom functions created outputs. Serial-communication baud rates affected when functions used because microprocessors functions overloaded. Serial data rates become limited fixed 4800 Serial Port sure reset Dynamic baud rate 4800 bps. Contact Z-World Technical Support (530)757-3737 assistance with functions.
Chapter Software Reference, advanced programming information.
Feature PK2500 produce fixed-frequency, fixed-phase, variable-duty-cycle square waves from high-current outputs. This section first presents simple, easy-to-use function that drives only four PK2500s outputs. more complex functions that require more indepth understanding generation presented later.
PK2500
System Development
Figure 4-10 Figure 4-11 provide transition timing diagrams.
Composite Edge 480/9.216 52.08
Single Edge 120/9.216 13.02
Chan
Chan1
Chan
Chan
Figure 4-10. Transition Timing
Wave Period: 480/9.216 13.33 (256 n0)480/9.216 52.08
Next Possible Transisition 480/9.216 52.08
Chan
Chan1
Chan
Chan
480/9.216MHz 52.08
Figure 4-11. Timing
System Development
PK2500
eioBrdAO( unsigned chanNum, unsigned state Specifies duty cycle particular output channel. chanNum number ranging from (for OUT-00) (for OUT03). state placeholder number ranging from turn channel) turn channel, 100% duty cycle). duty cycle state/256 (for example, duty cycle, duty cycle). function produces square waves outputs OUT-00, OUT-01, OUT-02, OUT-03. Notice that each square waves period exactly 1024 divisions. division equals clock cycles (120/9.216 13.02 function. Consequently, period each square wave 1024 13.02 13.33 Notice also that square waves displaced slightly from each other phase. That OUT-01s output starts ends division after OUT-00s, OUT-02s starts division after OUT-01s, OUT-03s starts division after OUT-02s. result, change particular channel possibly only every four divisions even though period each wave 1024 divisions. Therefore, resolution transition edge wave 1/256. function appear simple, aware side effects. function uses Z180s built-in hardware. This limits baud rate Z180 Serial Port 4800 bps, Z180 effectively runs slower. Make sure application calling this function also calls _eioBrdAORf every refresh driver period. Contact Z-World Technical Support (530)757-3737 assistance with functions.
PK2500
System Development
following sample program, AO1.C, SAMPLES\PK25xx subdirectory ramps output from OUT-00 down. AO1.C
#use eziopk25.lib #define OUT_CHAN pk2500 specific defns define output channel
main() auto unsigned dutyCycle; auto sign; eioBrdInit(0); initialize general _eioSetupAO1st(); initialize dutyCycle duty cycle starts sign ramp while this forever eioBrdAO(OUT_CHAN,dutyCycle); change cycle (_eioBrdAORf()==-1) break; refresh (dutyCycle 256) sign reverse else (dutyCycle sign reverse dutyCycle dutyCycle sign; ramp hitwd(); watchdog printf(AO refresh failed\n);
User-Programmable LEDs
PK2500 provides clearly visible surface-mounted LEDs, (D5) USER (D4). program control both LEDs. USER indicates various operating modes during program developmentit illuminates steadily indicate power-on that Z-World factory default BIOS functioning. following software drivers used turn LEDs OFF. outport(0x4141,1) Turns outport(0x4141,0) Turns OFF. outport(0x4142,1) Turns USER outport(0x4142,0) Turns USER OFF.
System Development
PK2500
Real-Time Clock (RTC)
PK2500s real-time clock maintains current time date, accounts number days different months, accounts leap years. backup battery keeps real-time clock running when power removed. Dynamic function library DRIVERS.LIB provides these functions. tm_rd Reads time date values from RTC. tm_wr Writes time date values RTC.
Power Supervisor
Dynamic Function Reference manual provides complete description these functions their associated data structures. real-time clock unable update during read cycle. real-time clock create small delays application. This could lead loss accuracy. Constant reading clock tight loop lead loss accuracy. Z-World does recommend using real-time clock schedule events.
PK2500 provides power supervisor that controls power-on reset function. This function holds reset line until rises above threshold ~4.75 When falls below this threshold, supervisor disables SRAM prevent writing spurious data. supervisor also switches SRAM battery power when falls below threshold voltage preserves SRAMs data until power restored. supervisor watchdog timer that guards against system software faults. PK2500s microprocessor will reset applications software does reset timer least once every second. Dynamic function hitwd resets supervisors watchdog timer.
PK2500
Refer Dynamic reference manuals further information hitwd.
System Development
addition, supervisor generates nonmaskable interrupt (NMI) when unregulated input (normally falls below 8.02 allow PK2500s microprocessor time execute safe shutdown. Together with appropriate interrupt service routine external power supply capacitance, this circuitry will allow PK2500 recover from brownouts. PK2500 able distinguish between power-on reset watchdog reset.
Appendix Power Management, further information power failure provisions. hitwd function program loop that takes longer than second execute.
Output
onboard switching regulator supplies derived from unregulated input voltage. There spare capacity approximately available external loads header also present header there connectors available that location.
System Development
PK2500
CHAPTER
SOFTWARE REFERENCE
Chapter describes Dynamic functions that initialize PK2500 perform operations. following sections included. Input/Output Software Drivers Digital Inputs/Outputs Level-Sensitive Interrupts Interrupt Service Routines
Pulse-Width Modulation Outputs Advanced Input/Output Programming Digital Input Addressing Detail Digital Output Relay Output Addressing Details Analog-to-Digital Converter Addressing Details Addressing Details RS-485 Driver Addressing Details Addressing Details Advanced Programming Functions
PK2500
Software Reference
Input/Output Software Drivers
Dynamic provides series software drivers controlling PK2500s inputs/outputs (I/O). These drivers located Dynamic EZIOPK25.LIB library. Include following line start application program access this library.
#use eziopk25.lib
EZIOPK25.LIB library contains following functions. void eioBrdInit( param Initializes software. Call this function initialization section program before using other functions. Always pass param. This function does call _eioSetupAO1st. Call _eioSetupAO1st separately DMA-driven pulse-width modulation output used. eioErrorCode Represents global bit-mapped register whose flags reflect error occurrences. This register initially eioBrdInit. flag EIO_NODEV (the first flag) this register application tries access invalid channel. Note that other bits EIO_NODEV deal with networked controllers.
Digital Inputs/Outputs
following digital functions located EZIOPK25.LIB library. eioBrdDI( unsigned chanNum Reads state input channel. PARAMETER: chanNum must number ranging from (for IN-00) through (for IN-10). RETURN VALUE: only input channel reads low. only input channel reads high. only chanNum range, that chanNum greater than (eioErrorCode bit-ored with EIO_NODEV).
Software Reference
PK2500
Table summarizes software input channel assignments.
Table 5-1. PK2500 Software Input Channel Assignments
Protected Digital Input Software Channel Assignment Protected Digital Input Software Channel Assignment
IN-00 IN-01 IN-02 IN-03 IN-04 IN-05 IN-06 IN-07
IN-08 IN-09 IN-10 IN-11 IN-12 IN-13 IN-14 IN-15
eioBrdDO( unsigned chanNum, char state Changes state output channel. PARAMETERS: chanNum must range from (for OUT-00) through (for OUT-11).
state only corresponding output disabled
OFF, only corresponding output enabled RETURN VALUE: only chanNum within range. only chanNum range, that chanNum greater than (eioErrorCode bit-ored with EIO_NODEV). Table summarizes software output channel assignments.
Table 5-2. PK2500 Software Output Channel Assignments
High-Current Output Software Channel Assignment High-Current Output Software Channel Assignment
OUT-00 OUT-01 OUT-02 OUT-03 OUT-04 OUT-05
OUT-06 OUT-07 OUT-08 OUT-09 OUT-10 OUT-11
PK2500
Software Reference
sample program DIO1.C turns PK2500 into relay. digital input IN00 (input channel grounded, digital output OUT-00 (output channel disabled (OFF). Otherwise, digital output enabled. DIO1.C
#use ezio.lib general definitions #use eziopk25.lib pk2500 specific defns #define IN_CHAN define input channel #define OUT_CHAN define output channel main() eioBrdInit(0); while this indefinitely hitwd(); watchdog
Level-Sensitive Interrupts
PK2500 generate level-sensitive processor interrupts under software control. interrupts respond logic level OFF.
logic level condition indicates that input voltage below threshold
Protected digital inputs IN-06 IN-07 connected directly /INT0 /INT1 interrupt lines Z180 processor, shown Figure 5-1.
/INT Line Z180
Input
High Impedance Z180 Data
CMOS Input
Figure 5-1. Level-Sensitive Inputs IN-06 IN-07
Software Reference
PK2500
factory default level-sensitive interrupts disabled (OFF), allowing inputs IN-06 IN-07 used standard protected digital inputs. When level-sensitive interrupts required, /INT0 /INT1 enabled (ON) disabled (OFF) including following commands application. ISET( ITC,0 Enables /INT0. ISET( ITC,1 Enables /INT1. IRES( ITC,0 Disables /INT0. IRES( ITC,1 Disables /INT1.
sample program EXTINT.C Dynamic SAMPLES\PK25xx subdirectory demonstrates protected digital inputs IN-06 IN-07 generate level-based interrupts, demonstrates interrupts captured interrupt routines.
Interrupt Service Routines
Z180 jumps executes interrupt service routines when receives interrupt request from /INT0 /INT1.
Refer Dynamic reference manuals instructions writing interrupt service routines (ISR). Refer Zilog Z80180/Z180 Users Manual more information using Z180 interrupts. When /INT0 /INT1 enabled (ON), logic level IN-07 IN-08 stops Z180 processor that performs specified application. other activities stopped until complete. Enabling /INT0 /INT1 severely affect interrupt latency other types interrupts, such those generated programmable reload timers, DMA, UARTs. Contact Z-World Technical Support (530)757-3737 assistance. /INT0 /INT1 only used when PK2500s inputs pulled-up configuration, which factory default. PK2500 will malfunction these interrupts enabled with inputs pulled-down configuration.
PK2500
Software Reference
Pulse-Width Modulation Outputs
following pulse-width modulation (PWM) functions located EZIOPK25.LIB library. void _eioSetupAO1st() Initializes hardware.
_eioSetupAO1st must called before using eioBrdAO.
eioBrdAO( unsigned chanNum, unsigned state Specifies duty cycle particular output channel. chanNum number ranging from (for OUT-00) (for OUT03). state placeholder number ranging from turn channel off) turn channel 100% duty cycle). duty cycle state/256 (for example, duty cycle, duty cycle).
Although feature available outputs bank, eioBrdAO only supports four outputs. Refer more advanced programming features later this chapter more than four outputs needed.
_eioBrdAORf() Refreshes counter address pointer. application must call _eioBrdAORf every more frequently) after _eioSetupAO1st called. function returns count zero (PWM stopped), returns otherwise. function returns means driver either initialized calling _eioSetupAO1st), _eioBrdAORf called less frequently than every While these functions simple use, there side effects associated with them. functions Z180s built-in hardware, which limits communication speed Z180s Serial Port 4800 bps. Z180 also runs slower. When using functions, remember that application must call _eioBrdAORf least every sample program AO1.C ramps output from OUT-00 down.
Software Reference PK2500
AO1.C
#use ezio.lib general definitions #use eziopk25.lib pk2500 specific defns #define OUT_CHAN define output channel main() auto unsigned dutyCycle; auto sign; eioBrdInit(0); initialize general _eioSetupAO1st(); initialize dutyCycle duty cycle starts sign ramp while this forever eioBrdAO(OUT_CHAN,dutyCycle); change cycle (_eioBrdAORf()==-1) break; refresh (dutyCycle 256) sign reverse else (dutyCycle sign reverse dutyCycle dutyCycle sign; ramp hitwd(); watchdog printf(AO refresh failed\n);
References Additional Software Features
real-time clock information, refer descriptions functions tm_rd tm_wr Dynamic reference manuals. information communication ports, refer descriptions AASC libraries Dynamic Function Reference manual. RS-485 driver switching covered on_485 off_485 Dynamic Function Reference manual. Watchdog information provided with hitwd Dynamic Function Reference manual. Simulated EEPROM information provided with ee_rd ee_wr Dynamic Function Reference manual. Power Fail Flag information provided with _sysIsPwrFail sysIsPwrFail functions Dynamic Technical Reference
manual.
PK2500
Software Reference
Advanced Input/Output Programming
previous section explains Dynamic functions read inputs write outputs. This section intended software engineers need optimize their code. topics discussed this section assume understanding part reader about Z180 peripheral architecture. These details contained Z180 technical manuals, available from Z-World. more information, call your Z-World Sales Representative (530)757-3737.
Table provides concise PK2500.
Table 5-3. PK2500
Address Description Comments
0x4140 (write) 0x4141 (write) 0x4142 (write) 0x4143 (write) 0x4144 (write) 0x4145 (write)
RS-485 Driver (RUN) (USER) Relay Relay OUT-00 OUT-05
Data indicates on/off: Same above Same above Same above Same above Data bits 0,1,2 select which highcurrent driver, indicates on/off: Data bits 0,1,2 select which highcurrent driver, indicates on/off: Data indicates on/off: selected, selected Data state IN-x Data state IN-x Data indicates current state serial output, address simultaneously supplies serial input Data indicates current state serial output, address simultaneously supplies serial input Data indicates state flag: busy; done
0x4146 (write) 0x4147 (write) 0x4160 (read) 0x4161 (read) 0x4142 (read)
OUT-06 OUT-11 chip select IN-00 IN-07 IN-08 IN-15 output data
0x4143 (read)
output data conversion
0x4144 (read)
Software Reference
PK2500
Digital Input Addressing Details
Read address 0x4160 states inputs IN-00 IN-07. this read, corresponds IN-00 corresponds IN-07. Read address 0x4161 states inputs IN-08 IN-15. this read, corresponds IN-08, corresponds IN-15. Table lists address structure digital inputs.
Table 5-4. PK2500 Digital Input States
0x4140 IN-07 IN-06 IN-05 IN-04 IN-03 IN-02 IN-01 IN-00
0x4141 IN-15 IN-14 IN-13 IN-12 IN-11 IN-10 IN-09 IN-08
Table provides Dynamic commands read each individual input.
Table 5-5. PK2500 Digital Input States
Channel Function Channel Function
IN-00 IN-01 IN-02 IN-03 IN-04 IN-05 IN-06 IN-07
IBIT IBIT IBIT IBIT IBIT IBIT IBIT IBIT
(0x4140,0) (0x4140,1) (0x4140,2) (0x4140,3) (0x4140,4) (0x4140,5) (0x4140,6) (0x4140,7)
IN-08 IN-09 IN-10 IN-11 IN-12 IN-13 IN-14 IN-15
IBIT IBIT IBIT IBIT IBIT IBIT IBIT IBIT
(0x4141,0) (0x4141,1) (0x4141,2) (0x4141,3) (0x4141,4) (0x4141,5) (0x4141,6) (0x4141,7)
PK2500
Software Reference
Digital Output Relay Output Addressing Details
Write address 0x4140 output states OUT-00 through OUT-11. lowest three bits number that specifies channels OUT-00). most significant indicates whether designated channel enabled (ON) disabled (OFF) Table summarizes digital output states.
Table 5-6. PK2500 Digital Output States
Address Channel
0x4140 0x4141 0x4142 0x4143 0x4144 0x4145 0x4145 0x4145 0x4145 0x4145 0x4145 0x4146 0x4146 0x4146 0x4146 0x4146 0x4146
RS485 Relay Relay OUT-00 OUT-01 OUT-02 OUT-03 OUT-04 OUT-05 OUT-06 OUT-07 OUT-08 OUT-09 OUT-10 OUT-11
xxxxxxx1 xxxxxxx1 xxxxxxx1 xxxxxxx1 xxxxxxx1 1xxxx000 1xxxx001 1xxxx010 1xxxx011 1xxxx100 1xxxx101 1xxxx000 1xxxx001 1xxxx010 1xxxx011 1xxxx100 1xxxx101
xxxxxxx0 xxxxxxx0 xxxxxxx0 xxxxxxx0 xxxxxxx0 0xxxx000 0xxxx001 0xxxx010 0xxxx011 0xxxx100 0xxxx101 0xxxx000 0xxxx001 0xxxx010 0xxxx011 0xxxx100 0xxxx101
example, turn OUT-04 lowest three bits should binary 100, most significant should making byte write (binary) 1xxxx100 (xxxx means values these bits does matter). 0x84 many variant representations binary 1xxxx100.
Software Reference
PK2500
Analog-to-Digital Converter Addressing Details
Three addresses used communicate with converter chip. active-low chip select input controlled address 0x4147. Write turn chip select line, write turn off, shown below. outport (0x4147,0) Enables converter chip. outport (0x4147,1) Disables converter chip. Conversion status line, EOC, read using data address 0x4144. read when conversion been completed, read when converter busy. Converted data read time using address 0x4142 0x4143. each read, command next conversion supplied converter chip, also time, depending which address used. least significant address bit, A00, does trick: reading from 0x4142 sends converter chip, while reading from 0x4143 sends Table summarizes converter input states.
Table 5-7. PK2500 Converter States
0x4144
0x4142 (read data write data
0x4143 (read data write data
Analog-to-Digital Converter Inputs Chapter System Development, more information converter inputs.
PK2500
Software Reference
Addressing Details
(Run) corresponds address 0x4141; write turn write turn off. outport(0x4141,1) Enables (Run) outport(0x4141,0) Disables (Run) OFF. corresponds address 0x4142, write turn write turn off. outport( 0x4142,1 Enables (User) outport( 0x4142,0 Disables (User) OFF.
RS-485 Driver Addressing Details
RS-485 driver corresponds address 0x4140. Write enable RS-485 driver, write disable RS-485 driver. outport( 0x4140,1 Enables RS-485 driver outport( 0x4140,0 Disables RS-485 driver OFF.
Addressing Details
pulse-width modulation (PWM) driver PK2500 fairly complicated. This because uses clock output from Communication Port (CKA1) drive request line Channel edge-detection mode. simple interface described previously (eioBrdAO) provides support OUT-00 OUT-05. application requires more channels, specific frequencies, precision, application engineer need make trade-offs. This section describes channels driven, well customize resource allocation compromise number modulated channels, frequency resolution. Step Determine number channels, frequency, resolution. pulse-width modulated waveform frequency resolution. frequency states many times pattern repeats itself second (Hz). resolution states many divisions within waveform resolved (distinguished). collection, driver also needs
Software Reference PK2500
know total number channels pulse-width modulated. channels assumed have same frequency resolution. clock output from Communication Port (CKA1) must have frequency where frequency CKA1, number channels modulated, frequency each channel, resolution number divisions wave. example, driver interface, _eioSetupAO1st, makes following assumptions: 76,800 256. Consequently, 76,800 Hz/(4 256) Step Declare storage waveform pattern buffer (WPB). Memory must allocated store waveform pattern. Step waveform. functions Z180s built-in mechanism transfer edges from memory high-current ports specific time intervals. Each edge byte whose least-significant three bits select high-current outputs, OUT-00 through OUT-11. most significant turn specified port (rising edge) turn specified port (falling edge). Edges channels being pulse-width modulated then grouped into composite transitions. Each composite transition series edges, each representing possible transition individual channel. example, OUT-00 OUT-01 only pulse-width modulated channels, composite transition consists bytes, specify possible transition channel OUT-01, other specify possible transition channel OUT-02. Assume first byte composite transition corresponds OUT-01, second byte corresponds OUT-02. composite waveform series composite transitions (CTs) that specify duty cycle pulse-width modulated channels. example, OUT-00 0.375 duty cycle, OUT-01 0.75 duty cycle, both with resolution divisions cycle, simple waveform would follows. CT1: turn OUT-00 turn OUT-01 CT2: nothing. CT3: nothing. CT4: turn OUT-00 off. CT5: nothing. CT6: nothing. CT7: turn OUT-01 off. CT8: nothing. back CT1.
PK2500 Software Reference
Outputting byte 0x80 turns OUT-00 0x00 turns OUT-00 off, 0x81 turns OUT-01 0x01 turns OUT-01 off. byte 0x07 no-op does nothing. This because OUT-07 corresponds address 0x4146, 0x4160. Consequently, composite transitions (with no-ops) translated into following byte sequence sent address 0x4160. CT1: 0x80, 0x81 CT2: 0x07, 0x07 CT3: 0x07, 0x07 CT4: 0x00, 0x07 CT5: 0x07, 0x07 CT6: 0x07, 0x07 CT7: 0x07, 0x01 CT8: 0x07, 0x07 back equivalent byte stream (contents waveform pattern buffer) repeating pattern following.
0x80, 0x81, 0x07, 0x07, 0x07, 0x07, 0x00, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x01, 0x07, 0x07
driver library provides function, dmapwmSetBuf, that allows application engineer modify content waveform pattern buffer.
function dmapwmSetBuf discussed later this chapter Advanced Programming Functions section.
Step clock. device transfer from memory port address 0x4160 driven falling edges signal /DREQ0. Since /DREQ0 connected CKA1 (the clock output communication channel communication speed Communication Channel determines frequently device transfers memory I/O. Each transfer corresponds edge previous section. driver includes function, dmapwmInit, that sets frequency CKA1. function described section. interface sets CKA1 clock 76,800 call _eioSetupAO1st().
function dmapwmInit discussed later this chapter Advanced Programming Functions section. Refer Zilog Hitachi users manual Z80180/Z180 64180 comprehensive explanation frequency CKA1.
Software Reference
PK2500
Step Refresh counter source address. device does automatically reload counter source address registers when specified amount bytes transferred. When finishes transferring specified amount bytes, stops optionally causes interrupt. other words, waveform abruptly ended when finishes. overcome this limitation, application program must periodically refresh counter source address registers refresh should check whether counter less than critical number. both counter source address registers must rewound previous state larger counter value corresponding lower source address). Note that waveforms cannot disrupted course refreshing registers. other words, previous state which refresh routine restores must phase-synchronized with waveforms moment. driver library provides refresh routine, _eioBrdAORf, refresh counter source address registers. _eioBrdAORf() called from preemptive task from main program. refresh routine must called frequently enough that counter never reaches following inequality states requirement. f1/(lwpb/2) which refresh frequency, frequency CKA1, lwpb total length waveform pattern buffer. example, _eioSetupAO1st() sets 76,800 lwpb 4096. result, application engineer must ensure 37.5 Step Change duty cycles. Once waveforms running, application need change duty cycles channel(s). This poses problems. First, change should only done channel that needs change duty cycle, other channels should remain same. Second, change must become effectively phase-synchronized with current waveform. solution first problem depends edges represented. particular, depends whether no-operation (no-op) edges used. no-op edges used, changing duty cycle matter moving edges that no-op.
PK2500
Software Reference
example Step change waveform from
0x80, 0x81, 0x07, 0x07, 0x07, 0x07, 0x00, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x01, 0x07, 0x07
0x80, 0x81, 0x07, 0x07, 0x00, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x01, 0x07, 0x07
change duty cycle OUT-00 0.25. underlined edges only ones affected. course, waveform pattern buffer have pattern repeated many times. Each occurrence pattern buffer must modified same way. Even though no-op edges seems compute-time inexpensive, does require application maintain location non-noop edges. other words, application must maintain duty cycle variable each channel well buffer waveform pattern. Recall that second problem changing duty cycle requirement change phase-synchronized current waveform. Many issues similar those refreshing counter pointer. driver software library provides function dmapwmSwBuf switch waveform pattern buffers.
sample programs Dynamic SAMPLES subdirectory provide further detailed explanations.
Advanced Programming Functions
void dmapwmSetBuf( char *pBufStart, char bufLength256, unsigned step, char outChar Formats part waveform pattern buffer DMA-driven PWM.
pBufStart points first byte formatted. Note that pBufStart does always have point 256-byte aligned
address.
bufLength256 length buffer, including overflow area. step number bytes skip between outputting outChar. outChar actual bytes send address.
other words, starting address pointed pBufStart, dmapwmSetBuf changes every step byte outChar bufLength256 many 256-byte units.
Software Reference
PK2500
void dmapwmSwBuf(unsigned newBuf256) buffers facilitate all-or-none duty cycle transitions. While buffer being used generate output, modify other buffer pattern. When buffer ready, this function should called switch buffer address pointed newBuf256 256-byte units. char *dmapwmBufBeg(char *bufPtr) buffer used mechanism starts 256-byte boundaries. Normal data definition declarations such
char buffer[0x2000]
start byte boundaries. dmapwmBufBeg returns character pointer that points first 256-byte aligned root address larger than equal parameter bufPtr. void dmapwmInit( unsigned phyBuffer256, unsigned bufSize256, unsigned resSize256, unsigned ioAddr, char cka1rate) Initializes mechanism. When function returns, CKA1 Communication Port generates clock pulses cka1rate approximately 19.2 /DREQ0. Channel would then transfer memory each clock pulse falling edge. phyBuffer256 256-byte aligned physical address buffer 256-byte units. general, buffer defined array root memory (that type char following expression should passed this parameter.
which buffer pointer type char array. bufsize256 size buffer, 256-byte units. This size should include overflow area. resSize256 size overflow area 256-byte units. ioAddr port which should transfer memory content. cka1rate clock rate generated CKA1 multiples 19.2 kHz. allowed values
PK2500
Software Reference
Blank
Software Reference
PK2500
APPENDIX
TROUBLESHOOTING
This appendix provides procedures troubleshooting system hardware software. following sections included. Dynamic Will Start Dynamic Loses Serial Link PK2500 Repeatedly Resets Common Programming Errors
PK2500
Troubleshooting
Check items mentioned this section before starting development. connect RS-485 equipment devices until PK2500 been verified standalone. Verify that entire host system good, low-impedance, separate grounds analog digital signals. Often PK2500 connected between host another device. differences ground potential from unit unit cause serious problems that hard diagnose. connect analog ground digital ground anywhere. Double-check connecting ribbon cables ensure that wires correct screw terminals PK2500. Verify that host port works connecting good serial device port. Remember that COM1/COM3 COM2/ COM4 share interrupts User shells mouse drivers, particular, often interfere with proper port operation. example, mouse running COM1 preclude running Dynamic COM3. Z-World power supply that comes with developers kit. another power supply must used, verify that enough capacity filtering support PK2500. Z-World cables that come with developers kit. most common fault user-made cables failure properly assert RS-232 port PK2500. Without being asserted, PK2500s RS-232 port will transmit. Assert either connecting signal port looping back PK2500s RTS. PK2500 Developers comes with RJ-12 cable. This cable looks very much like standard U.S. telephone cable, except uses 6pin RJ-12 connectors, 4-pin RJ-11 connectors.
regular U.S. telephone RJ-11 connector will plug will work.
Experiment with each peripheral device connected PK2500 determine appears PK2500 when powered powered down, and/or when connecting wiring open shorted.
Troubleshooting
PK2500
Dynamic Will Start
Dynamic will start, error message such Target Responding Communication Error appears Dynamic screen. following situations their possible resolutions usually behind these error messages. Wrong Baud Rate rare cases, baud rate changed when using Serial Interface Board development. Wrong Communication Mode Both sides must talking RS-232. Wrong Port generally serial ports, COM1 COM2. Specify being used Dynamic Target Setup menu. trial error, necessary. Wrong Operating Mode Communication with Dynamic will lost PK2500s jumper standalone operation. Reconfigure board programming mode.
else fails, connect serial cable PK2500 after powerup. RS-232 port supplies large current (most commonly portable industrial PCs), some RS-232 level converter into nondestructive latch-up. Connect RS-232 cable after powerup eliminate this problem.
Dynamic Loses Serial Link
program disables interrupts period greater than Dynamic will lose serial link with application program. Make sure that interrupts disabled period greater than
PK2500 Repeatedly Resets
PK2500 resets every second watchdog timer hit. program does watchdog timer, then program will have trouble running standalone mode. watchdog, make call Dynamic library function hitwd.
PK2500
Troubleshooting
Common Programming Errors
Values constants variables range. Table lists acceptable ranges variables constants.
Table A-1. Ranges Dynamic Function Types
Type Range
long float char
-32,768 (-215) +32,767 (215 -2,147,483,648 (-231) +2147483647 (231 1.18 10-38 3.40 1038
Mismatched types. example, literal constant 3293 type (16-bit integer). However, literal constant 3293.0 type float. Although Dynamic handle some type mismatches, avoiding type mismatches best practice. Counting from, down instead zero. software, ordinal series often begin terminate with zero, one. Confusing functions definition with instance listing. ending statements with semicolons. inserting commas required function parameter lists. Leaving ASCII space character between characters forming different legalbut unwantedoperator. Confusing similar-looking operators such with with with Inadvertently inserting ASCII nonprinting characters into sourcecode file. DMA-driven function drives output correctly while, then some channels remain while others remain OFF. most likely cause _eioBrdAORf called frequently enough. Either increase frequency with which this function called, increase size waveform platform buffer, slow down clock CKA1.
Troubleshooting
PK2500
APPENDIX
SPECIFICATIONS
This appendix provides comprehensive PK2500 physical, electronic environmental specifications. following sections included. Electrical Mechanical Specifications Factory Default Jumper Positions Protected Digital Inputs High-Current Drivers
PK2500
Specifications
Electrical Mechanical Specifications
Figure illustrates external dimensions PK2500.
Battery
0.525 (13.3)
Relay Relay
0.52 (13)
1.78 (45.2) 2.82 (71.2)
0.52 (13)
Figure B-1.
PK2500 External Dimensions
Table lists electrical, mechanical, environmental specifications PK2500.
Table B-1. PK2500 Specifications
Parameter Specification
Board Size Enclosure Size Operating Temperature Humidity Power Supply
2.82W 3.75L 1.18H (71.2 95.2 2.96"W 5.00L" 1.83"H
-40°C 70°C
95%, noncondensing 25°C with switching power supply
0.525 (13.3)
2.70 (68.6)
3.75 (95.2)
continued.
Specifications PK2500
Table B-1. PK2500 Specifications (concluded)
Parameter Specification
Digital Inputs
protected digital inputs, configured with level-sensitive interrupts configured RS-485 serial port digital outputs configured protected digital inputs groups high-current sinking, mA/channel (all channels
Digital Outputs
(optional) high-current sourcing, mA/channel digital outputs configured protected digital inputs groups
Converter Inputs
analog channels with 12-bit resolution, input voltage other ranges available factory options normally open with indicator LEDs, (resistive) (resistive) maximum switching voltage with suppression circuitry* relay outputs, under software control Z180 18.432 128K standard Flash memory used EEPROM 128K standard RS-232 RS-232 with RTS/CTS RS-485 programming either RS-232 port Serial Interface Board 57,600 BR2325-1HG equivalent, 3-year shelf life (power off), 10-year life (power Quick-disconnect screw terminal blocks, pitch
Relay Outputs
LEDs Processor Clock SRAM EEPROM Flash EPROM
Serial Ports
Serial Rate Watchdog/Supervisor Time/Date Clock Backup Battery Connectors
compliance, maximum relay switching voltage less than
Specifications
PK2500
Factory Default Jumper Positions
Figure illustrates header locations PK2500 main board. jumpers configurations these headers listed Table B-2.
Battery
(Run/Program)
Figure B-2. Locations PK2500 Headers
Table B-2. PK2500 Header Connections
Header Pins Description Factory Default
Connect reset PK2500 Configure RS-485 communication pins Configure protected digital inputs IN-08 IN-09 pins Connect pins enable program mode RS-485 serial port 5-wire RS-232 serial port 3-wire RS-232 serial ports handhsaking)
connected Pins connected enable protected digital inputs IN-08 IN-09
Pins connected
Pins connected
continued.
Specifications
PK2500
Table B-2. PK2500 Header Connections (concluded)
Header Pins Description Factory Default
Connect configure voltage reference output Connect enable RS-485 termination resistor Connect configure IN-15 (OUT-03 when disconnected) Connect configure IN-14 (OUT-04 when disconnected) Connect configure IN-13 (OUT-05 when disconnected) Connect configure IN-12 (OUT-09 when disconnected) Connect configure IN-11 (OUT-10 when disconnected) Connect configure IN-10 (OUT-11 when disconnected) Connect configure OUT-00 OUT-05 sinking Connect configure OUT-00 OUT-05 sourcing Connect configure OUT-06 OUT-11 sinking Connect configure OUT-06 OUT-11 sourcing
connected; converter input connected
connected
connected
connected
connected
9-10
connected
11-12
connected
Pins connected enable sinking outputs OUT-00 OUT-05
Pins connected enable sinking outputs OUT-06 OUT-11
PK2500
Chapter Input/Output Configuration, more details jumper configurations. While power must normally disconnected when reconfiguring jumpers, power left when connecting/ disconnecting pins reset PK2500.
Specifications
Protected Digital Inputs
Table lists specifications protected digital inputs.
Table B-3. Protected Digital Input Specifications
Protected Digital Inputs Maximum Rating
Digital Input Voltage Digital Input Current Frequency Response (worst case)
Faster than longer than 1.52 (input
Frequency Response IN-00 IN-05, IN-08 IN-15
protection network consists low-pass filter with point example, driving source protected input step function, that step becomes available 1.38 later valid CMOS input PK2500s data bus. following formula shows affect frequency response protected inputs IN-00 through IN-05 IN-08 through IN-15. [2RINC]-1 [(2)(22 103)(10 10-9)]-1 [fc]-1 1.38 0.707 full input value) Figure shows circuit protected inputs IN-00 through IN-05, IN-08 through IN-15 factory-default pulled-up configuration.
Input
High Impedance Z180 Data
CMOS Input
Figure B-3. Protected Digital Inputs IN-00 IN-05, IN-08 IN-15
Specifications
PK2500
Frequency Response IN-06 IN-07
These interrupt-ready inputs also have protection network that consists low-pass filter. point 7.23 because input resistors have lower resistance. example, driving source these protected inputs step function, then that step voltage registers approximately later valid CMOS input PK2500s data bus. Figure shows circuit IN-06 IN-07 factory-default pulled-up configuration.
/INT Line Z180
Input
High Impedance Z180 Data
CMOS Input
Figure B-4. Level-Sensitive Inputs IN-06 IN-07
Customization
Frequency Response Input Range faster frequency response possible replacing with smaller resistor. example, digital input being driven CMOS-compatible driver, replaced with valued 0805 resistor. resistor will adversely affect PK2500s noise immunity. PK2500 ordered with customer-specified resistor installed factory RIN. more details, contact your Z-World Sales Representative (530)757-3737.
PK2500
Specifications
Default Pull-Up Assignments protected digital inputs factory-configured with pull-up resistors. Since there banks groups) inputs, each bank uniquely pulled pulled down ground separate permanent surface mount resistors. Bank includes dedicated protected digital inputs IN-00 IN-03. Bank assigned JP15 resistor). Bank includes other inputs (IN-04 through IN-15), configured with JP14 resistor).
High-Current Drivers
Table lists high-current driver characteristics when sinking drivers sourcing drivers used.
Table B-4. High-Current Driver Characteristics
Sinking Driver Characteristic Sourcing Driver
Model Number Channels Max. Current Channel (all channels Voltage Source Range Package Power Dissipation Max. Current (all channels Max. Collector-Emitter Voltage (VCE) Derating Output Flyback Diode Max. Diode-Drop Voltage
ULN2803A available 60°C 50°C (1.2 60°C) 1.38 mW/°C (55°C/W)
UDN2985A available 60°C 50°C (1.2 60°C) 1.38 mW/°C (55°C/W)
Specifications
PK2500
Table lists safe operating conditions PK2500 high-current drivers.
Table B-5. High-Current Driver Safe Operating Range 60°C
Outputs Current/Channel Percent Duty Cycle
Contact Z-World Technical Support (530)757-3737 further information about maximum operating conditions PK2500 high-current drivers.
PK2500 separate common supply pins labeled used high-current outputs OUT-00 OUT-05, used OUT-06 OUT-11. This allows different voltages used each outputs. connections perform functions high-current driver circuits PK2500. supply power driver circuits inside driver chips. also allow diode internal driver chips snub voltage transients produced during inductive kick (associated with switching inductive loads). Relays, solenoids, speakers examples inductive loads. anodes protection diodes common each bank channels, only supply voltage used each bank highcurrent driver loads.
PK2500
Specifications
Figure Figure illustrate connections sinking sourcing configurations.
PK2500 (pin Load Power (+DC Source)
LOAD
Sinking
PK2500 High-Current Output
Figure B-5. PK2500 Connection (Sinking Configuration)
PK2500 (pin PK2500 High-Current Output
Load Power (+DC Source)
LOAD
Sourcing
Figure B-6. PK2500 Connection (Sourcing Configuration)
Specifications
PK2500
APPENDIX
POWER MANAGEMENT
Appendix provides detailed information about power systems PK2500 handles power failures.
PK2500
Power Management
Power-Failure Detection Circuitry
Figure shows PK2500s power-failure detection circuit. Note that trips
9-24 LM2575
Regulator
(Switching)
VBAT VRAM /NMI /RESET
Power Management
Figure C-1. PK2500 Power-failure Detection Circuitry
Power Failure Sequence Events
Figure summarizes events that occur input power fails.
Power Fails
Unregulated Regulated
Dropout Voltage
VOLTS
Asserts Asserts RESET
TIME
Ceases Operation
Figure C-2. Power Failure Sequence Power Management PK2500
First, power-management triggers power-failure /NMI (nonmaskable interrupt) when unregulated input voltage falls range 8.02 8.63 determined voltage divider). some point, input voltage level will exceed required regulated voltage level regulators dropout voltage (see Figure C-2). regulated output voltage then begins droop. triggers system reset when regulated supply range from 4.50 4.75 allowing power-failure routine holdup interval, store important state data. forces chip select (/CS) SRAM high (standby mode).
increase holdup interval power supply with large capacitance. This will provide additional time PK2500 execute safe shutdown.
time/date clock SRAM switch lithium backup battery when regulated voltage falls below battery voltage approximately keeps reset (/RESET) enabled until regulated voltage drops below ceases operating this point. this time, portion circuitry battery-backed should have long since ceased functioning. ratio power supplys output capacitance circuits current draw determines actual duration holdup time interval, situation similar continuous input (brownout) occur power supply overloaded. example, when high-current device such relay turns voltage supplied PK2500 below interrupt routine does shutdown. This shutdown turns off, clearing problem. However, cause overload persists, system oscillates, alternately experiencing overload then resetting. correct this situation, larger, stiffer power supply. power cable removed abruptly from PK2500, then only capacitors board available, reducing computing time microseconds. These times vary considerably, depending systems configuration loads regulated unregulated supplies. interval between power-failure detection entry powerfailure interrupt routine approximately less Dynamic /NMI communication use.
PK2500
Power Management
Blank
Power Management
PK2500
SINKING SOURCING DRIVERS
Appendix provides detailed information about sinking sourcing high-current drivers.
APPENDIX
PK2500
Sinking Sourcing Drivers
PK2500 high-current driver outputs that configured groups sourcing sinking. configuration selected installing appropriate driver setting header factory-installed driver chip default jumper settings sinking control (ULN2803). Figure shows locations driver Figure shows jumper configurations header
Battery
OUT-00 OUT-05 OUT-06 OUT-11
Figure D-1. PK2500 High-Current Output Driver Chips
OUT-06 OUT-11 OUT-00 OUT-05
OUT-06 OUT-11
OUT-00 OUT-05
SINKING
Figure D-2. PK2500 Header Jumper Configurations
Note that pins 12/34 56/78 header independently each other enable some outputs sinking others sourcing.
PK2500
Sinking Sourcing Drivers
SOURCING
Selecting Sourcing Sinking Drivers
UDN2985 sourcing driver included Developers Kit. Since driver socketed, factory-default ULN2803 sinking drivers easily substituted.
CM7200 Core Module needs removed access high-current output drivers. CM7200 Core Module plugged onto header held place screw. PK2500 available with both sourcing drivers factory-installed. more information, call your Z-World Sales Representative (530) 757-3737.
Sinking Driver (Low-Side Drive)
ULN2803 sinking driver handle channel, absolute maximum 0.75 60°C, which represents average channel with channels 60°C. absolute maximum power that ULN2803 dissipate 25°C (1.2 60°C). saturation voltage maximum channel. sinking drivers source voltage must range from Figure illustrates sinking driver configuration.
mA/channel
Load
Fly-back Current Path
(OUT-00 OUT-11)
Vsat
ULN2803 Sinking High-Current Driver
Figure D-3. Partial Schematic ULN2803 Sinking Driver PK2500 Sinking Sourcing Drivers
Sourcing Driver (High-Side Drive)
UDN2985 sourcing driver handle channel, absolute maximum 0.75 60°C, which represents average channel with channels 60°C. absolute maximum power that UDN2985 dissipate 25°C (1.2 60°C). saturation voltage maximum channel. Figure illustrates sourcing driver configuration.
Vsat
(OUT-00 OUT-11)
Load
UDN2985 Sourcing High-Voltage Driver
Figure D-4. Partial Schematic UDN2985 Sourcing Driver
sourcing drivers source voltage must range from minimum output sustaining voltage Operating driver more than without providing energy dissipation destroy driver when inductive load connected.
Motorola (DL128) Allegro (AMS 502Z) applications technical data books more information, including complete schematics, sinking sourcing high-current drivers.
Sinking Sourcing Drivers
PK2500
SERIAL INTERFACE BOARD
Appendix provides technical details baud rate configuration data Z-Worlds SIB2. following sections included. Introduction External Dimensions
APPENDIX
PK2500
Serial Interface Board
Introduction
SIB2 optional interface adapter used program PK2500. SIB2 contained plastic enclosure, making rugged reliable. SIB2 enables PK2500 communicate with Dynamic Z180s clocked serial (CSI/O) port, freeing both PK2500 serial ports application during programming debugging. SIB2s 8-pin cable plugs into header PK2500s CM7200 core module, 6-conductor RJ-12 phone cable connects host SIB2 automatically selects baud rate match communication rates established host (9600 bps, 19,200 bps, 57,600 bps). However, SIB2 determines hosts communication baud rate only first communication after reset. change baud rates, change baud rate, reset target PK2500 (which also resets SIB2), then select Reset Target from Dynamic SIB2 receives power resets from target PK2500 8-pin connector. Therefore, unplug SIB2 from target PK2500 while power applied. could damage both PK2500 SIB2; additionally, target reset. SIB2 consumes approximately from supply. Targetsystem current consumption therefore increases this amount while SIB2 connected PK2500. Never connect disconnect SIB2 with power applied controller.
Serial Interface Board
PK2500
External Dimensions
Figure illustrates external dimensions SIB2.
2.25
(57.2)
12.0
(305)
View 3.60
(91.4)
(20)
1.525
(38.7) 1.625 (41.3)
Side View
Figure E-1. SIB2 External Dimensions
PK2500
Serial Interface Board
Blank
Serial Interface Board
PK2500
APPENDIX
ENCLOSURE MOUNTING
Appendix provides technical details optional PK2500 enclosure, includes mounting suggestions enclosure.
PK2500
Enclosure Mounting
Figure summarizes dimensions optional enclosure.
Screw Mounting
0.28 (7.1)
4-40
(127)
0.315 (8.0) 2.96 (75.2) 1.275 (32.4)
1.81 (46.0)
0.31 (7.9)
dimensions inches (millimeters).
1.15 (29.2)
1.69 (42.9)
Figure F-1. PK2500 Optional Enclosure Dimensions
Enclosure Mounting
PK2500
enclosure orientation affects ability PK2500 dissipate remove heat from circuitry outside ambient environment. Heat removal crucial reliable operation. preferred orientations PK2500 enclosure shown Figures order recommended least desirable (5).
Mounting Surface
RS-232 Port
Figure F-2. Preferred PK2500 Enclosure Mounting
Mounting Surface
RS-232 Port
Figure F-3. Acceptable PK2500 Enclosure Mounting
PK2500
Enclosure Mounting
RS-232 Port
Mounting Surface
Figure F-4. Acceptable PK2500 Enclosure Mounting
Mounting Surface
Figure F-5. Acceptable PK2500 Enclosure Mounting
Mounting Surface
Figure F-6. PK2500 Enclosure Mounting (not recommended)
mounting configuration shown Figure recommended. Components PK2500 overheat, leading failure reduced operating life.
Enclosure Mounting PK2500
APPENDIX
NONVOLATILE STORAGE
Appendix provides information about flash EPROM memory used PK2500.
PK2500
Nonvolatile Storage
Flash memory acts EEPROM. Unlike many older Z-World controllers, PK2500 does have EEPROM nonvolatile storage important system parameters. However, PK2500 flash EPROM simulates EEPROM, uses same Dynamic function calls other Z-World controllers read write nonvolatile data. flash EPROM constants listed Table apply PK2500.
Table G-1. PK2500 Flash EPROM Constants
Address Definition
Startup mode. enter program mode. execute loaded program startup. Programming baud rate multiples 1200 bps. factory value (19,200 bps).
Nonvolatile Storage
PK2500
INTERRUPT VECTORS
Appendix provides information PK2500s memory mapping, which based CM7200 core module.
APPENDIX
PK2500
Interrupt Vectors
PK2500 Input/Output
internal registers input/output devices built into Z180 processor occupy first (hex) addresses space. Table lists addresses these internal registers.
Table H-1. CM7200 Z180 Internal Registers
Address Name Description
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11-13 0x14 0x15 0x16 0x17 0x18 0x19-1F 0x20 0x21 0x22
CNTLA0 CNTLA1 CNTLB0 CNTLB1 STAT0 STAT1 TDR0 TDR1 RDR0 RDR1 CNTR TRDR TMDR0L TMDR0H RLDR0L RLDR0H TMDR1L TMDR1H RLDR1L RLDR1H SAR0L SAR0H SAR0B
Control Register Serial Channel Control Register Serial Channel Control Register Serial Channel Control Register Serial Channel Status Register, Serial Channel Status Register, Serial Channel Transmit Data Register, Serial Channel Transmit Data Register, Serial Channel Receive Data Register, Serial Channel Receive Data Register, Serial Channel Clocked Serial Control Register Clocked Serial Data Register Timer Data Register, Channel Timer Data Register, Channel high Timer Reload Register, Channel Timer Reload Register, Channel high Timer Control Register Reserved Timer Data Register, Channel Timer Data Register, Channel high Timer Reload Register, Channel Timer Reload Register, Channel high Free-Running Counter Reserved Source Address, Channel Source Address, Channel high Source Address, Channel extra bits
continued.
Interrupt Vectors PK2500
Table H-1. CM7200 Z180 Internal Registers (concluded)
Address Name Description
0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B-3D 0x3E 0x3F
DAR0L DAR0H DAR0B BCR0L BCR0H MAR1L MAR1H MAR1B IAR1L IAR1H BCR1L BCR1H DSTAT DMODE DCNTL CBAR OMCR
Destination Address Channel Destination Address Channel high Destination Address Channel extra bits Byte Count Register, Channel Byte Count Register, Channel high Memory Address Register, Channel Memory Address Register, Channel high Memory Address Register, Channel extra bits Address Register, Channel Address Register, Channel high Reserved Byte Count Register, Channel Byte Count Register, Channel high Status Register Mode Register DMA/WAIT Control Register Interrupt Vector Register Interrupt/Trap Control Register Reserved Refresh Control Register Reserved Common Base Register Bank Base Common/Bank Area Register Reserved Operation Mode Control Register Control Register
PK2500
Interrupt Vectors
Real-Time Clock Registers
Table provides real time-clock internal registers.
Table H-2. Real-Time Clock Internal Registers
Address Data Bits Symbol Meaning Range
0x4180 0x4181 0x4182 0x4183 0x4184 0x4185 0x4186 0x4187 0x4188 0x4189 0x418A 0x418B 0x418C 0x418D 0x418E 0x418F
D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7 D0-D7
SEC1 SEC10 MIN1 MIN10 HOUR1 HOUR10 DAY1 DAY10 MON1 MON10 YEAR1 YEAR10 WEEK TREGD TREGE TREGF
seconds seconds minutes minutes hours hours days days months months years years weekdays Register Register Register
Interrupt Vectors
PK2500
Other Input/Output Addresses
addresses listed Table control devices that external Z180 processor.
Table H-3. Addresses Devices External Z180
Address Description Function
0x4140 0x4141 0x4142 0x4143 0x4144
RS-485 driver (RUN LED) (USER LED) Relay Relay
indicates on/off: turn turn above above above above Bits indicate which high-currrent driver, indicates on/off: turn turn Bits indicate which high-currrent driver, indicates on/off: turn turn indicates on/off: turn turn state state indicates on/off: turn turn above above
0x4145
HVA0 HVA5
0x4146
HVB0 HVB5
0x4147 0x4140 (read) 0x4141 (read) 0x4142 (read) 0x4143 (read) 0x4144 (read)
/ADCS IN-00 IN-07 OUT-01 OUT-07 ADDIN ADDIN ADDEOC
PK2500
Interrupt Vectors
Interrupt Vectors
Table presents suggested interrupt vector map. Most these interrupt vectors altered under program control. addresses given here hexadecimal, relative start interrupt vector page, determined contents I-register. These default interrupt vectors boot code Dynamic EPROM.
Table H-4. Interrupt Vectors Z180 Internal Devices
Address Name Description
0x00 0x02 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10
INT1_VEC INT2_VEC PRT0_VEC PRT1_VEC DMA0_VEC DMA1_VEC CSI/O_VEC SER0_VEC SER1_VEC
Expansion attention INT1 vector. INT2 vector. Channel Channel Channel Channel Clocked Serial Asynchronous Serial Port Channel Asynchronous Serial Port Channel
directive such following used vector interrupt user function Dynamic
#INT_VEC 0x10 myfunction
This statement causes interrupt offset 0x10 (Serial Port Z180) invoke function myfunction(). function must declared with interrupt keyword follows.
interrupt myfunction()
Interrupt Vectors
PK2500
Interrupt Priorities
Table lists interrupt priorities from highest lowest.
Table H-5. Interrupt Priorities
Interrupt Priorities
(Highest Priority)
Trap (Illegal Instruction) (Nonmaskable Interrupt) (Maskable interrupts, Level modes, interrupts) (Maskable interrupts, Level PLCBus attention line interrupt) (Maskable interrupts, Level Channel Channel Channel Channel Clocked Serial Asynchronous Serial Port
(Lowest Priority)
Asynchronous Serial Port
PK2500
Interrupt Vectors
Blank
Interrupt Vectors
PK2500
APPENDIX BATTERY
Appendix provides information about onboard lithium battery.
PK2500
Battery
Storage Conditions Shelf Life
lithium battery will provide approximately 9,000 hours backup time onboard real-time clock static RAM. However, backup time longevity affected many factors including amount time PK2500 unpowered. Most systems operated continuous basis, with battery supplying power real-time clock SRAM during power outages and/or during routine maintenance. time estimate reflects shelf life lithium battery with occasional rather than ability battery power circuitry full time. battery capacity 25°C, real-time clock draws when idle, 128K SRAM draws PK2500 were unpowered percent time, battery would last hours (2.7 years). maximize battery life, thePK2500 should stored room temperature factory packaging until field installation. Take care that PK2500 exposed extreme temperature, humidity, and/or contaminants such dust chemicals. Replacement batteries should kept sealed factory packaging room temperature until installation. Protection against environmental extremes will help maximize battery life.
Instructions Replacing Lithium Battery
following steps replace battery. Locate three pins bottom side printed circuit board that secure board. Carefully de-solder pins remove battery. solder sucker clean holes. Install battery solder board. only BR2325-1HG equivalent.
Battery
PK2500
Battery Cautions
Caution (English) There danger explosion battery incorrectly replaced. Replace only with same equivalent type recommended manufacturer. Dispose used batteries according manufacturers instructions. Warnung (German) Explosionsgefahr durch falsches Einsetzen oder Behandein Batterie. durch gleichen oder Hersteller empfohlenen Ersatztyp ersetzen. Entsorgung gebrauchten Batterien Anweisungen Herstellers. Attention (French) danger dexplosion remplacement batterie incorrect. Remplacez uniquement avec batterie type type fabricant. Mettez rebut batteries instructions fabricant. Cuidado (Spanish) Peligro pila instalada incorrectamente. Reemplace solamente similar tipo equivalente fabricante recomienda. Deshagase pilas usadas acuerdo instrucciones fabricante. Waarschuwing (Dutch) Explosiegevaar indien batterij niet goed wordt vervagen. Vervanging alleen door zelfde equivalent type aanbevolen door fabrikant. Gebruikte batterijen afvoeren door fabrikant wordt aangegeven. Varning (Swedish) felaktigt batteribyte. samma batterityp eller rekommenderas fabrikanten. Kassera batteri enligt fabrikantens instruktion.
PK2500
Battery
Blank
Battery
PK2500
INDEX
Symbols
#INT_VEC <Ctrl <Ctrl =(assignment)
compliance changing duty cycles chanNum definition cka1rate clock setup common problems programming errors communication ports Compile icon program configuring inputs outputs serial communications connect PK2500 customization
converter addressing inputs voltage reference advanced programming analog inputs configuration frequency response gain calculation gain resistors input impedance input ranges offset resistors offset voltage reading scaling input range scaling inputs signal conditioning
default jumper positions digital using digital inputs addressing digital outputs addressing states counter dmapwmBufBeg dmapwmInit dmapwmSetBuf dmapwmSwBuf duty cycle calculating changing Dynamic serial options
Index
battery cautions replacing baud rate reset brownout bufLength256 bufPtr bufSize256
PK2500
EEPROM simulated EIO_NODEV eioBrdACalib eioBrdAI eioBrdAO eioBrdAORf eioBrdDI eioBrdDO eioBrdInit eioBrdRelay eioErrorCode eioSetupAO1st electrical mechanical enclosure dimensions mounting EPROM establishing communication external dimensions PK2500 SIB2 EZIOPK25.LIB
standard configuration standard configuration standard configuration standard configuration standard configuration standard configuration standard configuration halt program header high-current driver outputs specifications
addresses external Z180 advanced programming combinations configurations functions header memory inputs converter voltage reference demonstration program digital pull-up
features flash EPROM constants writes lifetime flash LEDs FLASHLED.C flexibility
float
function
Index
PK2500
type specifier, interrupts interrupt routines interrupt service routines priorities vectors ioAddr
offChar
assignments assignments jumpers default positions standard configuration
LEDs addressing specifications level-sensitive interrupts literal term) lithium backup battery
operating modes changing permissible activities outputs regulated switching supply voltage reference channel assignments demonstration program digital pulse width modulation high-current drivers relay maximum switching voltage relays sinking sourcing overload
pBufStart phyBuffer256
permissible activities
mode program standalone multidrop network
network newBuf256 no-op nonmaskable interrupt
layout PK2500 connect default communication rates establish communication external dimensions features configurations network operating modes overview layout power-on reset subsystems ports serial
PK2500
Index
power fail flag SIB2 supervisor power failure detection circuitry sequence events power-on reset program input demonstration mode output demonstration programmable LEDs programming programming cable protected digital inputs .13, specifications pulse width modulation addressing advanced programming outputs specifications square waves
RJ-12 connector PK2500 SIB2 RS-232 communication configuration connector pinouts RS-485 communication configuration maximum number nodes network termination resistor port termination resistor RS-485 driver addressing RTC. real-time clock icon mode program program standalone sample program run/program jumper
sample program AI.C AO1.C DI.C DO.C PK25FLSH.C output ramp REL.C selecting IN-08 IN-09 IN-10 IN-15 OUT-03 OUT-05 OUT-09 OUT-11 RS-485 serial communication configuring ports
PK2500
RBOTTOM
real-time clock internal registers refresh counter regulated input voltage relay outputs addressing maximum switching voltage snubbers suppressing transients reset adjust baud rate threshold resSize256 return program mode
Index
Serial Interface Board baud rate development dimensions power serial ports shutdown SIB2. Serial Interface Board simulated EEPROM sinking drivers low-side drive software drivers feature reference output chan
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