NJU3714A NJU3711A
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NJU3714A - NJU3714A
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NJU3714A
12-BIT SERIAL PARALLEL CONVERTER
NJU3714A 12-bit serial parallel converter especially applying outport expander. operate from 2.4V 5.5V. effective outport assignment available connection between NJU3714A using only lines. serial data synchronizing with 5MHz more clock input serial data input terminal data output from parallel output buffer through serial parallel shift register parallel data latches. Furthermore, NJU3714A outputs serial data from terminal through shift register. Therefore, connects with other SIPO like NJU3711A cascade expanding parallel conversion outputs. hysteresis input circuit realizes wide noise margin high drive-ability output buffer (25mA) drive directly.
PACKAGE OUTLINE
NJU3714AV
FEATURES
12-Bit Serial Parallel Cascade Connection Hysteresis Input 0.5V Operating Voltage 5.5V Maximum Operating Frequency 5MHz more Output Current 25mA C-MOS Technology Package Outline SSOP20
CONFIGURATION
DATA
NJU3714AV
BLOCK DIAGRAM
DATA Shift Register Latch Circuit
Controller Circuit
Ver.2003-11-18
NJU3714A
TERMINAL DESCRIPTION
SYMBOL DATA FUNCTION Parallel Conversion Data Output Terminals Parallel Conversion Data Output Terminals Serial Data Output Terminal Serial Data Input Terminal Clock Signal Input Terminal Strobe Signal Input Terminal Clear Signal Input Terminal Parallel Conversion Data Output Terminals Power Supply Terminal (2.4 5.5V)
Ver.2003-11-18
NJU3714A NJU3555
FUNCTIONAL DESCRIPTION
Reset When level input terminal, latches reset parallel conversion output level. Normally, terminal should level. Data Transmission terminal level clock signals inputted terminal, serial data into DATA terminal shifted shift register synchronizing rising edge clock signal. When terminal changed level, data shift register transferred latches. Even terminal level, input clock signal shifts data shift register, therefore, clock signal should controlled data order.
Cascade Connection
serial data input from DATA terminal output from terminal through internal shift register unrelated with status. Furthermore, input circuits provide hysteresis characteristics using schmitt trigger structure protect noise.
OPERATION
latches reset (the data shift register change). parallel conversion outputs "L". serial data into DATA terminal inputted shift register. this stage, data latch changed. data shift register transferred latch. data latch output from parallel conversion output terminals. When clock signal inputted into terminal state STB="L" CLR="H", data shifted shift register latched data also changed accordance with shift register.
Note Don't care
Ver.2003-11-18
NJU3714A
TIMING CHART
DATA
Ver.2003-11-18
NJU3714A NJU3555
ABSOLUTE MAXIMUM RATINGS
(Ta=25°C) PARAMETER Supply Voltage Range Input Voltage Range Output Voltage Range Output Current Output Short Current
Terminal)
(Note
SYMBOL
RATINGS -0.5 +7.0 VSS-0.5 VDD+0.5 VSS-0.5 VDD+0.5 VO=7V, VI=0V VO=0V, VI=7V VO=7V, VI=0V VO=0V, VI=7V (max) (max) (max) (max)
UNIT
Output Short Current
(P1~P8 Terminals)
(Note
IOSD Topr Tstg
Power Dissipation
(Note
(SSOP) ~+150
Operating Temperature Range Storage Temperature Range
Note voltage relative VSS=0V reference. Note exceed absolute maximum ratings, otherwise stress cause permanent damage also Note Note Note
recommended that used range specified electrical characteristics, electrical stress cause malfunctions impact reliability. stabilize operation, place decoupling capacitor between VSS. VDD=7V, VSS=0V, less than second pin. Mounted PCB.
ELECTRICAL CHARACTERISTICS
PARAMETER Operating Voltage Operating Current High-level Output Voltage Low-level Output Voltage High-level Input Voltage Low-level Input Voltage Input Leakage Current
SYMBOL
(VDD=2.4~5.5V, VSS=0V, Ta=25°C, unless otherwise noted) CONDITION UNIT VIH=VDD, VIL=VSS IOH=-0.4mA IOL=+3.2mA
Terminal
IDDS VI=0~VDD
IOH=-25mA
0.3VDD
VDD-0.4 0.7VDD VDD-1.5
P1~P12 Terminals
High-level Output Voltage
(Note
VOHD
VDD=5V
IOH=-15mA IOH=-10mA
VDD-1.0 VDD-0.5 VDD-0.5
VDD=3V
IOH=-5mA IOL=+25mA
Low-level Output Voltage
(Note
VOLD
VDD=5V
IOL=+15mA IOL=+10mA
P1~P12 Terminals
VDD=3V
operation should required.
IOL=+5mA
Note Specified value represent output current pin. When use, total current consideration less than power dissipation rating
Ver.2003-11-18
NJU3714A
SWITCHING CHARACTERISTICS
PARAMETER Set-Up Time Hold Time Set-Up Time Hold Time SYMBOL tSSTB tHSTB Output Delay Time PSTB PCLR
Maximum Operating Frequency
(VDD=2.4~5.5V, VSS=0V, Ta=25°C, unless otherwise noted) CONDITION UNIT DATA-CLK CLK-DATA STB-CLK CLK-STB CLK-SO CLK-P1~P12 STB-P1~P12 CLR-P1~P12
fMAX
Note COUT=50pF
Ver.2003-11-18
NJU3714A NJU3555
SWITCHING CHARACTERISTICS TEST WAVEFORM
fMAX DATA tHSTB tSSTB
P1~P12
PSTB P1~P12
DATA PCLR
P1~P12
Ver.2003-11-18
NJU3714A
APPLICATION CIRCUIT
DATA
NJU3714A
APPLICATION CIRCUIT (Combined with NJU3711A)
DATA
NJU3714A
DATA
NJU3711A
MOTOR DRIVER
[CAUTION] specifications this databook only given information without guarantee regards either mistakes omissions. application circuits this databook described only show representative usages product intended guarantee permission right including industrial rights.
Ver.2003-11-18
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