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MMM5063/D Rev. 12/2002 Tri-Band GPRS Power Amplifier
MMM5063
(Scale 1:1)
Package Information Plastic Package Case 1383 (Module, Ordering Information
Device MMM5063 Device Marking Figure Package Module
MMM5063 tri-band single supply Power Amplifier GSM900/DCS1800/ PCS1900 GPRS handheld radios. This fully integrated Power Amplifier uses patented concept realize matching on-chip through integration passives GaAs die. This allows module functionality very small package achieves best-inclass Power Amplifier performance multi-band capability. Applications: Tri-Band GSM900 DCS1800 PCS1900 Guaranteed Class GPRS Single Supply Enhancement Mode GaAs MESFET Technology Internal Input/Output Matching High Gain Three Stage Amplifier Design Typical Characteristics: Pout 35.2 dBm, Pout 33.8 dBm, Pout dBm, Optimized Guaranteed Open-Loop Power Control Applications Small Package
Features:
This document contains information pre-production product. Specifications Pre-production information herein subject change without notice. Motorola, Inc., 2002. rights reserved.
Electrical Specifications
VDCS1 VDCS2 VDCS3 Vreg Vapc
DCS/PCS
DCS/PCS
DCS/PCS
VGSM1
VGSM2
VGSM3
This device contains active transistors.
Figure Simplified Block Diagram
Electrical Specifications
Table Maximum Ratings
Rating Supply Voltage Symbol VGSM1,2,3, VDCS1,2,3, DCS/PCS Value Unit
Input Power Output Power Section DCS/PCS Section Operating Case Temperature Range Storage Temperature Range Temperature
DCS/PCS Tstg
NOTES: Maximum Ratings those values beyond which damage device occur. Functional operation should restricted limits Electrical Characteristics Recommended Operating Conditions tables. (electrostatic discharge) immunity meets Human Body Model (HBM) Machine Model (MM) Additional data available upon request. Meets Moisture Sensitivity Level (MSL) Figure page additional details.
MMM5063
MOTOROLA
Electrical Specifications Table Recommended Operating Conditions
Characteristic Drain Supply Voltage Bias Supply Voltage Regulated Voltage Power Control Voltage Band Select Input Power Input Power DCS/PCS Symbol VGSM1,2,3, VDCS1,2,3 VREG Vapc DCS/PCS -1.0 Unit
Table Control Requirements
Characteristic Current Vreg Band Select Band Enable Voltage High Band Enable Voltage Current Symbol Ireg 0.76 Unit
Table Electrical Characteristics
(Peak measurement duty cycle, period, 25°C, unless otherwise noted.)
Characteristic
Symbol
Unit
Section(Pin -1.0 dBm, VGSM1,2,3 pulsed, VREG VBS= Vramp pulsed) Frequency Range Output Power Power Added Efficiency Output Power Voltage (VGSM1,2,3 pulsed, Power Added Efficiency Voltage (VGSM1,2,3 pulsed, Harmonic Output Pout Pout 34.2 32.5 35.2 33.4
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MMM5063
Electrical Specifications Table Electrical Characteristics (Continued)
(Peak measurement duty cycle, period, 25°C, unless otherwise noted.)
Characteristic Second Harmonic Leakage Output (Crosstalk isolation) Input Return Loss Output Power Isolation (Vramp VGSM1,2,3 Noise Power Band -1.0 (100 measurement bandwidth) MHz) MHz) Noise Power Band (100 measurement bandwidth) MHz) MHz) Stability-Spurious Output (Pout dBm, Load VSWR Phase Angles, Adjust Vramp specified power) Load Mismatch Stress (Pout dBm, Load VSWR 10:1 phase angles, seconds, Adjust Vramp specified power)
Symbol
Unit
|S11| Poff
Pspur
Degradation Output Power Before After Test
Section(Pin dBm, VDCS1,2,3 pulsed, VREG Vramp pulsed, Frequency Range Output Power Power Added Efficiency Output Power Voltage (VDCS1,2,3 pulsed, VdB= Power Added Efficiency Voltage (VDCS1,2,3 pulsed, VdB= Harmonic Output Input Return Loss Output Power Isolation (Vramp VDCS1,2,3 Noise Power Band 1785 MHz) (100 measurement bandwidth) Stability-Spurious Output (Pout dBm, Load VSWR Phase Angles, Adjust Vramp specified power) |S11| Poff Pout Pout 1710 32.5 33.8 1785
Pspur
MMM5063
MOTOROLA
Electrical Specifications Table Electrical Characteristics (Continued)
(Peak measurement duty cycle, period, 25°C, unless otherwise noted.)
Characteristic Load Mismatch Stress (Pout dBm, Load VSWR 10:1 phase angles, seconds, Adjust Vramp specified power)
Symbol
Unit
Degradation Output Power Before After Test
Section(Pin dBm, VDCS1,2,3 pulsed, VREG Vramp pulsed, Frequency Range Output Power Power Added Efficiency Output Power Voltage (VDCS1,2,3 pulsed, VdB= Power Added Efficiency Voltage (VDCS1,2,3 pulsed, VdB= Harmonic Output Input Return Loss Output Power Isolation (Vramp VDCS1,2,3 Noise Power Band 1910 MHz) (100 measurement bandwidth) Stability-Spurious Output (Pout dBm, Load VSWR Phase Angles, Adjust Vramp specified power) Load Mismatch Stress (Pout dBm, Load VSWR 10:1 phase angles, seconds, Adjust Vramp specified power) |S11| Poff Pout Pout 1850 32.5 1910
Pspur
Degradation Output Power Before After Test
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MMM5063
Typical Performance Characteristics
Typical Performance Characteristics
PAE, POWER ADDED EFFICIENCY
Pout, OUTPUT POWER (dBm)
-35°C 25°C 85°C VGSM1,2,3 Vapc
-35°C 25°C 85°C VGSM1,2,3 Vapc
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure Output Power versus Frequency
SECOND HARMONIC (dBc)
Figure Power Added Efficiency versus Frequency
CROSSTALK (dBm)
VGSM1,2,3 Vapc
85°C 25°C VGSM1,2,3 Vapc
25°C 85°C
-35°C
-35°C
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure Crosstalk versus Frequency
Figure Second Harmonic Output versus Frequency
MMM5063
MOTOROLA
Typical Performance Characteristics
THIRD HARMONIC (dBc)
-35°C 25°C
VGSM1,2,3 Vapc
85°C
FREQUENCY (MHz)
Figure Third Harmonic Output versus Frequency
34.4
Pout, OUTPUT POWER (dBm)
-35°C
PAE, POWER ADDED EFFICIENCY
34.2 33.8 33.6 33.4 33.2 1710
25°C 1710 85°C VGSM1,2,3 Vapc -35°C
25°C VGSM1,2,3 Vapc 85°C 1735 1760 1785
1735
1760
1785
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure Output Power versus Frequency
SECOND HARMONIC (dBc)
THIRD HARMONIC (dBc)
Figure Power Added Efficiency versus Frequency
VGSM1,2,3 1710 Vapc -35°C 25°C
1710 85°C 25°C VGSM1,2,3 35°C 1760 Vapc
85°C
1735
1785
1735
1760
1785
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure Second Harmonic Output versus Frequency
Figure Third Harmonic Output versus Frequency
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MMM5063
Typical Performance Characteristics
34.8
PAE, POWER ADDED EFFICIENCY
-35°C -35°C 25°C 1850
34.6
Pout, OUTPUT POWER (dBm)
34.4 34.2 33.8 33.6 33.4 33.2 1850 1865 1880 FREQUENCY (MHz) 1895 1910 85°C 25°C VGSM1,2,3 Vapc
85°C VGSM1,2,3 Vapc 1865 1880 FREQUENCY (MHz) 1895 1910
Figure Output Power versus Frequency
85°C
SECOND HARMONIC (dBc) THIRD HARMONIC (dBc)
Figure Power Added Efficiency versus Frequency
1910 1850 VGSM1,2,3 Vapc 1865 1880 FREQUENCY (MHz) 1895 1910 85°C -35°C 25°C
1850 25°C -35°C VGSM1,2,3 Vapc 1865 1880 FREQUENCY (MHz) 1895
Figure Second Harmonic Output versus Frequency
Figure Third Harmonic Output versus Frequency
MMM5063
MOTOROLA
Contact Descriptions Connections
Contact Descriptions Connections
Table Contact Function Description
Symbol Description
Vreg DCS/PCS VDCS3 VDCS2 VDCS1 Vapc DCS/PCS VGSM1 VGSM2 VGSM3
Regulated voltage bias circuit supply voltage active bias circuits connected battery DCS/PCS output DCS/PCS supply voltage stage DCS/PCS supply voltage stage DCS/PCS supply voltage stage Power control both line-ups (Vapc Pout Poff, Vapc Pout Pmax) DCS/PCS input input supply voltage stage supply voltage stage supply voltage stage output Band selection between DCS/PCS
Corner Vreg DCS/PCS
VDCS3
VDCS2 (0.60) Ground Plane VDCS1 Vramp DCS/PCS
VGSM3
VGSM2 (0.95)
VGSM1
NOTE: optimum performance VGSM1 VGSM2, well VDCS1 VDCS2, must strapped together application demobard.
Figure Contact Connections (Bottom View)
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MMM5063
Application Information
Application Information
Power Control Considerations
MMM5063 designed open loop (drain control) applications. PMOS used switch MMM5063 drain vary supply voltage from battery voltage setting (Vbat). simplified concept schematic (see Figure describes application circuit used control device through drain voltage. drain control provides linear transfer function which repeatable versus control voltage (see Figure 16).
Pout, OUTPUT POWER
VD2, DRAIN VOLTAGE SQUARED (V2)
Figure Output Power versus Drain Voltage
Second Harmonic (H2) Trap Circuitry
When transmitting saturated mode, second harmonic naturally present output reaches antenna after additional filtering front-end. ETSI specifies that harmonic level cannot exceed dBm. order improve rejection Band (GSM), trap been developed. topology based Pass Cell Filter (see Figure where first shunt capacitor actually part output match.
0402 Murata Coilcraft 0603 Switchplexer 0402 Murata
Figure Pass Filter
This circuit reduces level with in-band insertion losses (mainly series inductor). Moreover, this structure used match Power amplifier module output switchplexer.
MMM5063
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Application Information
Application Schematics Printed Circuit Boards
Battery PMOS Vramp [Note
Vreg DCS/PCS
VAPC MMM5063
DCS/PCS
[Note
NOTES: Op/Amp either external (with enable ASIC. MMM5063 requires RF/LF decoupling capacitors (not shown).
Figure Open Loop Control Application Schematic
Figure represents complete Power Amplifier implementation including MMM5063 Amplifier Module Control Circuitry. This functionality realized with separate printed circuit boards; Evaluation Circuit with schematic shown Figure Layout shown Figure Power Amplifier Control Loop with schematic shown Figure Layout shown Figure Evaluation Circuit straightfoward and, MMM5063's high level integration, requires only passive components around package. These components mainly de-coupling capacitors. Power Amplifier Control Loop based operational amplifier driving PMOS transistor. PMOS device functions linear drain voltage regulator controlled Vrampwith typical gain which through resistive divider shown Figure control output power through drain, Vapc must indexed drain voltage prevent Section from drawing excessive current especially output power. Nevertheless, Vapc should stay above provide sufficient gain line-up. Figure describes application circuit used control Vapc through drain voltage. uses Vreg pre-position Vapc voltage which dependent drain Voltage.
Vreg Vdrain VBAT
Vapc
RVAPC
Internal
Figure
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MMM5063
Application Information
RVapc Vapc while sets Vapc slope. Vapc versus Vdrain shown Figure
Vapc
Vdrain
Figure Vapc versus Vdrain
possible that Power Control output voltage range. This raises
concern MMM5063 ramp control voltage (Vramp) which must start enough output power dynamic range. overcome this limitation, resistor Figure used additional offset (200 with This residual voltage then subtracted output voltage through differential Operational Amplifier.
MMM5063
MOTOROLA
Application Information
DCS/PCS DCS/ Vapc VDCS2 VDCS1 VDCS3
DCS/PCS VGSM1 VGSM2 VGSM3 Vreg
DCS/PCS
NOTE: Connect, mount.
Figure Evaluation Circuit
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MMM5063
Application Information
NOTE: Connect, mount.
Figure Power Amplifier Control Loop
MMM5063
MOTOROLA
Application Information
Figure Evaluation Circuit Table Evaluation Circuit Bill Materials
Reference C14, Value mount GRM36COG330J50 GRM36X7R221K50 GRM36COG220J50 GRM36X7R103K25 GRM36COG470J50 GRM36X7R102K25 GRM36COG6R8J50 GRM36COG3R9J50 GRM36X7R104K25 142-0711-821 Murata Murata Murata Murata Murata Murata Murata Murata Murata Johnson Part Number Manufacturer
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MMM5063
Application Information
Figure Power Amplifier Control Loop Table Power Amplifier Control Loop Bill Materials
Reference C12, connector Power MOSFET mount mount CMOS CRG0402 CRG0402 AD8591 NEOHM NEOHM Analog Devices CRG0402 CRG0402 CRG0402 CRG0402 NEOHM NEOHM NEOHM NEOHM NTHS5445T Semiconductor Value Part Number 293D685X9020C GRM36COG330J50 GRM36COG150J50 GRM36x7R331K50 GRM36X7R103K25 GRM36X7R473K10 Manufacturer Sprague Murata Murata Murata Murata Murata
MMM5063
MOTOROLA
Packaging Information
Packaging Information
Shipping, Packaging Marking Information Tape Width: 16.0 Tape Pitch (part part) Reel Diameter: Component Orientation: Parts orientated with side closest tape's round sprocket holes tape's trailing edge. Pack: This device meets Moisture Sensitiviy Level (MSL) Parts will shipped Pack. Parts must stored 30°C relative humidity with time pack exceed hours. event that parts handled stored within these limits, following procedures must completed prior reflow: 40°C Out: Bake devices 40°C 45°C, Relative Humidity least hours. Room Temperature Out: Store devices less than Relative Humidity least hours. Marking: line: Line: Line: Motorola Logo Wafer number (coded characters) followed wafer number (coded digits) Assy site code characters), followed Wafer Number (coded characters), followed Year digits) Workweek digits). Line: Partnumber coded characters
MMM5063 LLLLLL AWLYYWW
Marking (Top View)
Tape Reel Orientation (Top View)
Figure Packaging Information
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MMM5063
Packaging Information
1.01
0.05
2.95±0.05
2.45±0.05 0.5±0.05
2.24
2.55
3.15
1±0.05 0.8±0.05 0.97 3±0.05
3.15 2.52 1.77 1.02 0.07
0.5±0.05 2.37±0.05 0.5±0.05 2.215 0.5±0.05
1.03
1.65
0.5±0.05
3.15
IDENT
1.2±0.05 0.8±0.05
NOTES: DIMENSIONS MILLIMETERS. DIMENSIONS TOLERANCES ASME Y14.5M, 1994.
BOTTOM VIEW
APPLIES LOCATIONS.
Figure Outline Dimensions Module (Case 1383-02, Issue
MMM5063
MOTOROLA
NOTES
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MMM5063
REACH USA/EUROPE/LOCATIONS LISTED: Motorola Literature Distribution; P.O. 5405, Denver, Colorado 80217 1-303-675-2140 1-800-441-2447 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, King Street, Industrial Estate, N.T., Hong Kong 852-26668334 TECHNICAL INFORMATION CENTER: 1-800-521-6274 HOME PAGE:
Information this document provided solely enable system software implementers Motorola products. There express implied copyright licenses granted hereunder design fabricate integrated circuits integrated circuits based information this document. Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part.
Motorola Stylized Logo registered U.S. Patent Trademark Office. other product service names property their respective owners. Motorola, Inc. Equal Opportunity/Affirmative Action Employer. Motorola, Inc. 2002
MMM5063/D
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