MC-4216LFF721
|
|
|
Top Searches for this datasheet
MC-4216LFF721 - MC-4216LFF721
INTEGRATED CIRCUIT
MC-4216LFF721
OPERATION 16M-WORD 72-BIT DYNAMIC MODULE UNBUFFERED TYPE,
Description
MC-4216LFF721 16,777,216 words bits dynamic module which pieces DRAM
µPD4264405 assembled.
This module provides high density large quantities memory small space without utilizing surfacemounting technology printed circuit board. Decoupling capacitors mounted power supply line noise reduction.
Features
Unbuffered type (Hyper page mode) 16,777,216 words bits organization Fast access cycle time
Family Access time (MAX.) MC-4216LFF721-A50 MC-4216LFF721-A60 cycle time (MIN.) (Hyper page mode) cycle time (MIN.) Power consu mption (MAX.) Active 6.48 5.83 Standby 32.4 (CMOS level input)
Refresh cycle
Family MC-4216LFF721-A50 MC-4216LFF721-A60 Refresh cycle 8,192 cycles 4,096 cycles Refresh /RAS only refresh, Normal read write /CAS before /RAS refresh, Hidden refresh
168-pin dual in-line memory module (Pin pitch 1.27 Single +3.3 power supply Serial
information this document subject change without notice.
Document M11908EJ4V0DS00 (4th edition) Date Published October 1997 Printed Japan
mark
shows major revised points.
1996
MC-4216LFF721
Ordering Information
Part number Access time (MAX.) MC-4216LFF721FH-A50 MC-4216LFF721FH-A60 MC-4216LFF721FB-A50 MC-4216LFF721FB-A60 168-pin Dual In-line Memory Module (Socket Type) Edge connector Gold plated pieces µPD4264405G5 (400 TSOP(II)) [Double side] pieces µPD4264405LE (400 SOJ) [Double side] Package Mounted devices
MC-4216LFF721
Configuration
168-pin Dual In-line Memory Module Socket Type (Edge connector: Gold plated) MC-4216LFF721FH, 4216LFF721FB /XXX indicates active signal.
/CAS4 /CAS5 /CAS6 /CAS7 /WE0 /CAS0 /CAS1 /RAS0 /OE0 /OE2 /RAS2 /CAS2 /CAS3 /WE2
Address Inputs
A12, Column A10] DQ63 Data Inputs Outputs
/RAS0, /RAS2 Address Strobe /CAS0 /CAS7 Column Address Strobe /WE0, /WE2 /OE0, /OE2 Write Enable Output Enable Serial Data Clock Input Address Input EEPROM Check Bits Power Supply Ground Connection
MC-4216LFF721
Block Diagram
/RAS0 /OE0 /WE0 /CAS0 /CAS /RAS /CAS4 /CAS /RAS /RAS2 /OE2 /WE2
/CAS1
/CAS /RAS
/CAS5
/CAS /RAS
/CAS /RAS
/CAS /RAS
/CAS /RAS
/CAS /RAS
/CAS2
/CAS /RAS /CAS6 /CAS /RAS
/CAS /RAS
/CAS /RAS
/CAS3
/CAS /RAS
/CAS7
/CAS /RAS
/CAS /RAS
/CAS /RAS
/CAS /RAS
/CAS /RAS
SERIAL
Remark µPD4264405 (16M words bits organization)
MC-4216LFF721
Electrical Specifications
voltages referenced GND. After power (VCC (MIN.)), wait more than (/RAS, /CAS inactive) then, execute eight /CAS before /RAS /RAS only refresh cycles dummy cycles initialize internal circuit.
Absolute Maximum Ratings
Parameter Voltage relative Supply voltage Output current Power dissipation Operating ambient temperature Storage temperature Symbol Tstg Condition Rating -0.5 +4.6 -0.5 +4.6 +125 Unit
Caution
Exposing device stress above those listed Absolute Maximum Ratings could cause permanent damage. device meant operated under conditions outside limits described operational section this specification. Exposure Absolute Maximum Rating conditions extended periods affect device reliability.
Recommended Operating Conditions
Parameter Supply voltage High level input voltage level input voltage Operating ambient temperature Symbol Condition MIN. -0.3 TYP. MAX. +0.8 Unit
Capacitance MHz)
Parameter Input capacitance Symbol Data input/output capacitance CI/O Test condition /RAS0, /RAS2 /CAS0 /CAS7 /WE0, /WE2 /OE0, /OE2 DQ63, MIN. TYP. MAX. Unit
MC-4216LFF721
Characteristics (Recommended Operating Conditions unless otherwise noted)
Parameter Operating current Symbol ICC1 /RAS, /CAS cycling (MIN.), Standby current ICC2 /RAS, /CAS (MIN.), /RAS, /CAS VCC-0.2 /RAS only refresh current ICC3 /RAS cycling, /CAS (MIN.) (MIN.), Operating current (Hyper page mode (EDO)) /CAS before /RAS refresh current Input leakage current ICC5 ICC4 /RAS (MAX.), /CAS cycling tHPC tHPC (MIN.), /RAS cycling (MIN.), other pins under test Output leakage current Output disabled (Hi-Z) High level output voltage level output voltage -2.0 +2.0 tRAC tRAC tRAC tRAC tRAC tRAC Test condition tRAC tRAC MIN. MAX. 1,800 1,620 1,800 1,620 1,800 1,620 2,340 1,980 Unit Notes
Notes ICC1, ICC3, ICC4 ICC5 depend cycle rates (tRC tHPC). Specified values obtained with outputs unloaded. ICC1 ICC3 measured assuming that address changed once less during /RAS (MAX.) /CAS (MIN.). ICC3 measured assuming that column address inputs held either high low. ICC4 measured assuming that column address inputs switched only once during each hyper page (EDO) cycle.
MC-4216LFF721
Characteristics (Recommended Operating Conditions unless otherwise noted)
Characteristics Test Conditions
Input timing specification
(MIN.) (MAX.)
Output timing specification
(MIN.) (MAX.)
Output load condition
1,180
MC-4216LFF721
Common Read, Write, Read Modify Write Cycle
Parameter Symbol tRAC MIN. Read Write cycle time /RAS precharge time /CAS precharge time /RAS pulse width /CAS pulse width /RAS hold time /CAS hold time /RAS /CAS delay time /RAS column address delay time /CAS /RAS precharge time address setup time address hold time Column address setup time Column address hold time lead time referenced /RAS /CAS data setup time data setup time data delay time Transition time (rise fall) Refresh time tCPN tRAS tCAS tRSH tCSH tRCD tRAD tCRP tASR tRAH tASC tCAH tOES tCLZ tOLZ tOED tREF MAX. 10,000 10,000 tRAC MIN. MAX. 10,000 10,000 Unit Notes
Notes read cycles, access time defined follows:
Input conditions tRAD tRAD (MAX.) tRCD tRCD (MAX.) tRAD tRAD (MAX.) tRCD tRCD (MAX.) tRCD tRCD (MAX.) Access time tRAC (MAX.) (MAX.) tCAC (MAX.) Access time from /RAS tRAC (MAX.) tRAD (MAX.) tRCD tCAC (MAX.)
tRAD (MAX.) tRCD (MAX.) specified reference points only; they restrictive operating parameters. They used determine which access time (tRAC, tCAC) used finding when output data will available. Therefore, input conditions tRAD tRAD (MAX.) tRCD tRCD (MAX.) will cause operation problems. tCRP (MIN.) requirement applied /RAS, /CAS cycles.
MC-4216LFF721
Read Cycle
Parameter Symbol tRAC MIN. Access time from /RAS Access time from /CAS Access time from column address Access time from Column address lead time referenced /RAS Read command setup time Read command hold time referenced /RAS Read command hold time referenced /CAS Output buffer turn-off delay time from /CAS hold time tRAC tCAC tOEA tRAL tRCS tRRH tRCH tOEZ tCHO MAX. tRAC MIN. MAX. Unit Notes
Notes read cycles, access time defined follows:
Input conditions tRAD tRAD (MAX.) tRCD tRCD (MAX.) tRAD tRAD (MAX.) tRCD tRCD (MAX.) tRCD tRCD (MAX.) Access time tRAC (MAX.) (MAX.) tCAC (MAX.) Access time from /RAS tRAC (MAX.) tRAD (MAX.) tRCD tCAC (MAX.)
tRAD (MAX.) tRCD (MAX.) specified reference points only; they restrictive operating parameters. They used determine which access time (tRAC, tCAC) used finding when output data will available. Therefore, input conditions tRAD tRAD (MAX.) tRCD tRCD (MAX.) will cause operation problems. Either tRCH (MIN.) tRRH (MIN.) should read cycles. tOEZ (MAX.) defines time when output achieves condition Hi-Z referenced VOL. inactive read cycle) /CAS inactive, active tCHO effective. /CAS, active tOCH effective.
MC-4216LFF721
Write Cycle
Parameter Symbol tRAC MIN. hold time referenced /CAS pulse width lead time referenced /RAS lead time referenced /CAS setup time hold time Data-in setup time Data-in hold time tWCH tRWL tCWL tWCS tOEH MAX. tRAC MIN. MAX. Unit Notes
Notes (MIN.) applied late write cycles read modify write cycles. early write cycles, tWCH (MIN.) should met. tWCS tWCS (MIN.), cycle early write cycle data will remain Hi-Z through entire cycle.
(MIN.)
(MIN.)
referenced /CAS falling edge early write cycles. late write cycles
read modify write cycles, they referenced falling edge.
Read Modify Write Cycle
Parameter Symbol tRAC MIN. Read modify write cycle time /RAS delay time /CAS delay time Column address delay time tRWC tRWD tCWD tAWD MAX. tRAC MIN. MAX. Unit Note
Note tWCS tWCS (MIN.), cycle early write cycle data will remain Hi-Z through entire cycle. tRWD tRWD
(MIN.), tCWD
tCWD
(MIN.), tAWD
tAWD
(MIN.)
tCPWD tCPWD (MIN.), cycle read modify write
cycle data will contain data read from selected cell. neither above conditions met, state data indeterminate.
MC-4216LFF721
Hyper Page Mode (EDO)
Parameter Symbol tRAC MIN. Read Write cycle time /RAS pulse width /CAS pulse width /CAS precharge time Access time from /CAS precharge /CAS precharge delay time /RAS hold time from /CAS precharge Read modify write cycle time Data output hold time /CAS hold time precharge time Output buffer turn-off delay from pulse width Output buffer turn-off delay from /RAS Output buffer turn-off delay from /CAS tHPC tRASP tHCAS tACP tCPWD tRHCP tHPRWC tDHC tOCH tOEP tWEZ tWPZ tOFR tOFC MAX. 125,000 10,000 tRAC MIN. MAX. 125,000 10,000 Unit Notes
Notes tHPC (MIN.) applied /CAS access. tWCS tWCS
(MIN.),
cycle early write cycle data will remain Hi-Z through entire
cycle. tRWD tRWD (MIN.), tCWD tCWD (MIN.), tAWD tAWD (MIN.) tCPWD tCPWD (MIN.), cycle read modify write cycle data will contain data read from selected cell. neither above conditions met, state data indeterminate. inactive read cycle) /CAS inactive, active tCHO effective. /CAS, active tOCH effective. tOFC (MAX.), tOFR (MAX.) tWEZ (MAX.) define time when output achieves conditions Hi-Z referenced VOL. make Hi-Z read cycle, necessary control /RAS, /CAS, /WE, follows. effective specification depends state each signal. Both /RAS /CAS inactive read cycle) inactive, active tOFC effective when /RAS inactivated before /CAS inactivated. tOFR effective when /CAS inactivated before /RAS inactivated. slower tOFC tOFR becomes effective. Both /RAS /CAS active either /RAS /CAS active read cycle) /WE, inactive tOEZ effective. Both /RAS /CAS inactive /RAS active /CAS inactive read cycle) /WE, active either tRRH tRCH must tWEZ tWPZ effective. faster tOEZ tWEZ becomes effective. faster becomes effective.
MC-4216LFF721
Refresh Cycle
Parameter Symbol tRAC MIN. /CAS setup time /CAS hold time (/CAS before /RAS refresh) /RAS precharge /CAS hold time setup time hold time tCSR tCHR tRPC tWSR tWHR MAX. tRAC MIN. MAX. Unit Note
MC-4216LFF721
Serial
Byte 65-71 Manufacturing location Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name Part name revision code Blank -A50 -A60 MC-4216LFF721FB MC-4216LFF721FH revision Checksum bytes -A50 -A60 Manufacture's JEDEC code JEP-106E Function Described Number serial bytes Serial memory Fundamental memory type Number rows Number columns Number banks Data width Data width (continued) Voltage interface /RAS access time /CAS access time Error detection/correction Refresh period DRAM width Error checking DRAM width -A50 -A60 -A50 -A60 Notes bytes bytes rows columns bank bits LVTTL Normal None
Remark High level (Serial data), level (Serial data)
MC-4216LFF721
Read Cycle
tRAS /RAS tCSH tCRP /CAS tRAD tASR Address tRAH tASC Col. tRCH tRCS tRRH tOCH tOES tCHO tOEA tRAC tCAC tOFC tOEZ tOFR Data tCAH tRCD tRSH tCAS tCPN
MC-4216LFF721
Early Write Cycle
tRAS /RAS tCSH tCRP /CAS tRAD tASR Address tRAH tASC tCAH tRCD tRSH tCAS
Col.
Data
Remark Don't care
MC-4216LFF721
Late Write Cycle
tRAS /RAS tCSH tCRP /CAS Address tRCD
Col. tRCS
tOEH
Data
MC-4216LFF721
Read Modify Write Cycle
tRWC /RAS tCRP /CAS tRAD Address tRAH Col. tCWL tRWL tCAH
tCAC tOLZ tCLZ Data
Data
MC-4216LFF721
Hyper Page Mode (EDO) Read Cycle
RASP /RAS /CAS Address Col. tCAH Col. tCAH Col. tOFR tOFC HCAS HCAS RHCP
tHCAS
tCPN
tOCH tCAC tCHO
Data
Data
Data
Remark hyper page mode (EDO), read, write read modify write cycles available each consecutive /CAS cycles within same /RAS cycle.
MC-4216LFF721
Hyper Page Mode (EDO) Read Cycle (/WE Control)
RASP /RAS /CAS Address Col. Col. tCAH Col. Data Data Data tCHO tWEZ tCAH HCAS HCAS RHCP
HCAS
Remark hyper page mode (EDO), read, write read modify write cycles available each consecutive /CAS cycles within same /RAS cycle.
MC-4216LFF721
Hyper Page Mode (EDO) Read Cycle (/OE Control)
RASP /RAS tCRP /CAS tRAD Address tCAH Col.A tRAC Col.B tCAC tASC Col.C tOEP tOCH tOEP tCHO tCHO tRRH tOFC tOFR tRCD HCAS HCAS tRHCP tRSH HCAS tCPN
tRCS
tCHO tOCH
tCLZ tOEZ
Data
tOEZ
Data
Data
Data
Remark hyper page mode (EDO), read, write read modify write cycles available each consecutive /CAS cycles within same /RAS cycle.
MC-4216LFF721
Hyper Page Mode (EDO) Early Write Cycle
RASP /RAS tCSH /CAS tRAD Address tRAH tASC Col. tCAH tASC tCAH Col. tASC tCAH Col. tRCD HCAS tHPC HCAS RHCP
tRSH HCAS tCPN
Data
Data
Data
Remarks Don't care hyper page mode (EDO), read, write read modify write cycles available each consecutive /CAS cycles within same /RAS cycle.
MC-4216LFF721
Hyper Page Mode (EDO) Late Write Cycle
RASP /RAS tCRP /CAS tRAD Address Col. tCWL tCAH Col. Col. HCAS HCAS RHCP HCAS
Hi-Z
Hi-Z
Hi-Z
Data
Data
Data
Remark hyper page mode (EDO), read, write read modify write cycles available each consecutive /CAS cycles within same /RAS cycle.
MC-4216LFF721
Hyper Page Mode (EDO) Read Modify Write Cycle
RASP /RAS HPRWC HCAS
/CAS
HCAS
HCAS
Address Col.
Col. CPWD
Col.
Hi-Z
CPWD
tOEZ Hi-Z
Hi-Z
Hi-Z
Remark hyper page mode (EDO), read, write read modify write cycles available each consecutive /CAS cycles within same /RAS cycle.
MC-4216LFF721
Hyper Page Mode (EDO) Read Write Cycle
tRASP /RAS tCSH /CAS Address tRAD Col. Col. Col. HCAS HCAS tHPC tRHCP
HCAS
tCPN
Data
Data
Data
Remark hyper page mode (EDO), read, write read modify write cycles available each consecutive /CAS cycles within same /RAS cycle.
MC-4216LFF721
/CAS Before /RAS Refresh Cycle
tRAS /RAS tCSR tCHR tRPC tCSR tCHR tRPC tRAS
tCRP tCPN
/CAS
Remark Address, Don't care Hi-Z
/RAS Only Refresh Cycle
/RAS tCRP tCRP /CAS tRPC tCPN tRAS
Address
Remark /WE, Don't care Hi-Z
MC-4216LFF721
Hidden Refresh Cycle (Read)
/RAS /CAS tRAH Col. tOLZ tCLZ Data tOFR tCHO tWHR tWPZ tCAH
tRCD
tCPN
Address
MC-4216LFF721
Hidden Refresh Cycle (Write)
tRAS /RAS tRAS
tCRP /CAS tRAD Address
tRSH
tCHR
tCPN
tASC Col.
Data
Remark Don't care
MC-4216LFF721
Package Drawings
MC-4216LFF721FH
DUAL IN-LINE MODULE (SOKET TYPE)
(AREA (AREA (AREA
(OPTIONAL HOLES)
(AREA
ITEM
MILLIMETERS 133.35 133.35±0.13 11.43 36.83 6.35 3.125 54.61 6.35 1.27 (T.P.) 8.89 24.495 42.18 17.78 31.75±0.13 11.97 19.78 MAX. R2.0 4.00±0.10
INCHES 5.250 5.250±0.006 0.450 1.450 0.250 0.079 0.123 2.150 0.250 0.050 (T.P.) 0.350 0.964 1.661 0.700 1.250±0.006 0.471 0.779 0.158 MAX. 0.039 R0.079 0.157 +0.005 -0.004
detail part
detail part
1.27±0.1 4.00 MIN. 0.25 MAX. 1.0±0.05 2.54±0.10 MIN. MIN.
0.118
0.050±0.004 0.157 MIN. 0.010 MAX. 0.039 +0.003 -0.002 0.100±0.004 0.118 MIN. 0.118 MIN. M168S-50A55
MC-4216LFF721
MC-4216LFF721FB
DUAL IN-LINE MODULE (SOCKET TYPE)
A(AREA M1(AREA M2(AREA A1(AREA
(OPTIONAL HOLES)
ITEM
MILLIMETERS 133.35 133.35±0.13 11.43 36.83 6.35 3.125 54.61 6.35 1.27 (T.P.) 8.89 24.495 42.18 17.78 31.75±0.13 11.97 19.78 MAX. R2.0 4.00±0.10
INCHES 5.250 5.250±0.006 0.450 1.450 0.250 0.079 0.123 2.150 0.250 0.050 (T.P.) 0.350 0.964 1.661 0.700 1.250±0.006 0.471 0.779 0.355 MAX. 0.039 R0.079 0.157 +0.005 -0.004
detail part
detail part
1.27±0.1 4.00 MIN. 0.25 MAX. 1.0±0.05 2.54±0.10 MIN. MIN.
0.118
0.050±0.004 0.157 MIN. 0.010 MAX. 0.039 +0.003 -0.002 0.100±0.004 0.118 MIN. 0.118 MIN. M168S-50A39-1
MC-4216LFF721
[MEMO]
MC-4216LFF721
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS
Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices
HANDLING UNUSED INPUT PINS CMOS
Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS device behave differently than Bipolar NMOS devices. circuitry. Input levels CMOS devices must fixed high using pull-up pull-down Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices.
STATUS BEFORE INITIALIZATION DEVICES
Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. initialized until reset signal received. Hence, power-on does Reset operation must guarantee out-pin levels, settings contents registers. Device executed imme-diately after power-on devices having reset function.
MC-4216LFF721
[MEMO]
CAUTION HANDLING MEMORY MODULES
When handling inserting memory modules, sure touch components modules, such memory chip capacitors chip resistors. necessary avoid undue mechanical stress these components prevent damaging them. When re-packing memory modules, sure modules touching each other. Modules contact with other modules cause excessive mechanical stress, which damage modules.
part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customers must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact sales representative advance. Anti-radioactive design implemented this product.
Other recent searches
PXC16SAAN - PXC16SAAN PXC16SAAN Datasheet
MABACT0010 - MABACT0010 MABACT0010 Datasheet
LP8340 - LP8340 LP8340 Datasheet
ICS87950I - ICS87950I ICS87950I Datasheet
CDK8904-5 - CDK8904-5 CDK8904-5 Datasheet
Privacy Policy | Disclaimer
© 2013 Datasheets.org.uk