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HFA3766EVAL


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HFA3766EVAL - HFA3766EVAL  

Using PRISM® HFA3766EVAL Evaluation Board
AN9857
Introduction
HFA3766 highly integrated amplifier baseband converter half duplex wireless data applications. features necessary blocks baseband demodulation modulation quadrature multiplexing signals. Intended applications requiring high linearity with capabilities. Four fully independent blocks flexibility numerous applications covering wide range frequencies. Figure depicts simplified block diagram HFA3766.
designs. receive down converter mixers outputs have frequency response from 8kHz 20MHz baseband signals transmit mixers output summed amplified single ended open collector output with frequency response 400MHz. Multiplexed half duplex baseband order Butterworth pass filters also included design. filters address applications requiring pass antialiasing filtering external baseband threshold comparison, analog digital conversion receive channel. During transmission, filters used pulse shaping control spectral mask. Four filter bandwidths programmable, (2.2MHz, 4.4MHz, 8.8MHz 17.6MHz) digital hardwired control interface. These frequencies selected fine tuned optimization spectrum output responses.
HFA3766 stage integrated amplifier with 82dB voltage gain 76dB gain control range. conversion down conversion pair quadrature doubly balanced mixers available baseband processing. These converters driven internal quadrature generator which possesses broadband response with excellent quadrature properties. broadband operation, Local Oscillator frequency input required twice desired frequency modulation/demodulation. buffered, divide single ended selectable output provided convenience
Ordering Information
PART NUMBER HFA3766EVAL PKG. Evaluation
DEMOD_RXI DEMOD_RXQ
LPF_TUNE_1
DEMOD_IFIN
AGC1_OUT
AGC2_OUT
LPF_TUNE_0
LPF_SEL0
AGC_SEl AGC1_IN AGC1_VAGC AGC2_VAGC LO_IN 0o/90o LO_OUT LO_GND MOD_TX_IF_OUT MOD_TXQ MOD_TXI LPF_TXI LPF_TXQ LPF_TXQ_IN LPF_TXI_IN LPF_RXI_OUT LPF_RXQ _OUT
FIGURE BLOCK DIAGRAM
www.intersil.com 407-727-9207 Copyright Intersil Corporation 1999 PRISM PRISM logo trademarks Intersil Corporation.
LPF_SEL1
LPF_RXQ LPF_RXI
AGC2_IN
Application Note 9857
LO_OUT
AGC_CTRL
LO_IN IF_OUT
0.01µ 100p
TEXT 3-10pF
4.7K
4.7K TXPE
47nH
RXPE
100p
100p
100p
100p
LINE 82nH LINE LINE 0.1µ 0.1µ DIGITAL 0.01µ 0.01µ 0.01µ 0.01µ 0.01µ 0.01µ 0.01µ 0.01µ ANALOG 0.1µ RXPE
1000p
1000p 1000p
0.1µ
TXPE
1000p
0.1µ
4.7µ
10nH
1000p
0.1µ 1000p 1000p
0.1µ 1000p
0.01µ OPEN
0.1µ
0.01µ 4.3K IF_IN TXI_IN 4.3K 4.7µ RXI_OUT 2VREF TXQ_IN RXQ_OUT 0.01µ 4.7K SEL1 SEL0 RTUNE 4.7K
OPEN 0.01µ 0.01µ TXQ_IN TXI_IN
1000p
BEAD
OPTIONAL
CONNECT ENABLE LO_OUT OPTIONAL COMPONENTS
CAPACITORS MEASURED FARADS RESISTORS MEASURED
FLAT CABLE CONNECTOR
FIGURE EVALUATION BOARD SCHEMATICS (VERSION
Application Note 9857 Board Description
electrical schematic evaluation board shown Figure Pull resistors 4.7K have been added control pins together with shorting jumpers ground facilitate setting device into transmit receive modes, well programmable Pass Filters. Pass Filter Truth Table been added HFA3766EVAL1 silk screen assist rapid bandwidth adjustments. Logic high established jumping pins LPF_SEL1 together; removing jumper; identically LPF_SEL0. receive path activated placing jumper from center three cluster located between connectors OUT; similarly transmit path. Power Down during active transmit receive session achieved connecting Power Down pins together. Please refer View image HFA3766EVAL1, receive outputs terminated board with resistors. This Version HFA3677EVAL1, been configured digital input levels. transmit Digital (TTL) inputs terminated board with 4.3K resistors, form attenuating pad, which anticipate transmit inputs interfacing with drive load. utilize transmit path analog signal alternative circuit been suggested. Please notice lower left hand corner Figure alternative input circuit analog inputs chain. must also switched take advantage this feature. tying ground buffers programmed accept digital inputs. tying VCC, these buffers programed analog inputs. Although damage will result sending analog into digital inputs, expect loss phase information. transmit output conveniently matched 280MHz with network adjustable capacitor. Please refer View image HFA3766EVAL1, potentiometer R11, resistor (RTUNE totalling have been added Pass Filter fine tuning pins convenience evaluation. Please refer View image HFA3766EVAL1, boards have been adjusted -35dBc main lobe side lobe difference using selectable 8.8MHz filter tuned (RTUNE value approximately 900).The potentiometer RTUNE assume very values when evaluating tuning range. advisable contain this value within ±30% center value. Values cause power problems LPF. Upon power down, tuned value RTUNE read with ohmmeter. been intentionally disconnected from ground, thereby disabling LO_OUT buffer. Should this signal required, connect ground. been left disconnected from ground present layout. solder bridge must placed from when LO_OUT signal required.
Evaluation Notes
Proper antistatic procedures must used when handling HFA3766 evaluation board. When testing receive demodulator sensitivity, please remove transmit baseband digital signals avoid crosstalk. Please terminate LO_OUT output port into when enabling LO_OUT output. Leaving this port mismatched reduces carrier suppression transmit signal. When evaluating power consumption standby mode, please remember that most jumpers pull resistors which total when jumpers placed ground. significant external capacitive loading receive ports. Measure these ports with capacitance scope probe adapters high impedance capacitance vector voltmeter probes. High impedance capacitance active probes network analyzers also used. Proper driving capability rise fall time balance important code leakage evaluation spread spectrum signals. Make sure that data inputs below VCC.
Application Note 9857 HFA3766EVAL1 Board
VIEW
POWER DOWN
Application Note 9857 HFA3766EVAL1 Board
(Continued) BOTTOM VIEW
Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil semiconductor products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, site www.intersil.com
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