HDSP-211x HDSP-2x

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Designing with Avago Technologies HDSP-211x Smart Display Family
Application Note 1033
Avago Technologies' smart alphanumeric display, HDSP-2x, built optimize user's display design. Each HDSP-2x on-board CMOS which displays eight alphanumeric characters. CMOS consists eight byte Character RAM, Flash RAM, character ASCII decoder, symbol UserDefined Character (UDC) RAM, Address Register, Control Word Register refresh circuitry necessary synchronize decoding driving eight matrix characters. Designers should treat HDSP-2x RAM, whose purpose store display combination ASCII characters, symbols control information. This application note intended serve design application guide users HDSP-2x. user assumed familiar with HDSP-2x data sheet have copy available. information presented will cover interfacing HDSP-2x either Motorola 6808 Intel 8085 microprocessor. 6808 8085 microprocessors have been selected typical microprocessors. 6808 single line does multiplex address data bus. 8085 separate Read Write lines does multiplex address data lines. These approaches used with most microprocessor systems. Different length display systems created with simple modifications hardware software described this application note.
6808 Hardware Interface
circuit Figure illustrates interface HDSP-2x Motorola 6808 microprocessor. display interfaces directly 6808 with addition 74LS38 decoder 74LS373 transparent latch. 74LS38 used generate individual Chip Enables each HDSP-2x displays. These Chip Enables generated ANDing combination higher order address bits (A8, with VMA. Based circuit shown Figure displays memory mapped locations 0400h, 0500h, 0600h 0700h. Since address only partly decoded, other address combinations also access display. 74LS373 used generate address information HDSP-2x displays. 74LS373 used hold this address information stable after Chip Enable goes high. used gate latch enable ensure that valid address information stored latch.
HDSP-211X DISPLAY HDSP-211X DISPLAY HDSP-211X DISPLAY HDSP-211X DISPLAY
MASTER CLOCK SELECT
SLAVE CLOCK SELECT
74LS04
74LS00
74LS04
74LS138 DECODER G-2A G-2B
74LS373 LATCH
Figure Character Interface 6808 Microprocessor
5873-01 1592 1033
Figure Mapping Lower Order Microprocesor Address Lines
Figure shows order address lines connected display. latch outputs corresponding microprocessor outputs 0-A4 connected same display address inputs. output corresponding connected display input. Thus each display requires bytes memory space. Separate Read Write signals generated display using inverter microprocessor output. Although display read function selected even when display addressed, since Chip Enable high, display data lines tristated. Information passed microprocessor data bus, D0-D7, display data lines, D0-D7, when either Read Write input held display Chip Enable held low. Reset, Clock Clock Select lines used synchronize systems with multiple displays. circuit drawn that clock first display master clock other displays. Reset lines connected make display master reset. displays will synchronized after system been reset holding master reset least display system lengthened adding HDSP-2x displays connecting display pins appropriate microprocessor pins. Chip Enable connected unused output from 74LS38 decoder. display system shortened removing HDSP-2x displays from system.
Software Interface
HDSP-2x easy program. There five blocks (Control Word register, Address register, RAM, Flash RAM, Character RAM) within which influence operation display. designer control operation these blocks through software program. recommended sequence program these blocks programmable features (Control Word register); store custom characters (UDC Address register RAM); individual characters flashed (Flash RAM); load message displayed (Character RAM). Using this sequence ensures that message appears display expected. Described following paragraphs series software programs written load custom characters into load ASCII text into Character RAM. This sequence encoded using main program subroutines. subroutine used load custom characters from table display RAM. other subroutine used load character data from another table display Character RAM.
Figure Address Locations Labels Associated with each block Character Message System
Figure Location Labels Main Program, Subroutines Data
program each display necessary know address each block within each display. Figure shows address locations labels associated with each block character addressing schemes shown Figure decoded each display occupies bytes memory. display memory mapped location XXYY hex. most significant byte, HDSP-2x location least significant byte, location block within display. four displays located memory locations 04YYh, 05YYh, 06YYh, 07YYh, where 04YYh location leftmost display 07YYh location rightmost. Flash data stored from location XX00H location XX07h, where XX00h associated with leftmost character display XX07h rightmost character display. Address register located location XX20h. located location XX28h bottom location XX2Eh. Control Word register located XX30h. Character data stored from XX38h XX3Fh, where XX38h leftmost character display XX3Fh rightmost character display.
Figure shows location labels main program, subroutines data. DISPLOAD main program which calls passes information subroutines. UDCLOAD subroutine which loads Custom Characters into HDSP-2x. TABLEDOT location first symbol. DISPLAY subroutine which loads Character HDSP-2x. CHAR location leftmost character message.
Figure Memory Location Used Pass Information from Main Program Subroutines
6808 UDCLOAD Subroutine Temporary Memory
Figure shows four memory locations that used temporary storage UDCLOAD subroutine. Three locations used store information passed from main program subroutine. fourth used internal counter. UDCADDR stores memory location Address register (XX20h) UDCLOAD subroutine. content UDCADDR will XX20h when subroutine finishes execution. UDCRAMR stores memory location (XX28h) UDCLOAD subroutine. content UDCRAMR will XX28h when sub-routine finishes executing.
UDCDATAT stores location first character TABLEDOT (0820h) UDCLOAD subroutine. content UDCDATAT will 088Fh when subroutine finished execution. COUNT used UDCLOAD keep track which character being loaded into RAM. user does need initialize COUNT prior executing UDCLOAD.
6808 UDCLOAD Subroutine
Figure shows program listing UDCLOAD subroutine. This routine transfers data from main memory display RAM. loops used load RAM. outer loop, labeled NUDC, repeated times, time each location. COUNT used keep track number times NUDC been executed. NUDC loads Address register with address symbol. inner loop, labeled NROW, executed seven times each execution NUDC. NROW loads data into starting with ending with bottom row. Three pieces information passed subroutine. They memory locations Address register (UDCADDR), (UDCRAMR) data table (UDCDATAT).
Memory table "TABLEDOT" organized shown Figure Each symbols specified block seven memory locations. first symbol stored location last symbol stored location hex. first location within block symbol last location block bottom row.
Figure Subroutine Load with Custom Symbols
Figure Organization Data used with UDCLOAD Routine
Figure Data load into
Figure Memory Location used pass information from Main Program Subroutines
Figure shows greater than equal sign created symbol. Executing UDCLOAD subroutine with 0420h stored UDCADDR, 0428h stored UDCRAMR 0820 stored UDCDATAT will cause sign stored leftmost display location subroutine will also load fifteen other locations. display this symbol, stored Character leftmost display.
6808 Display Subroutine Temporary Memory
Figure shows memory locations which used temporary storage DISPLAY subroutine. TABLECH stores memory location leftmost character message (0300h) displayed DISPLAY subroutine. After execution DISPLAY, value stored TABLECH will have been incremented Thus, systems consisting multiple HDSP-2xs, TABLECH needs initialized only leftmost display. DISPL stores memory location Character (XX38h) DISPLAY subroutine. contents DISPL will XX3F when subroutine finishes execution.
6808 Display Subroutine
Figure shows program listing DISPLAY subroutine. This routine transfers character data from main memory Character display. program loads Character locations executing loop labeled "NCHAR" times. leftmost character loaded first rightmost loaded last. pieces information passed subroutine. They location Character (DISPL) location message (TABLECH). display systems using more than HDSP-2x, subroutine will remember location next byte block message. Figure shows organization character message.
Figure Subroutine Load Character
Figure Organization Character Message used with Display Routines
Figure shows character message stored memory with DISPLAY subroutine. Figure shows this message will look after executing DISPLOAD program.
Figure ASCII Data Stored Memory Display Routine
Figure Character Message
6808 DISPLOAD Program
Figure shows listing DISPLOAD program. This program loads RAMs four HDSP-2x displays displays character message. UDCLOAD subroutine executed four times load RAMs displays. DISPLAY subroutine executed four times load character message.
DISPLOAD program written load display message. each display system, UPCLOAD subroutine must executed once display load RAM. display message, DISPLAY subroutine executed once each display system. each display system loaded with data before first DISPLAY subroutine executed.
Figure Main Program Call UDCLOAD DISPLAY Subroutines
8085 Hardware Interface
circuit Figure shows interface HDSP2x INTEL 8085 microprocessor. display interfaces directly 8085 with addition 74LS38 decoder. 74LS38 used generate individual Chip Enables each HDSP-2x displays. These Chip Enables created decoding higher order address bits (A8, A0). Based circuit shown Figure displays memory mapped location 04YYh, 05YYh, 06YYh 07YYh. Since address only partly decoded, other address combinations also access display. Figure shows lower order microprocessor address lines connected display. Each display uses memory locations. display Address inputs must held stable after Chip Enable signal goes high. 8085 multiplexes A0-A7 D0-D7 same bus. latch required isolate A0-A7 from D0D7. This latch provides necessary hold time. latch outputs corresponding microprocessor outputs connected same display Address inputs. output corresponding connected display input. 8085 separate Read Write lines which connected directly display Read Write lines. Information passed microprocessor data bus, D0-D7, display data lines, D0-D7, when either Read Write input held display Chip Enable held low. Reset, Clock Clock Select lines used synchronize systems with multiple displays. circuit drawn that clock first display master clock other displays. Reset lines connected make display master reset. display will synchronized after system been reset holding master reset least
8085 UDCLOAD Subroutine Temporary Storage
Three register pairs used temporary storage UDCLOAD subroutine. registers used store information passed from main program subroutine. Register pair stores memory location Address register (XX20h) UDCLOAD subroutine. content register pair will XX20h when subroutine finishes execution. Register pair stores memory location (XX28h) UDCLOAD subroutine. content register pair will XX28h when subroutine finishes execution. Register pair stores location first character TABLEDOT (0820h) UDCLOAD subroutine. content register pair will 088Fh when subroutine finishes execution. COUNT used UDCLOAD keep track which character being loaded into RAM. user does need initialize COUNT prior executing UDCLOAD.
MASTER CLOCK SELECT
HDSP-211X DISPLAY HDSP-211X DISPLAY HDSP-211X DISPLAY HDSP-211X DISPLAY
SLAVE CLOCK SELECT
74LS08
74LS138 DECODER
G-2B G-2A
74LS04
74LS273 LATCH
*HIGHER ORDER MICROPROCESSOR ADDRESS LINES
5873-15 1592 1033
Figure Character Interface 8085 Microprocessor
8085 UDCLOAD Subroutine
Figure shows program listing UDCLOAD subroutine. Three pieces information passed subroutine. They memory locations Address register (B&C), (H&L), data (D&E). detailed explanation UDCLOAD subroutine selection labeled 6808 UDCLOAD SUBROUTINE.
8085 Display Subroutine Temporary Memory
register pairs used temporary storage DISPLAY subroutine. Register pair stores memory location Character (XX38h) DISPLAY subroutine. content register pair will XX3Fh after subroutine finishes execution. Register pair stores memory location leftmost character message (0300h) displayed DISPLAY subroutine. After execution DISPLAY, value stored will have been incremented Thus, systems consisting multiple HDSP-2xs, needs initialized only leftmost display character.
Figure Subroutine Load with Custom Symbols
8085 Display Subroutine
Figure shows program listing DISPLAY subroutine. pieces information passed subroutine. They location Character (H&L) location message (D&E). detailed explanation DISPLAY subroutine section labeled 6808 DISPLAY SUBROUTINE.
Figure Subroutine Load Character
8085 DISPLOAD Program
Figure shows listing DISPLOAD program. This program loads RAMs four HDSP-2x displays displays character message. UDCLOAD subroutine executed four times load RAMs displays. DISPLAY subroutine executed four times load character message. DISPLOAD program written load display message. each display system, UDCLOAD subroutine must executed once display load RAM. display message, DISPLAY subroutine executed once each display system. each display system loaded with data before first DISPLAY subroutine executed.
Figure Main Program Call UDCLOAD DISPLAY Subroutines
product information complete list distributors, please site: www.avagotech.com Avago, Avago Technologies, logo trademarks Avago Technologies, Pte. United States other countries. Data subject change. Copyright 2006 Avago Technologies Pte. rights reserved. 5988-5632EN June 2006

HDSP-211x HDSP-2x

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