HCPL-7860 HCPL-786J

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HCPL-7860/HCPL-786J
Optically Isolated Sigma-Delta (S-D) Modulator
RoHS fully compliant options available; -xxxE denotes lead-free product
Description
HCPL-7860/HCPL-786J Optically Isolated Modulator HCPL-0872 Digital Interface digital filter together form isolated programmable two-chip analog-to-digital converter. isolated modulator allows direct measurement motor phase currents power inverters. operation, HCPL-7860/HCPL-786J Isolated Modulator (optocoupler with 3750 VRMS dielectric withstand voltage rating) converts low-bandwidth analog input into high-speed one-bit data stream means Sigma-Delta over-sampling modulator. This modulation provides high noise margins excellent immunity against isolation-mode transients. modulator data on-chip sampling clock encoded transmitted across isolation boundary where they recovered decoded into separate high-speed clock data channels.
Features
12-bit Linearity Conversion Time (Pre-Trigger Mode with HCPL-0872) 12-bit Effective Resolution with Signal Delay (14-bit with (with HCPL-0872) Fast Over-Range Detection (with HCPL-0872) Input Range with Single Supply Internal Reference Voltage Matching Offset Calibration (with HCPL-0872) -40°C +85°C Operating Temperature Range kV/µs Isolation Transient Immunity Safety Approval: 1577, IEC/EN/DIN 60747-5-2
Applications
Motor Phase Rail Current Sensing Data Acquisition Systems Industrial Process Control Inverter Current Sensing General Purpose Current Sensing Monitoring
HCPL-7860 SIGMA DELTA MOD./ ENCODE
DECODE
Input Current
HCPL-0872 Digital Filter
NOTE: bypass capacitor must connected between pins VDD1 GND1 between pins VDD2 GND2.
CAUTION: advised that normal static precautions taken handling assembly this component prevent damage and/or degradation, which induced ESD.
Description
ISOLATION BOUNDARY SIGMADELTA MOD./ ENCODE DECODE MDAT GND2 MCLK INNC GND1 SIGMADELTA MOD./ ENCODER DECODER GND2 MCLK MDAT GND2
GND1
SHIELD
HCPL-7860 Symbol VDD1 VIN+ VINGND1 Description Supply voltage input (4.5 Positive input recommended) Negative input (normally connected GND1) Input ground
HCPL-786J Symbol VDD2 MCLK MDAT GND2 Description Supply voltage input (4.5 Clock output typical) Serial data output Output ground
Note: connection. Leave floating.
Ordering Information
HCPL-7860/HCPL-786J Recognized with 3750 Vrms minute UL1577.
Option Part number RoHS Compliant Non-RoHS Compliant Package Surface Mount Gull Wing Tape Reel IEC/EN/DIN 60747-5-2 Quantity
HCPL-7860
-000E -300E -500E
option #300 #500 option
DIP-8 SO-16
tube tube 1000 reel tube
HCPL-786J
-000E
-500E #500 reel order, choose part number from part number column combine with desired option from option column form order entry. Example HCPL-7860-500E order product Gull Wing Surface Mount package Tape Reel packaging with IEC/EN/DIN 60747-5-2 Safety Approval RoHS compliant. Example HCPL-786J order product SO-16 package tube packaging non-RoHS compliant. Option datasheets available. Contact your Avago sales representative authorized distributor information. Remarks: notation `#XXX' used existing products, while (new) products launched since 15th July 2001 RoHS compliant option will `-XXXE'.
Package Outline Drawings 8-pin Package
9.80 0.25 (0.386 0.010) REFERENCE VOLTAGE MATCHING SUFFIX* DATE CODE
TYPE NUMBER
7860X YYWW 1.19 (0.047) MAX.
1.78 (0.070) MAX.
7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010)
3.56 0.13 (0.140 0.005)
4.70 (0.185) MAX.
0.51 (0.020) MIN. 2.92 (0.115) MIN.
1.080 0.320 (0.043 0.013)
0.65 (0.025) MAX. 2.54 0.25 (0.100 0.010) TYP.
0.20 (0.008) 0.33 (0.013)
DIMENSIONS MILLIMETERS (INCHES). DIMENSIONSIN MILLIMETERS (INCHES).
NOTE: FLOATING LEAD PROTRUSION (20mils) MAX.
NORMAL CONTINUED VARIATION COLOUR NOTE: INITIALDOES AFFECT DEVICE PERFORMANCE RELIABILITY. HCPL-7860/HCPL-786J'S WHITE MOLD COMPOUND ISNORMAL DOES AFFECT DEVICE PERFORMANCE RELIABILITY. *ALL UNITS WITHIN EACH HCPL-7860 STANDARD PACKAGING INCREMENT (EITHER TUBE 1000 REEL) HAVE COMMON MARKING SUFFIX REPRESENT ABSOLUTE REFERENCE VOLTAGE TOLERANCE ABSOLUTE *ALL UNITSVOLTAGE TOLERANCE 4%STANDARD PACKAGING INCREMENT (EITHER TUBE 1000 WITHIN EACH HCPL-7860 GUARANTEED BETWEEN STANDARD PACKAGING INCREMENTS. REFERENCE NOTE: INITIAL CONTINUED VARIATION COLOUR HCPL-7860/HCPL-786J'S WHITE MOLD COMPOUND
NOTE: FLOATING LEAD PROTRUSION (20mils) MAX.
REEL) HAVEA COMMON MARKING SUFFIX REPRESENT REFERENCE VOLTAGE MATCHING ABSOLUTEREFERENCE VOLTAGE TOLERANCE GUARANTEED BETWEEN STANDARD PACKAGING INCREMENTS.
8-pin Gull Wing Surface Mount Option
LAND PATTERN RECOMMENDATION 9.80 0.25 (0.386 0.010) 1.016 (0.040)
6.350 0.25 (0.250 0.010)
10.9 (0.430)
(0.080)
1.27 (0.050) 1.780 (0.070) MAX. 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010)
1.19 (0.047) MAX.
3.56 0.13 (0.140 0.005)
0.20 (0.008) 0.33 (0.013)
1.080 0.320 (0.043 0.013) 2.540 (0.100) 0.51 0.130 (0.020 0.005)
0.635 0.25 (0.025 0.010)
NOM.
DIMENSIONS MILLIMETERS (INCHES). TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx 0.01 xx.xxx 0.005 NOTE: FLOATING LEAD PROTRUSION 0.15 mils) MAX.
LEAD COPLANARITY MAXIMUM: 0.102 (0.004)
16-Lead Surface Mount
LAND PATTERN RECOMMENDATION 0.457 (0.018) TYPE NUMBER DATE CODE 786J YYWW 7.493 0.254 (0.295 0.010) 11.63 (0.458) 1.270 (0.050) 0.64 (0.025)
2.16 (0.085) LEADS COPLANAR 0.002 10.312 0.254 (0.406 0.10)
8.986 0.254 (0.345 0.010)
0.457 (0.018)
3.505 0.127 (0.138 0.005)
0-8° 0.025 MIN. 10.160 0.254 (0.408 0.010)
0.203 0.076 (0.008 0.003) STANDOFF
DIMENSIONS MILLIMETERS (INCHES).
NOTE: Initial continued variation color HCPL-786J's white mold compound normal does affect device performance reliability. NOTE: FLOATING LEAD PROTRUSION 0.15 mils) MAX.
Solder Reflow Temperature Profile
PREHEATING RATE 1°C/-0.5°C/SEC. REFLOW HEATING RATE 2.5°C 0.5°C/SEC. PEAK TEMP. 245°C PEAK TEMP. 240°C
TEMPERATURE (°C) 160°C 150°C 140°C
PEAK TEMP. 230°C
2.5°C 0.5°C/SEC. SEC. SEC.
SOLDERING TIME 200°C
1°C/-0.5°C PREHEATING TIME 150°C, SEC.
SEC. TIGHT TYPICAL LOOSE
ROOM TEMPERATURE TIME (SECONDS) Note: non-chlorine-activated fluxes highly recommended.
Recommended Lead Free Profile
TEMPERATURE (°C)
TIME WITHIN ACTUAL PEAK TEMPERATURE 20-40 SEC.
+0/-5°C 217°C RAMP-UP 3°C/SEC. MAX. 200°C
smax smin
RAMP-DOWN 6°C/SEC. MAX.
PREHEAT SEC. 25°C PEAK
SEC.
TIME (SECONDS) NOTES: TIME FROM 25°C PEAK TEMPERATURE MINUTES MAX. Tsmax 200°C, Tsmin 150°C Note: non-chlorine-activated fluxes highly recommended.
Regulatory Information
HCPL-7860/HCPL-786J been approved following organizations:
IEC/EN/DIN 60747-5-2
Approved under: 60747-5-2:1997 A1:2002 60747-5-2:2001 A1:2002 60747-5-2 (VDE 0884 Teil 2):2003-01.
Approval under 1577, component recognition program VISO 3750 VRMS. File E55361.
Approval under Component Acceptance Notice File 88324.
IEC/EN/DIN 60747-5-2 Insulation Characteristics[1]
Description Installation classification 0110/1.89, Table rated mains voltage Vrms rated mains voltage Vrms rated mains voltage Vrms Climatic Classification Pollution Degree (DIN 0110/1.89) Maximum Working Insulation Voltage Input Output Test Voltage, Method b[2] VIORM 1.875=VPR, 100% Production Test with tm=1 sec, Partial discharge Input Output Test Voltage, Method a[2] VIORM 1.5=VPR, Type Sample Test, tm=60 sec, Partial discharge Highest Allowable Overvoltage(Transient Overvoltage tini sec) Safety-limiting values maximum values allowed event failure. Case Temperature Input Current Output Power Insulation Resistance
Notes: Insulation characteristics guaranteed only within safety maximum ratings, which must ensured protective circuits within application. Surface Mount Classifications Class accordance with CECC00802. Refer optocoupler section Isolation Control Components Designer's Catalog, under Product Safety Regulations section, (IEC/EN/DIN 60747-5-2) detailed description Method Method partial discharge test profiles. Refer following figure dependence ambient temperature.
Symbol
HCPL-7860/786J 40/85/21
Unit
VIORM
1670
Vpeak Vpeak
1336
Vpeak
VIOTS INPUT OUTPUT
6000 >109
Vpeak
OUTPUT POWER INPUT CURRENT
(mW) (mA)
CASE TEMPERATURE
Insulation Safety Related Specifications
Option surface mount classification Class accordance with CECC 00802. Parameter Minimum External (Clearance) Minimum External Tracking (Creepage) Minimum Internal Plastic (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group Symbol L(101) L(102) DIP-8 SO-16 Units Conditions Measured from input terminals output terminals, shortest distance through air. Measured from input terminals output terminals, shortest distance path along body. Through insulation distance conductor conductor, usually straight line distance thickness between emitter detector. 112/VDE 0303 Part Material Group (DIN 0110, 1/89, Table
>175 IIIa
>175 IIIa
Absolute Maximum Ratings
Parameter Storage Temperature Ambient Operating Temperature Supply Voltages Steady-State Input Voltage Second Transient Input Voltage Output Voltages Lead Solder Temperature Solder Reflow Temperature Profile MCLK, MDAT Symbol VDD1, VDD2 VIN+, VINMin. -2.0 -6.0 -0.5 VDD2 260°C sec., below seating plane Maximum Solder Reflow Thermal Profile section Max. VDD1 Units Note
Recommended Operating Conditions
Parameter Ambient Operating Temperature Supply Voltages Input Voltage Symbol VDD1, VDD2 VIN+, VINMin. -200 Max. +200 Units Note
Electrical Specifications (DC)
Unless otherwise noted, specifications VIN+ VIN- Typical specifications 25°C VDD1 VDD2 Minimum Maximum specifications apply over following ranges: -40°C +85°C, VDD1 VDD2 Parameter Average Input Bias Current Average Input Resistance Input Common-Mode Rejection Ratio Output Logic High Voltage Output Logic Voltage Output Short Circuit Current Input Supply Current Output Supply Current Output Clock Frequency Data Hold Time Symbol CMRRIN |IOSC| IDD1 IDD2 fCLK tHDDAT Min. Typ. -0.8 13.2 Max. Units IOUT -100 IOUT VOUT VDD2 GND2 VIN+ -350 +350 Conditions Fig. Note
Electrical Specifications (Tested with HCPL-0872 Sinc3 Filter)
Unless otherwise noted, specifications VIN+ -200 +200 VIN- Typical specifications 25°C VDD1 VDD2 Minimum Maximum specifications apply over following ranges: -40°C +85°C, VDD1 VDD2 STATIC CHARACTERISTICS Parameter Resolution Integral Nonlinearity Differential Nonlinearity Uncalibrated Input Offset Offset Drift Temperature Offset drift VDD1 Internal Reference Voltage Absolute Reference Voltage Tolerance Reference Voltage Matching VREF Drift Temperature VREF Drift VDD1 Full Scale Input Range Recommended Input Voltage Range HCPL-7860 HCPL-786J dVREF/dTA dVREF/dVDD1 -VREF -200 dVOS/dTA dVOS/dVDD1 VREF +VREF +200 0.12 Symbol Min. 0.01 0.14 Typ. Max. Units bits µV/°C mV/V ppm/°C. 25°C. VIN+ VIN+ VIN+ Conditions Fig. Note
DYNAMIC CHARACTERISTICS (Digital Interface HCPL-0872 Conversion Mode
Parameter Signal-to-Noise Ratio Total Harmonic Distortion Signal-to-(Noise Distortion) Effective Number Bits Conversion Time Symbol ENOB Signal Delay Over-Range Detect Time Threshold Detect Time (default configuration) Signal Bandwidth Isolation Transient Immunity tDSIG tOVR1 tTHR1 Min. Typ. Max. Units bits kV/µs VISO VIN+ 400mV step waveform Pre-Trigger Mode Pre-Trigger Mode Pre-Trigger Mode Conditions VIN+ mVpk-pk (141 mVrms) sine wave. Fig. 9,10 Note
1,12 1,12 1,12
Package Characteristics
Parameter Input-Output Momentary Withstand Voltage* Input-Output Resistance Input-Output Capacitance Input Junction-to-Case Thermal Resistance Output Junction-to-Case Thermal Resistance Symbol VISO RI-O CI-O qjci qjco Min. 3750 1012 1011 °C/W °C/W 1013 Typ. Max. Units Vrms Conditions 50%, 25°C VI-O 100°C Thermocouple located center underside package Note
*The Input-Output Momentary Withstand Voltage dielectric voltage rating that should interpreted input-output continuous voltage rating. continuous voltage rating refer IEC/EN/DIN 60747-5-2 Insulation Characteristics Table applicable), your equipment level safety specification, Avago Technologies Application Note 1074, "Optocoupler Input-Output Endurance Voltage."
Notes: VIN- (pin brought above VDD1 with respect GND1 internal optical-coupling test mode activated. This test mode intended customer use. units within each HCPL-7860 standard packaging increment (either tube 1000 reel) have Reference Voltage Matching Absolute Reference Voltage Tolerance guaranteed between standard packaging increments. Because switched-capacitor nature isolated modulator, time averaged values shown. CMRRIN defined ratio gain differential inputs applied between VIN+ VIN- gain common-mode inputs applied both VIN+ VIN- with respect input ground GND1. Short-circuit current amount output current generated when either output shorted GND2. under these conditions recommended. Data hold time amount time that data output MDAT will stay stable following rising edge output clock MCLK. Resolution defined total number output bits. useable accuracy converter function linearity signal-to-noise ratio, rather than many total bits has. Integral nonlinearity defined one-half peak-to-peak deviation best-fit line through transfer curve VIN+ -200 +200 expressed either number LSBs percent measured input range (400 mV). Differential nonlinearity defined deviation actual difference from ideal difference between midpoints successive output codes, expressed LSBs. Data sheet value average magnitude difference offset voltage from =25°C 85°C, expressed microvolts Three standard deviation from typical value less than µV/°C. Beyond full-scale input range output either zeroes ones. effective number bits effective resolution) defined equation ENOB (SNR-1.76)/6.02 represents resolution ideal, quantization-noise limited converter with same SNR. Conversion time defined time from when convert start signal brought when SDAT goes high, indicating that output data ready clocked out. This small cycles isolated modulator clock determined frequency isolated modulator clock selected Conversion Pre-Trigger modes. determining true signal delay characteristics converter closed-loop phase margin calculations, signal delay specification should used. Signal delay defined effective delay input signal through Isolated converter. measured applying -200 step input modulator adjusting relative delay convert start signal that output converter scale. signal delay elapsed time from when step signal applied input when output data ready conversion cycle. signal delay most important specification determining true signal delay characteristics converter should used determining phase margins closed-loop applications. signal delay determined frequency modulator clock which Conversion Mode selected, independent selected Pre-Trigger Mode and, therefore, conversion time. minimum maximum overrange detection time determined frequency channel isolated modulator clock. minimum maximum threshold detection time determined user-defined configuration adjustable threshold detection circuit frequency channel isolated modulator clock. Applications Information section further detail. specified times apply default configuration. signal bandwidth frequency which magnitude output signal decreased below low-frequency value. signal bandwidth determined frequency modulator clock selected Conversion Mode. isolation transient immunity (also known Common-Mode Rejection) specifies minimum rate-of-rise isolation-mode signal applied across isolation boundary beyond which modulator clock data signals corrupted. accordance with UL1577, devices with minimum VISO specified 3750 Vrms, each isolated modulator (optocoupler) proof-tested applying insulation test voltage greater than 4500 Vrms second (leakage current detection limit II-O< 5µA). This test performed before Method 100% production test partial discharge shown IEC/EN/DIN 60747-5-2 Insulation Characteristics Table. This two-terminal measurement: pins shorted together pins shorted together.
IDD1
10.5 10.0 -400
IDD2 -200
-200
-400
Figure VIN.
Figure IDD1 VIN.
Figure IDD2 VIN.
10.0 CLOCK FREQUENCY INL-LSB
INL-%
0.02 0.018 0.016 0.014 0.012 0.01 0.008 0.006
TEMPERATURE
TEMPERATURE
TEMPERATURE
Figure Clock Frequency Temperature.
Figure (Bits) Temperature
Figure Temperature
OFFSET CHANGE CHANGE -100 -150
-0.2 -0.4
TEMPERATURE
TEMPERATURE
TEMPERATURE
Figure Offset Change Temperature
Figure VREF Change Temperature
Figure Temperature
EFFECTIVE RESOLUTION BITS)
CONVERSION TIME
PRE-TRIGGER MODE PRE-TRIGGER MODE PRE-TRIGGER MODE
CONVERSION MODE
CONVERSION MODE
CONVERSION MODE
Figure Conversion Mode.
Figure Effective Resolution Conversion Mode.
Figure Conversion Time Conversion Mode.
SIGNAL BANDWIDTH SIGNAL DELAY µs/DIV. OVR1 (200 mV/DIV.) THR1 V/DIV.) IN+(200 mV/DIV.)
CONVERSION MODE
CONVERSION MODE
Figure Signal Delay Conversion Mode.
Figure Over-Range Threshold Detect Times.
Figure Signal Bandwidth Conversion Mode.
Applications Information Digital Current Sensing
shown Figure using Isolated 2-chip converter sense current simple connecting current-sensing resistor, shunt, input reading output data through 3-wire serial output interface. choosing appropriate shunt resistance, range current monitored, from less than more than Even better performance achieved fully utilizing more advanced features Isolated converter, such pre-trigger circuit, which reduce conversion time less than fast over-range detector quickly detecting short circuits, different conversion modes giving various resolution/speed trade-offs, offset calibration mode eliminate initial offset from measurements, adjustable threshold detector detecting non-short circuit overload conditions.
NON-ISOLATED
ISOLATED INPUT CURRENT SHUNT 0.02 INGND1 MCLK MDAT GND2
CCLK CLAT CDAT MCLK1 MDAT1 MCLK2 MDAT2
CHAN SCLK SDAT THR1 OVR1 RESET 3-WIRE SERIAL INTERFACE
HCPL-7860/ HCPL-786J
HCPL-0872
Figure Typical Application Circuit.
Product Description
HCPL-7860/HCPL-786J Isolated Modulator (optocoupler) uses sigma-delta modulation convert analog input signal into high-speed MHz) single-bit digital data stream; time average modulator's singlebit data directly proportional input signal. isolated modulator's other main function provide galvanic isolation between analog input digital output. internal voltage reference determines fullscale analog input range modulator (approximately mV); input range recommended achieve optimal performance. HCPL-7860/HCPL-786J used together with HCPL0872, Digital Interface digital filter. primary functions HCPL-0872 Digital Interface derive multi-bit output signal averaging single-bit modulator data, well provide direct microcontroller interface. effective resolution multi-bit output signal function length time (measured modulator clock cycles) over which average taken; averaging over longer periods time results higher resolution. Digital Interface configured five conversion modes, which have different combinations speed resolution achieve desired level performance. Other functions HCPL-0872 Digital Interface include Phase Locked Loop based pre-trigger circuit that either give more precise control effective sampling time reduce conversion time less than fast over-range detection circuit that rapidly indicates when magnitude input signal beyond full-scale, adjustable threshold detection circuit that indicates when magnitude input signal above user adjustable threshold level, offset calibration circuit, second multiplexed input that allows second Isolated Modulator used with single Digital Interface digital output format Isolated Converter bits unsigned binary data. input full-scale range code assignment shown Table below. Although output contains bits data, effective resolution lower determined selected conversion mode shown Table below.
Table Input Full-Scale Range Code Assignment.
Analog Input Full Scale Range Minimum Step Size +Full Scale Zero -Full Scale Voltage Input +320 -320 Digital Output 32768 LSBs 111111111111111 100000000000000 000000000000000
Table Isolated Converter Typical Performance Characteristics.
Signal-toNoise Ratio (dB) Effective Resolution (bits) 13.5 12.8 11.9 10.7 Conversion Time (µs) Pre-Trigger Mode Signal Delay(µs) Signal Bandwidth (kHz)
Conversion Mode
Notes: Bold italic type indicates Default values.
Power Supplies Bypassing
recommended application circuit shown Figure floating power supply (which many applications could same supply that used drive highside power transistor) regulated using simple zener diode (D1); value resistor should chosen supply sufficient current from existing floating supply. voltage from current sensing resistor shunt (Rsense) applied input HCPL-7860/HCPL786J (U2) through anti-aliasing filter C2). finally, output clock data isolated modulator connected digital interface Although application circuit relatively simple, recommendations should followed ensure optimal performance. power supply isolated modulator most often obtained from same supply used power power transistor gate drive circuit. dedicated supply required, many cases possible additional winding existing transformer. Otherwise, some sort simple isolated supply used, such line powered transformer high-frequency DC-DC converter.
FLOATING POSITIVE SUPPLY GATE DRIVE CIRCUIT
inexpensive 78L05 three-terminal regulator also used reduce floating supply voltage help attenuate high-frequency power supply noise ripple, resistor inductor used series with input regulator form low-pass filter with regulator's input bypass capacitor. shown Figure bypass capacitors should located close possible input output power-supply pins isolated modulator (U2). bypass capacitors required because high-speed digital nature signals inside isolated modulator. 0.01 bypass capacitor (C2) also recommended input switched-capacitor nature input circuit. input bypass capacitor also forms part anti-aliasing filter, which recommended prevent high-frequency noise from aliasing down lower frequencies interfering with input signal.
CCLK CLAT INC2 0.01 GND1 MCLK MDAT GND2 CDAT MCLK1 MDAT1 MCLK2 MDAT2 CHAN SCLK SDAT THR1 OVR1 RESET CONTROL CIRCUIT
MOTOR
SENSE
HCPL-7860/ HCPL-786J
HCPL-0872
Figure Recommended Application Circuit.
Board Layout
design printed circuit board (PCB) should follow good layout practices, such keeping bypass capacitors close supply pins, keeping output signals away from input signals, ground power planes, etc. addition, layout also affect isolation transient immunity (CMR) isolated modulator, primarily stray capacitive coupling between input output circuits. obtain optimal performance, layout board should minimize stray coupling maintaining maximum possible distance between input output sides circuit ensuring that ground power plane board does pass directly below extend much wider than body isolated modulator. maximum average power dissipation shunt also easily calculated multiplying shunt resistance times square maximum current, which about previous example. power dissipation shunt high, resistance shunt decreased below maximum value decrease power dissipation. minimum value shunt limited precision accuracy requirements design. shunt value reduced, output voltage across shunt also reduced, which means that offset noise, which fixed, become larger percentage signal amplitude. selected value shunt will fall somewhere between minimum maximum values, depending particular requirements specific design. When sensing currents large enough cause significant heating shunt, temperature coefficient (tempco) shunt introduce nonlinearity signal dependent temperature rise shunt. effect increases shunt-to-ambient thermal resistance increases. This effect minimized either reducing thermal resistance shunt using shunt with lower tempco. Lowering thermal resistance accomplished repositioning shunt board, using larger board traces carry away more heat, using heat sink. two-terminal shunt, value shunt resistance decreases, resistance leads becomes signifi40 MOTOR OUTPUT POWER HORSEPOWER
Shunt Resistors
current-sensing shunt resistor should have resistance minimize power dissipation), inductance minimize di/dt induced voltage spikes which could adversely affect operation), reasonable tolerance maintain overall circuit accuracy). Choosing particular value shunt usually compromise between minimizing power dissipation maximizing accuracy. Smaller shunt resistances decrease power dissipation, while larger shunt resistances improve circuit accuracy utilizing full input range isolated modulator. first step selecting shunt determining much current shunt will sensing. graph Figure shows current each phase three-phase induction motor function average motor output power horsepower, motor drive supply voltage. maximum value shunt determined current being measured maximum recommended input voltage isolated modulator. maximum shunt resistance calculated taking maximum recommended input voltage dividing peak current that shunt should during normal operation. example, motor will have maximum current experience overloads during normal operation, then peak current 21.1 1.414 1.5). Assuming maximum input voltage maximum value shunt resistance this case would about
MOTOR PHASE CURRENT (rms)
Figure Motor Output Horsepower Motor Phase Current Supply Voltage.
cant percentage total shunt resistance. This primary effects shunt accuracy. First, effective resistance shunt become dependent factors such long leads are, they bent, they inserted into board, solder wicks lead during assembly (these issues will discussed more detail shortly). Second, leads typically made from material such copper, which much higher tempco than material from which resistive element itself made, resulting higher tempco shunt overall. Both these effects eliminated when fourterminal shunt used. four-terminal shunt additional terminals that Kelvin-connected directly across resistive element itself; these terminals used monitor voltage across resistive element while other terminals used carry load current. Because Kelvin connection, voltage drops across leads carrying load current should have impact measured voltage. Several four-terminal shunts from Isotek suitable sensing currents motor drives Arms shown Table maximum current motor power range each series shunts indicated. shunt resistances from down maximum current limited input voltage range isolated modulator. shunts, heat sink required increased power dissipation higher currents.
When laying board shunts, couple points should kept mind. Kelvin connections shunt should brought together under body shunt then very close each other input isolated modulator; this minimizes loop area connection reduces possibility stray magnetic fields from interfering with measured signal. shunt located same board isolated modulator circuit, tightly twisted pair wires accomplish same thing. Also, multiple layers board used increase current carrying capacity. Numerous plated-through vias should surround each non-Kelvin terminal shunt help distribute current between layers board. board should copper layers, resulting current carrying capacity excess Making current carrying traces board fairly large also improve shunt's power dissipation capability acting heat sink. Liberal vias where load current enters exits board also recommended.
Table Isotek Four-Terminal Shunt Summary.
Shunt Resistor Part Number PBV-R050-0.5 PBV-R020-0.5 PBV-R010-0.5 PBV-R005-0.5 PBV-R002-0.5 Shunt Resistance Tol. Maximum Current [28] [71] Motor Power Range
Note: Values brackets with heatsink shunt.
Shunt Connections
recommended method connecting isolated modulator shunt resistor shown Figure VIN+ (pin HPCL-7860/HCPL-786J) connected positive terminal shunt resistor, while VIN- (pin shorted GND1 with power-supply return path functioning sense line negative terminal current shunt. This allows single pair wires board traces connect isolated modulator circuit shunt resistor. referencing input circuit negative side sense resistor, load current induced noise transients shunt seen common-mode signal will interfere with current-sense signal. This important because large load currents flowing through motor drive, along with parasitic inductances inherent wiring circuit, generate both noise spikes offsets that relatively large compared small voltages that being measured across current shunt. same power supply used both gate drive circuit current sensing circuit, very important that connection from GND1 isolated modulator sense resistor only return path supply current gate drive power supply order eliminate potential ground loop problems. only direct connection between isolated modulator circuit gate drive circuit should positive power supply line. some applications, however, supply currents flowing through power-supply return path cause offset noise problems. this case, better performance obtained connecting VIN+ VIN- directly across shunt resistor with conductors, connecting GND1 shunt resistor with third conductor power-supply return path, shown Figure When connected this way, both input pins should bypassed. minimize electromagnetic interference sense signal, conductors (whether three used) connecting isolated modulator sense resistor should either twisted pair wire closely spaced traces board. resistor series with input lead (R2) forms lowpass anti-aliasing filter with 0.01 input bypass capacitor (C2) with bandwidth. resistor performs another important function well; dampens ringing which might present circuit formed shunt, input bypass capacitor, inductance wires traces connecting two. Undamped ringing input circuit near input sampling frequency alias into baseband producing what might appear noise output device.
FLOATING POSITIVE SUPPLY GATE DRIVE CIRCUIT
MOTOR SENSE
INC2a 0.01 0.01 GND1 MCLK MDAT GND2
HCPL-7860/ HCPL-786J
Figure Schematic Three Conductor Shunt Connection.
Voltage Sensing
HCPL-7860/HCPL-786J Isolated Modulator also used isolate signals with amplitudes larger than recommended input range with resistive voltage divider input. only restrictions that impedance divider relatively small (less than that input resistance (280 input bias current affect accuracy measurement. input bypass capacitor still required, although series damping resistor (the resistance voltage divider provides same function). lowpass filter formed divider resistance input bypass capacitor limit achievable bandwidth. obtain higher bandwidth, input bypass capacitor (C2) reduced, should reduced much below 1000 maintain adequate input bypassing isolated modulator.
product information complete list distributors, please site: www.avagotech.com Avago, Avago Technologies, logo trademarks Avago Technologies, Limited United States other countries. Data subject change. Copyright 2006 Avago Technologies Limited. rights reserved. Obsoletes 5989-2166EN AV02-0409EN June 2007

HCPL-7860 HCPL-786J

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