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Estimating Power ADSP-BF533 Blackfin® Processors
February 2004
Introduction
This EE-Note discusses methodology estimating total average power consumption ADSP-BF533 Blackfin® family processors (including ADSP-BF531 ADSP-BF532 derivatives). following documentation will detail interpret power measurements published processor data sheet extrapolate data individual sets operating conditions based measured data specific operating conditions. "worstcase" scenario also made available example board designers consider when designing their power supplies.
allows power removed from core and, optionally, removed from I/O. allow Real-Time Clock event restore power core after exiting Hibernate mode, Real-Time Clock must remain powered separate supply, such battery. third power domain (VDDRTC) satisfies this need. Since power defined product supply voltage current drawn, power domains described equations:
PDDINT VDDINT IDDINT PDDEXT VDDEXT IDDEXT PDDRTC VDDRTC IDDRTC
Average Power Consumption
Total average power consumption (PDDTOT) average power dissipated each three power domains Blackfin application: internal supply (VDDINT), external supply (VDDEXT), and, optionally, Real-Time Clock supply (VDDRTC). There different supply voltages because core does operate same voltage I/O. core operates within range 0.8-1.32V with nominal rating 1.2V (VDDINT). circuitry supports range 2.25-3.6V with nominal rating 2.5V 3.3V (VDDEXT), depending system. RealTime Clock powered supply but, user wanted absolutely maximize power savings, could case that both VDDINT VDDEXT powered off. Hibernate power mode ADSP-BF533 processor
purposes this document, current power values treated average values voltages assumed constant. total average power dissipated processor three components:
PDDTOT PDDINT PDDEXT PDDRTC
following sections describe estimate each three components.
Average Internal Power Consumption
There things consider when estimating average internal power dissipation processor. first consideration fact that internal power composed components, static dynamic. static component, name implies, independent transistor switching frequency.
Copyright 2004, Analog Devices, Inc. rights reserved. Analog Devices assumes responsibility customer product design application customers' products infringements patents rights others which result from Analog Devices assistance. trademarks logos property their respective holders. Information furnished Analog Devices applications development tools engineers believed accurate reliable, however responsibility assumed Analog Devices regarding technical accuracy topicality content provided Analog Devices' Engineer-to-Engineer Notes.
reflection "leakage" current, which phenomenon that causes transistors dissipate power even when they switching. Leakage factor high-performance CMOS circuit design function both supply voltage ambient operating temperature which part expected run. Leakage current increases temperature and/or voltage increases. dynamic power component largely independent temperature function supply voltage switching frequency. faster transistors switch, more voltage swings occur. higher supply voltage, larger voltage swing between transistor states. Thus, dynamic component will increase with voltage and/or frequency. second major consideration estimating average internal power type application code expected processor. Specifications data sheet were obtained while processor Dual-MAC Dual-ALU algorithm, which fetching slowly changing data from data memory. peripherals were disabled, core memory were running. help board designer "size" voltage regulators, power numbers under full stress conditions provided this document. These conditions include core running algorithm consisting 100% Dual-MACs more strenuous data-switching characteristics. This discussed more detail "Estimating Average Static Power" section this document. Finally, actual power numbers fluctuate within defined range based processor fabrication process transistor geometries required such high speeds. This largely semiconductor doping process (i.e., implantation), which does result uniform connectivity among transistors, yielding slight variations given wafer silicon. Other physical phenomena related fabrication process also contribute this nonuniformity. These physical differences cause some conduct faster than others, which results three process-related groupings. Figure shows process curve, which graphical representation this categorization based upon transistor threshold voltage (VT) saturation current (IDDSAT).
Figure Process Curve (IDDSAT
process contains three "corners": fast, typical, slow. "fast corner" part results when threshold voltage minimized saturation current highest. Conversely, "slow corner" part high threshold voltage saturation current. Although "fast corner" parts allow higher operating frequencies, tradeoff higher leakage current higher dissipated power general.
Estimating Average Static Power
static component average internal power result leakage current that occurs even when transistors changing state. When clocks (core system) voltage applied core memory, Blackfin processors "Deep Sleep" mode. data sheet shows IDDDEEPSLEEP measurement indicate static current component that contributes internal static power consumption (PDDINT_ST):
PDDINT_ST VDDINT IDDDEEPSLEEP
Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
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Table shows "Internal Power Dissipation" table from ADSP-BF531/BF532/BF533 Blackfin Embedded Processor Data Sheet [1]. This table contains average internal current draw measurements, which were taken from representative sample typical parts. terms static current component, IDDDEEPSLEEP, ambient temperature that yielded these numbers 25°C, denoted footnote table shows that drawn current increases when voltage rises from 0.8V 1.2V. Although direct correlation between voltage increases leakage made, table sufficiently details leakage that expected within acceptable voltage range 25°C "typical corner" parts. internal power dissipated when core running 100% Dual-MAC algorithm, which maximizes workload core typical application code.
Table Average IDDINT Faster Part (1.2V)
average internal power consumption data average measurement representative sample faster, higher leakage parts. Therefore, some parts from within this sample yielded power measurements that slightly exceed estimations presented this document "worstcase".
extrapolated comparison between Table Table leakage current increase magnitude factor four normal semiconductor processing variations. Note that current draw Table labeled IDDFAST differentiate between current draw from typical parts (IDDTYP) current draw obtained faster, higher leakage parts. Another important factor relative leakage current ambient temperature. Static power consumption increases exponentially with ambient temperature, detailed equation:
PDDINT_ST@T PDDINT_ST@T0 e(0.015
T0))
Table Internal Power Dissipation (Typical)
help size power supply, faster, higher leakage parts were measured. Table similar Table except that focuses parts that have higher leakage current, which very close worst-case average internal power dissipation scenario terms silicon type with peripherals enabled. ambient temperature still 25°C, maximum 85°C example addressed "Worst-Case Model" section this note. Additionally, these numbers reflect average
where PDDINT_ST@T0 power dissipated leakage current known temperature (T0) PDDINT_ST@T unknown number target temperature (T). Using Table static component 120mA, given 25°C, multiplied supply voltage (1.2V) obtain PDDINT_ST@T0 value 144mW. Since goal
Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
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estimate worst-case scenario terms temperature, target temperature 85°C. Given these known values, estimate PDDINT_ST@T calculated:
PDDINT_ST@85°C 144mW
(0.015 25))
"doubling" estimate linear, error increases once assumption made. summary, these methods applied acceptable ambient temperature range once baseline "Deep Sleep" mode current measurement obtained from part question operating voltage choice. Also, please recall that these measurements estimations averages across representative sample parts.
Estimating Average Dynamic Power
144mW 2.4596 354.183mW
compare values detailed Table extract current component:
IDDDEEPSLEEP@85°C PDDINT_ST@85°C VDDINT 354.183mW 1.2V 295mA
actual average measurement faster parts under these conditions yielded:
IDDDEEPSLEEP@85°C 302mA
shown, exponential estimate within measured value. those care exponents, observed that leakage current roughly doubles every 50°C increase ambient temperature. other words:
IDDDEEPSLEEP@75°C IDDDEEPSLEEP@25°C 120mA 240mA
dynamic component average internal power function operating frequency supplied voltage. Remember that values Table from faster, higherleakage parts represent maximum current drawn 1.2V 25°C fully-loaded core. process extrapolating measurements virtue frequency voltage scaling will discussed. Table shows IDDFAST measurements three frequencies with VDDINT 1.2V. Using measurements table, calculate ratio current draw increase frequency increase. example, 400MHz measurement IDDFAST 278mA 500MHz measurement 312mA. ratio 34mA 100MHz, which seen between 600MHz well. Once this ratio known, expected current draw calculated frequency:
IDDINT@F IDDINT@F0 Ratio]
Since temperature increase from 25°C 85°C greater than 50°C, baseline doubling leakage current changes from known value 25°C estimated value 75°C. same "doubles over 50°C" theory applied again, knowing that increase 10°C instead 50°C, which 50°C used doubling estimation. Therefore, estimated leakage 85°C roughly increase over estimated leakage 75°C:
IDDDEEPSLEEP@85°C IDDDEEPSLEEP@75°C 240mA 288mA
where target frequency, known frequency, Ratio change current draw change frequency. Given this model, estimate total current drawn 600MHz:
IDDFAST600 IDDFAST400 [(600 400) (34/100)] 346mA
This method, while accurate exponential estimate, still within error fairly accurate mathematical model.
Comparing this estimated value with measured value 600MHz (347mA),
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Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
estimate within actual data. this model, Ratio applied only dynamic current adjustment total measured current draw different frequency. Since static current component independent frequency already included IDDFAST400 measurement, impacted this adjustment. second extrapolation from data Table known "frequency scaling". common question regarding frequency scaling "Why current draw 600MHz equal times value obtained 400MHz?". basis this question understandable because ratio from 400MHz 600MHz 1.5. However, answer based fundamental understanding that static power component affected change frequency. Table measured value IDDFAST contains both static dynamic components:
IDDFAST IDDDEEPSLEEP IDDFAST_DYN IDDFAST600 IDDDEEPSLEEP IDD_DYN600 357mA
This estimate falls within error measured data 347mA. Aside from frequency factor, dynamic component also affected changes supply voltage. Another extrapolation method called "voltage scaling" applied estimate power when VDDINT changing. Table depicts same data Table only supply voltage been increased nominal VDDINT 1.32V. other parameters same (i.e., application 100% Dual-MACs, ambient temperature 25°C):
where IDDDEEPSLEEP leakage, which remains constant across frequency domain, IDDFAST_DYN dynamic component, which affected changes frequency. Since intent apply dynamic power ratio current draw measurement, static component must removed prior performing this operation:
IDDFAST_DYN400 IDDFAST400 IDDDEEPSLEEP 158mA
Table Average IDDINT Faster Part (1.32V)
Note that nomenclature current draw changed IDDHIGH indicate that these numbers were obtained under same conditions IDDFAST, except they result highest allowed VDDINT. Using Tables obtain measurements taken 400MHz typical current draw value:
IDDFAST400 278mA IDDHIGH400 328mA
Because frequency being increased factor 50%, dynamic ratio applied:
IDD_DYN600 IDD_DYN400 237mA
Again, these numbers combination static dynamic components, static component must removed first:
IDDFAST400_DYN 158mA IDDHIGH400_DYN 178mA
this point, static component added back yielding total estimated current drawn:
ratio dynamic power consumption from applied voltage another directly
Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
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proportional square voltage ratio itself,
PDDHIGH_DYN PDDFAST_DYN (1.32V/1.20V)2 (1.2V 158mA) (1.21) 229.416mW
Second, known values substituted into equation:
PDDDYN@V PDDDYN@V0 (V/V0)2 (F/F0) PDDHIGH_DYN PDDFAST_DYN (1.32/1.2)2 (600/400) (1.2V 158mA) 1.815 344.124mW
current component easily extracted dividing this value supply voltage:
IDDHIGH_DYN PDDHIGH_DYN 1.32V 229.416mW 1.32V 173.8mA
current component easily extracted dividing this value supply voltage:
IDDHIGH_DYN PDDHIGH_DYN 1.32V 344.124mW 1.32V 260.7mA
static component 1.32V added:
IDDHIGH IDDHIGH_DYN IDDHIGH_DEEPSLEEP 173.8 323.8mA
static component 1.32V added:
IDDHIGH IDDHIGH_DYN IDDHIGH_DEEPSLEEP 260.7 410.7mA
estimated value within actual value 328mA. total current draw then used calculate average internal power consumption:
PDDHIGH IDDHIGH VDDINT 323.8mA 1.32V 427.4mW
estimated value within 0.5% actual measured value 409mA. value then used calculate average internal power consumption:
PDDHIGH IDDHIGH VDDINT 410.7mA 1.32V
These extrapolation methods taken further applying both frequency voltage scales with equation. Since frequency ratio linear, factored equation used voltage scaling:
PDDDYN@V PDDDYN@V0 (V/V0)2 (F/F0)
step into
542.1mW
summary, there many methods available estimate internal power consumption based values presented data sheet values obtained under nominal conditions when considering worst-case operating conditions.
Average External Power Consumption
where reference voltage, target voltage, reference frequency, target frequency. example, current values Table F0=400MHz V0=1.2V known wish obtain estimated measurements F=600MHz V=1.32V. Again, first step remove static component:
IDDFAST400_DYN 158mA
Average external power dissipation average power dissipated VDDEXT power domain. number components that contribute overall external power value number enabled peripherals given system. Each unique group peripheral pins contributes piece overall external power based upon several parameters:
Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
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Number output pins Number pins toggling each clock cycle (TR) Frequency which peripheral runs Utilization factor percentage time that peripheral Load capacitance Voltage swing (VDDEXT)
equation used derive each component's contribution total external power
PDDEXT (VDDEXT)2 (O*TR)
worst external power scenario when load capacitor continuously charges discharges, requiring toggle continuously. Since state change only once cycle, maximum toggling frequency f/2. terms supply power, worst-case VDDEXT value 3.65V. Table contains data realistic example application, which runs several peripherals simultaneously. Actual results vary, again, intent help designers size power supplies.
Peripheral SPORT0 SPORT1 UART SDRAM
Freq (Hz) 2.70E+07 4.00E+06 4.00E+06 1.15E+05 1.33E+08
pins
C/pin 3.00E-11 3.00E-11 3.00E-11 3.00E-11 3.00E-11
Toggle Ratio 0.25
Util 1.00 1.00 1.00 0.25 0.50
Vddext 3.65 3.65 3.65 3.65 3.65
Pout 3.65V (mW) 48.56 1.60 1.60 0.01 119.60 171.37
Total External Power Dissipation 3.65V (est Table Sample Calculation Total Average External Power
above example, total average external power consumption estimated ~170mW. This number obtained with parameters listed Table applying PDDEXT equation given above. Notice that recommended load capacitance 30pF when VDDEXT 3.65V used this calculation. chosen operating frequencies reasonable each peripherals, including maximum allowed SDRAM frequency 133MHz. This model assumes that each output changes state every clock cycle, which worst-case model, except case SDRAM (because number output pins transitioning each clock cycle will less than maximum number output pins). Table taken from External Power Spreadsheet [2], which associated with this EE-Note. contains calculations four sample systems. reader tailor this spreadsheet
their application, adding deleting rows necessary. Since equation provides results Watts (W), additional scale factor 1000 spreadsheet converts results into This second equation more theoretically accurate version used spreadsheet:
VDDext
-Output Pins
Rather than estimating average external power dissipated each peripheral, estimate applies each individual output pin, based pin's load capacitance average toggling frequency. voltage swing uniform across output pins within VDDEXT supply domain, multiplied summation dynamic charge changes each output.
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Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
Using data Table nine output pins change every cycle average frequency 27MHz. Since toggling between on-to-off off-to-on requires cycles, FAVG half clock (13.5MHz). Since each changes same rate capacitance presumably, same, summation simply nine times value pin:
PEXT_AVG VDDEXT2 pins (FAVG (3.65)2 13.5e6 30e-12 13.3225 0.003645 0.048561W 48.561mW
modes. Having battery supply VDDRTC domain allows removal VDDINT VDDEXT supplies, thus significantly reducing total average power consumption.
Worst-Case Model
help size voltage regulators, let's consider worst-case conditions under which ADSPBF533 processor might operate (maximum supply voltage, maximum ambient temperature, maximum operating frequency). further stress part, full load 100% Dual-MAC operations would performed core part under scrutiny would faster, higher leakage type. Table shows current drawn with parameters maximized except ambient temperature. Table contains same measurements taken maximum ambient temperature, 85°C.
seen, value derived using this equation same value estimated Table This model obtains same estimate per-pin basis rather than per-peripheral basis. Finally, board designer must also mindful power supply efficiency when sizing VDDEXT supply. Refer Switching Regulator Design Considerations ADSP-BF533 Blackfin Processors (EE-228) more details regarding Internal Voltage Regulator.
Real-Time Clock (RTC) Power Consumption
final source total power consumption comes from optional third power domain, Real-Time Clock power domain (VDDRTC), which specified value. powered between 2.25V 3.6V. worst-case analysis, supply voltage 3.65V yields current draw 30-50µA range ambient temperature from 25°C 85°C. sake including this number final "Worst-Case Model", power consumption
PDDRTCMAX VDDRTCMAX IDDRTCMAX 3.65V 50µA 182.5µW
Table Maximum IDDINT (Extreme Conditions)
Knowing this value also helps selecting battery potential power source RTC. used take ADSP-BF533 processor low-power operating
current draw represented IDDMAX differentiate between current measurements under these extreme conditions versus those obtained previous data sets. These numbers include peripheral activity, estimated that internal power dissipation will increase maximum with these additional parameters. Characterization tests being conducted identify what sort power draw increase might expected internal power domain when peripherals enabled, stipulations exist that deem these increases negligible. First, application being generate these IDDMAX numbers realistic because keeps
Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
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full load core 100% time, which indicative real application. Second, peripheral hardware activity will cause stalls code being executed "fully-loaded" core, which will save power core dissipation when small increases dissipation being introduced elsewhere onchip. Given these facts, measurements Table should considered worst-case scenario. From this data, extreme worst case total power dissipation estimated, assuming conditions Table met, PDDMAX component. external power component, PDDEXT, example used "Average External Power Consumption" section this document Real-Time Clock component implies maximum VDDRTC 3.65V ambient temperature 85°C. static power component then used with exponential temperature model from "Estimating Average Static Power" section estimate leakage 70°C:
PDDMAX_ST@70°C PDDMAX_ST@85°C e(0.015
T0))
(362mA 1.32V) e(-0.225) 477.84mW 0.7985 381.563mW
current component easily extracted dividing this value supply voltage:
IDDDEEPSLEEP@70°C PDDMAX_ST@70°C VDDINT 381.563mW 1.32V 289.063mA
that both static dynamic current components known, total current draw calculated used estimate total average power:
PDDMAX600 (IDDDEEPSLEEP@70°C IDDMAX_DYN600) VDDINT (289.063 261)mA 1.32V 550.063mA 1.32V 726.083mW
ADSP-BF533 available speed grades, 500MHz 600MHz. Although 500MHz part 85°C, 600MHz part specified 70°C. Therefore, "worst-case" conditions vary between two.
total power dissipation, PDDTOT, estimated 600MHz part:
PDDTOT600 PDDMAX600 PDDEXT PDDRTC 726.1mW 171.4mW 182.5µW (726.1 171.4 0.2)mW
Using data Table given these assumptions, total power dissipation, PDDTOT, estimated 500MHz part:
PDDTOT500 PDDMAX500 PDDEXT PDDRTC (579mA*1.32V) 171.37mW 182.5µW (764.28 171.37 0.1825)mW ~936mW
~898mW
600MHz part, measured current drawn 85°C includes leakage component 362mA. Since dynamic power component remains same across temperature domain, separated out:
IDDMAX_DYN600 IDDMAX600 IDDDEEPSLEEP 261mA
These numbers certainly typical power consumption numbers. Rather, they occur critical parameters maximized, application code fully stresses core, part faster, higher-leakage variety. These numbers being supplied specifying maximum power requirements particular system's voltage regulator.
Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
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Conclusions
Several variables affect power requirements embedded system. Measurements published ADSP-BF533 data sheet indicative typical parts running under typical conditions. However, these numbers necessarily reflect actual numbers that occur given processor under non-typical conditions. fabrication process plays large role total estimated power calculations that feasible ADSP-BF533. addition type silicon that customer could have, ambient temperature, core system frequencies, supply voltages, capacitances, power modes used, application code, peripheral utilization contribute average total power that dissipated. Even with estimates discussed this document, result estimated average power consumption number given time. Assuming that system several possible states, calculating true average power dissipation, user would required statistical analysis determine what percentage time processor spends each defined states, apply those percentages estimated power consumption calculated that state, then each state averages. example:
STATE1 application STATE2 application STATE3 application
example, statistical analysis yields numbers above percentage time spent particular system state, total average power (PTOT) summarized follows:
PTOT (0.2*PSTATE1) (0.1*PSTATE2)+ (0.7*PSTATE3)
average power number that results from this equation shows much Blackfin processor loading power source over time. this calculation size power supply! power supply must support peak requirements. Average power estimates useful terms expected power dissipation within system, designs must support worst conditions under which application run.
References
Blackfin Embedded Processor Preliminary Data Sheet. Rev. PrC, January 2004. Analog Devices, External Power Spreadsheet. Associated file with Estimating Power ADSP-BF533 Blackfin Processors (EE-229) February 2004. Analog Devices, Inc. Switching Regulator Design Considerations ADSP-BF533 Blackfin Processors (EE-228). Available March 2004. Analog Devices, Inc.
Document History
Revision February 2004 Description Initial Release
Estimating Power ADSP-BF533 Blackfin® Processors (EE-229)
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