DS1065
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DS1065 - DS1065
DS1065 EconOscillator/Divider
output frequencies User-programmable on-chip dividers (from 1513) User-programmable on-chip prescaler external components ±0.5% initial tolerance variation over temperature voltage Single supply
ASSIGNMENT
Dallas DS1065
FREQUENCY OPTIONS
Part DS1065-100 DS1065-80 DS1065-66 DS1065-60 freq. 100.000 80.000 66.667 60.000
BOTTOM VIEW
DESCRIPTION TO-92
Input/Output Power Supply Ground
DESCRIPTION
DS1065 fixed frequency oscillator requiring external components operation. Numerous operating frequencies possible range approximately through on-chip programmable prescaler divider. DS1065 features master oscillator followed prescaler then programmable divider. prescaler programmable divider user-programmable with desired values being stored nonvolatile memory. This allows user shelf component program site prior board production. Design changes accommodated easily simply programming different values into device reprogramming previously programmed devices). DS1065 shipped from factory configured half maximum operating frequency. Contact factory specially programmed devices. DS1065 features dual-purpose Input/Output pin. device powered Program mode this used input serial data on-chip registers. After write command this data stored nonvolatile memory. When chip subsequently powered operating mode these values automatically restored on-chip registers Input/Output becomes oscillator output. DS1065 available TO-92 LEAD) package, allowing generation clock signal easily, economically using minimal board area. 011200
DS1065
BLOCK DIAGRAM Figure
PART SUFFIX -100 INTOSC FREQUENCY 100.000 80.000 66.667 60.000
DS1065
DESCRIPTIONS
Input/Output (IN/OUT): This main oscillator output, with frequency determined clock reference, dividers. Except programming mode this always output will referred "OUT". programming mode this will referred "IN".
USER-PROGRAMMABLE REGISTERS
following registers programmed user determine device operating frequency mode operation. Details these registers programmed found later section; this section function registers described. register settings nonvolatile, values being stored automatically EEPROM when registers programmed. NOTE: register bits cannot used make frequency changes fly. Changes only made powering device "Programming" mode. them become effective device must then powered down powered again "Operation" mode. programming purposes register bits divided into 9-bit words; "MUX" word determines mode prescaler values "DIV" word sets value programmable divider.
WORD Figure
(MSB)
MSEL
(LSB) DIV1 *These bits must indicated values
DIV1
This allows master clock routed directly output (DIV1=1). programmable divider bypassed programmed value ignored. frequency output (fOUT) will INTCLK EXTCLK depending which reference been selected. Internal clock selected prescaler also bypassed (the values MSEL ignored), this case fOUT INTOSC (which also equals MCLK INTCLK). DIV1=0 prescaler programmable divider function normally.
MSEL
This determines whether prescaler bypassed. MSEL will bypass prescaler. MSEL will switch prescaler (unless overridden DIV1=1), with divide-by number determined bit.
This sets divide-by number prescaler. results divide-by-4, results divideby-2. setting this irrelevant either DIV1=1 MSEL
Table
DIV1
MSEL
OPERATION INTERNAL OSCILLATOR DIVIDED INTERNAL OSCILLATOR DIVIDED INTERNAL OSCILLATOR DIVIDED
DS1065
(MSB)
INTERNAL OSCILLATOR DIVIDED (LSB) (9-BITS)
WORD Figure
These bits determine value programmable divider. range divisor values from 513, equal programmed value plus
Table
VALUES 000000000 000000001 111111111 DIVISOR VALUE
POWER-ON RESET
When power initially applied device supply pin, power-on reset sequence executed, similar that which occurs when device restored from power-down condition. This sequence comprises stages, first conventional initialize on-chip circuitry, followed stabilization period allow oscillator reach stable frequency before enabling output: Initialize internal circuitry. Enable internal oscillator. maximum values. Wait approximately 1024 cycles INTOSC oscillator stabilize. Load programmed values from EEPROM. Enable OUT.
Figure
DS1065
PROGRAMMING
Normally when power applied supply voltage device will enter normal operating mode, following power-on reset sequence. However device made enter programming mode pullup resistor connected between IN/OUT supply voltage prior power-up. method used programming variant 1-Wireprotocol used number Dallas Semiconductor products.
HARDWARE
hardware configuration shown diagram. master used read write data DS1065's internal registers. master have either open-drain TTL-type architecture.
Figure
Programming mode entered simply powering DS1065 with pullup approximately 5kW. This will pull IN/OUT above power-up initiate programming mode, causing DS1065 internally release IN/OUT after STAB allow pullup resistor pull supply rail await Master Reset pulse (see diagram). NOTE: ensure normal operation external pullup applied IN/OUT must greater than value. This will cause IN/OUT remain below power-up, resulting normal operation tSTAB.
DS1065
Figure
TRANSACTION SEQUENCE
sequence accessing DS1065 1-Wire port follows: Initialization Function Command Transaction/Data
INITIALIZATION
transactions 1-Wire begin with initialization sequence. initialization sequence consists reset pulse transmitted master followed presence pulse(s) transmitted DS1065. presence pulse lets master know that DS1065 present ready operate.
Figure
FUNCTION COMMANDS
Once master detected presence, issue four function commands. Function Commands bits long, written first. list these commands follows: Write Register [01H] This command allows master write DS1065's register. Read Register [A1H] This command allows master read DS1065's register.
DS1065
Write Register [02H] This command allows master write DS1065's register. Read Register [A2H] This command allows master read DS1065's register.
TRANSACTION/DATA
Immediately following Function Command, data bits written read from DS1065. This data written/read first. following diagrams illustrate timing. Once data transfer complete transaction sequence started re-initializing device. Therefore program both registers complete transaction sequences required.
READ/WRITE TIME SLOTS
definitions write read time slots illustrated below. time slots initiated master driving data line low. falling edge data line synchronizes DS1065 master triggering delay circuit DS1065. During write time slots, delay circuit determines when DS1065 will sample data line. read data time slot, transmitted, delay circuit determines long DS1065 will hold data line overriding generated master. data DS1065 will leave read data time slot unchanged.
WRITE TIME SLOT Figure
tSLOT tLOW1 tREC
WRITE TIME SLOT Figure
tLOW0 tSLOT tREC
DS1065
READ DATA TIME SLOT Figure
tSLOT tLOWR tRELEASE tREC tRDV
RETURN NORMAL OPERATION
When programming complete, DS1065 should powered down. pullup resistor IN/OUT removed, normal device operation will restored next time power applied.
DEFAULT REGISTER VALUES
Unless ordered from factory with specific register program values, DS1065 shipped with following default register values: 0000 0000 (Programmable divider will divide two) 0011 0100 (Ignored, MSEL MSEL prescaler bypassed) DIV1 Dividers enabled)
DS1065
ABSOLUTE MAXIMUM RATINGS*
Voltage Relative Ground Operating Temperature Storage Temperature Soldering Temperature -1.0V +7.0V 70°C -55°C +125°C 260°C seconds
This stress rating only functional operation device these other conditions above those indicated operation sections this specification implied. Exposure absolute maximum rating conditions extended periods time affect reliability.
ELECTRICAL CHARACTERISTICS
PARAMETER Supply Voltage High-level Output Voltage (IN/OUT) Low-level Output Voltage (IN/OUT) High-level Input Voltage (IN/OUT) Low-level Input Voltage(IN/OUT) High-level Input Current Low-level Input Current Supply Current (Active) DS1065-100 DS1065-80 DS1065-66 DS1065-60 SYMBOL =2.4V, 5.25V =0,VCC =5.25V CONDITION
70°C;
4.75 5.25 UNITS NOTES
DS1065
ELECTRICAL CHARACTERISTICS
PARAMETER Output Frequency Tolerance Combined Frequency Variation Power-Up Time Load Capacitance (IN/OUT) Output Duty Cycle IN/OUT OUT0 Jitter SYMBOL tpor tstab CONDITION =25°C Over temp voltage
70°C;
-0.5 +0.5 UNITS NOTES
NOTES:
This time from when applied until output starts oscillating. Operation with higher capacitance loads result reduced output voltage maximum operating frequency. Parameter given typical max.
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