DS07-12612-3E

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DS07-12612-3E
8-bit Proprietary Microcontrollers
F2MC-8FX MB95130M Series
DESCRIPTION
MB95130M series general-purpose, single-chip microcontrollers. addition compact instruction set, microcontrollers contain variety peripheral functions. Note F2MC abbreviation FUJITSU Flexible Microcontroller.
FEATURES
F2MC-8FX core Instruction optimized controllers Multiplication division instructions 16-bit arithmetic operations test branch instruction manipulation instructions etc. Clock Main clock Main clock clock (for dual clock product) clock (for dual clock product) (Continued)
sure refer "Check Sheet" latest cautions development.
"Check Sheet" seen following support page "Check Sheet" lists minimal requirement items checked prevent problems beforehand system development.
Copyright©2006 FUJITSU LIMITED rights reserved
MB95130M Series
(Continued) Timer 8/16-bit compound timer 8/16-bit 16-bit Timebase timer Watch prescaler (for dual clock product) LIN-UART Full duplex double buffer Clock asynchronous (UART) clock synchronous (SIO) serial data transfer capable UART/SIO Full duplex double buffer Clock asynchronous (UART) clock synchronous (SIO) serial data transfer capable External interrupt Interrupt edge detection (rising, falling, both edges selected) used recover from low-power consumption (standby) modes. 8/10-bit converter 8-bit 10-bit resolution selected. Low-power consumption (standby) mode Stop mode Sleep mode Watch mode (for dual clock product) Timebase timer mode port number maximum ports Single clock product ports Dual clock product ports Configuration General-purpose ports (COMS) Single clock product ports Dual clock product ports Programmable input voltage levels port Automotive input level CMOS input level hysteresis input level Flash memory security function Protects content Flash memory (Flash memory device only)
MB95130M Series
MEMORY LINEUP
Flash memory MB95F133MS/F133NS/F133JS MB95F133MW/F133NW/F133JW MB95F134MS/F134NS/F134JS MB95F134MW/F134NW/F134JW MB95F136MS/F136NS/F136JS MB95F136MW/F136NW/F136JW Kbytes Kbytes Kbytes bytes bytes Kbyte
MB95130M Series
PRODUCT LINEUP
Part number MB95F133MS MB95F133NS MB95F133MW MB95F133NW MB95F133JS MB95F133JW MB95136M MB95F134MS MB95F134NS MB95F134MW MB95F134NW MB95F134JS MB95F134JW MB95F136MS MB95F136NS MB95F136MW MB95F136NW MB95F136JS MB95F136JW Parameter
Type capacity*1 capacity*1 Reset output Clock system Option*2 voltage detection reset Clock supervisor
MASK product
Flash memory product Kbytes (Max) Kbyte (Max) Dual clock Single clock Dual clock
Selectable Single/Dual clock*3 Yes/No
Single clock
Number basic instructions Instruction length bits Instruction length bytes functions Data length bits Minimum instruction execution time 61.5 machine clock frequency 16.25 MHz) Interrupt processing time machine clock frequency 16.25 MHz) Single clock product ports Dual clock product ports purpose Programmable input voltage levels port port Automotive input level CMOS input level hysteresis input level Timebase Interrupt cycle 32.8 main oscillation clock MHz) timer Reset generated cycle Watchdog main oscillation clock timer oscillation clock 32.768 (for dual clock product) Wild register Capable replacing bytes data Data transfer capable UART/SIO Full duplex double buffer, Variable data length (5/6/7/8-bit), built-in baud rate generator UART/SIO type transfer format, error detected function LSB-first MSB-first selected. Clock asynchronous (UART) clock synchronous (SIO) serial data transfer capable Dedicated reload timer allowing wide range communication speeds set. Full duplex double buffer. LIN-UART Clock asynchronous (UART) clock synchronous (SIO) serial data transfer capable functions available master slave. 8/10-bit 8-bit 10-bit resolution selected. converter channels) Peripheral functions (Continued)
MB95130M Series
(Continued)
Part number MB95F133MS MB95F133NS MB95F133MW MB95F133NW MB95F133JS MB95F133JW MB95136M MB95F134MS MB95F134NS MB95F134MW MB95F134NW MB95F134JS MB95F134JW MB95F136MS MB95F136NS MB95F136MW MB95F136NW MB95F136JS MB95F136JW Parameter
Each channel timer used "8-bit timer channels" "16-bit timer channel". Built-in timer function, function, function, capture function square wave-form output Count clock: internal clocks external clock selected. mode one-shot mode selected. 16-bit Counter operating clock: Eight selectable clock sources Support external trigger start Each channel used "8-bit channels" "16-bit channel". 8/16-bit Counter operating clock: Eight selectable clock sources Watch counter Count clock Four selectable clock sources (125 (for dual Counter value from (Capable counting minute when selecting clock clock source second setting counter value product) Watch prescaler (for dual Four selectable interval times (125 clock product) External Interrupt edge detection (rising, falling, both edges selected.) interrupt used recover from standby modes. channels) Supports automatic programming, Embedded Algorithm*4 commands flag indicating completion algorithm Number write/erase cycles (Minimum) 10000 times Flash memory Data retention time years Erase performed each block Block protection with external programming voltage Flash Security Feature protecting content Flash Standby mode Sleep, stop, watch (for dual clock product), timebase timer capacity capacity, refer Memory space" CORE". details option, refer MASK OPTION". Specify clock mode when ordering MASK ROM. Embedded Algorithm trade mark Advanced Micro Devices Inc. Note Part number evaluation product MB95130M series MB95FV100D-103. When using board (MB2146-303A) required. Peripheral functions
8/16-bit compound timer
MB95130M Series
OSCILLATION STABILIZATION WAIT TIME
initial value main clock oscillation stabilization wait time fixed maximum value. maximum value shown below. Oscillation stabilization wait time /FCH
Remarks Approx. 4.10 main oscillation clock MHz)
PACKAGES CORRESPONDING PRODUCTS
Part number MB95136M Package FPT-28P-M17 BGA-224P-M08 Available Unavailable MB95F133MS/F133NS MB95F134MS/F134NS MB95F136MS/F136NS MB95F133JS MB95F134JS MB95F136JS MB95F133MW/F133NW MB95F134MW/F134NW MB95F136MW/F136NW MB95F133JW MB95F134JW MB95F136JW
MB95130M Series
DIFFERENCES AMONG PRODUCTS NOTES SELECTING PRODUCTS
Notes using evaluation products Evaluation product only functions MB95130M series also those other products support software development multiple series models F2MC-8FX. addresses peripheral resources used MB95130M series therefore access-barred. Read/write access those accessbarred addresses cause peripheral resources supposed unused operate, resulting unexpected malfunctions hardware software. Particularly, word access odd-numbered-byte address prohibited areas such access used, address read written unexpectedly) Also, read values prohibited addresses evaluation product different values flash memory mask products, these values program. Evaluation product does support functions some bits single-byte registers. Read/write access these bits does cause hardware malfunctions. Evaluation, Flash memory, MASK products designed behave completely same terms hardware software. Difference memory spaces amount memory Evaluation product different from that Flash memory MASK product, carefully check difference amount memory from model actually used when developing software. details memory space, refer CORE". Current consumption current consumption Flash memory product greater than MASK product. details current consumption, refer ELECTRICAL CHARACTERISTICS". Package details information each package, refer PACKAGES CORRESPONDING PRODUCTS" PACKAGE DIMENSION". Operating voltage operating voltage different among Evaluation, Flash memory, MASK products. details operating voltage, refer ELECTRICAL CHARACTERISTICS".
MB95130M Series
ASSIGNMENT
(TOP VIEW)
PG2/X1A* PG1/X0A* AVCC AVSS
P14/PPG0 P13/TRG0/ADTG P12/UCK0/EC0 P11/UO0 P10/UI0 P07/INT07/AN07 P06/INT06/AN06/TO01 P05/INT05/AN05/TO00 P04/INT04/AN04/SIN P03/INT03/AN03/SOT P02/INT02/AN02/SCK P01/INT01/AN01/PPG01 P00/INT00/AN00/PPG00
(FPT-28P-M17) Single clock product general-purpose port, dual clock product clock oscillation pin.
MB95130M Series
DESCRIPTION
name PG2/X1A PG1/X0A AVCC AVSS P00/INT00/ AN00/PPG00 P01/INT01/ AN01/PPG01 P02/INT02/ AN02/SCK P03/INT03/ AN03/SOT P04/INT04/ AN04/SIN P05/INT05/ AN05/TO00 P06/INT06/ AN06/TO01 P07/INT07/ AN07 circuit type* General-purpose port General-purpose port large current Operating mode designation Main clock oscillation input Main clock oscillation input/output Power supply (GND) Power supply Capacity connection Single clock product general-purpose port (PG2) Dual clock product clock input/output oscillation kHz) Single clock product general-purpose port (PG1) Dual clock product clock input oscillation kHz) Reset converter power supply converter power supply (GND) General-purpose port Shared with external interrupt input (INT00), converter analog input (AN00) 8/16-bit ch.0 output (PPG00). General-purpose port Shared with external interrupt input (INT01), converter analog input (AN01) 8/16-bit ch.0 output (PPG01). General-purpose port Shared with external interrupt input (INT02), converter analog input (AN02) LIN-UART clock (SCK). General-purpose port Shared with external interrupt input (INT03), converter analog input (AN03) LIN-UART data output (SOT). General-purpose port Shared with external interrupt input (INT04), converter analog input (AN04) LIN-UART data input (SIN). General-purpose port Shared with external interrupt input (INT05 INT06), converter analog input (AN05 AN06) 8/16-bit compound timer ch.0 output (TO00 TO01). General-purpose port Shared with external interrupt input (INT07) converter analog input (AN07). (Continued) Function
MB95130M Series
(Continued) name P10/UIO P11/UO0 P12/UCK0/ P13/TRG0/ ADTG P14/PPG0 circuit type* Function General-purpose port Shared with UART/SIO ch.0 data input (UI0) General-purpose port Shared with UART/SIO ch.0 data output (UO0) General-purpose port Shared with UART/SIO ch.0 clock (UCK0) 8/16-bit compound timer ch.0 clock input (EC0) General-purpose port Shared with 16-bit ch.0 trigger input (TRG0) converter trigger input (ADTG) General-purpose port Shared with 16-bit ch.0 output (PPG0) General-purpose port
circuit type, refer CIRCUIT TYPE".
MB95130M Series
CIRCUIT TYPE
Type Circuit Remarks Oscillation circuit High-speed side Feedback resistance: approx. Low-speed side Feedback resistance: approx.
(X1A)
(X0A)
N-ch
Clock input
Standby control Only input Hysteresis input only MASK product Pull-down resistor available only MASK product Hysteresis input only MASK product Reset output
Mode input
Reset input
N-ch
Reset output
P-ch P-ch
Pull-up control Digital output Digital output Analog input Automotive input
CMOS output Hysteresis input Analog input Pull-up control available Automotive input
N-ch
control Standby control External interrupt control
Hysteresis input
P-ch P-ch
Pull-up control Digital output Digital output CMOS input Hysteresis input
N-ch
CMOS output CMOS input Hysteresis input Analog input Pull-up control available Automotive input
control Standby control External interrupt control
Automotive input
(Continued)
MB95130M Series
(Continued) Type
Circuit
Remarks CMOS output CMOS input Hysteresis input Pull-up control available Automotive input
P-ch P-ch
Pull-up control Digital output Digital output
N-ch
CMOS input Hysteresis input Standby control Automotive input CMOS output Hysteresis input Pull-up control available Automotive input
P-ch P-ch
Pull-up control Digital output Digital output
N-ch
Hysteresis input Standby control
P-ch
Automotive input CMOS output Hysteresis input Automotive input
Digital output Digital output Hysteresis input
N-ch
Standby control
Automotive input
MB95130M Series
HANDLING DEVICES
Preventing latch-up Care must taken ensure that maximum voltage ratings exceeded when devices used. Latch-up occur CMOS voltage higher than lower than applied input output pins other than medium- high-withstand voltage pins voltage higher than rating voltage applied between pin. When latch-up occurs, power supply current increases rapidly might thermally damage elements. Also, take care prevent analog power supply voltage (AVCC, AVR) analog input voltage from exceeding digital power supply voltage (VCC) when analog system power supply turned off. Stable supply voltage Supply voltage should stabilized. sudden change power supply voltage cause malfunction even within guaranteed operating range power supply voltage. stabilization, principle, keep variation ripple (p-p value) commercial frequency range exceed standard value suppress voltage variation that transient variation rate does exceed V/ms during momentary change such when power supply switched. Precautions external clock Even when external clock used, oscillation stabilization wait time required power-on reset, wake-up from clock mode stop mode.
CONNECTION
Treatment unused pins Leaving unused input pins unconnected cause abnormal operation latch-up, leading permanent damage. Unused input pins should always pulled down through resistance least unused input/output pins output mode left open, input mode treated same unused input pins. there unused output pin, make open. Treatment power supply pins converter Connect AVCC AVSS even converter use. Noise riding AVCC cause accuracy degradation. connect approx. ceramic capacitor bypass capacitor between AVCC AVSS pins vicinity this device. Power Supply Pins products with multiple pins, pins same potential internally connected device avoid abnormal operations including latch-up. However, pins must connected external power supply ground line lower electro-magnetic emission level, prevent abnormal operation strobe signals caused rise ground level, conform total output current rating. Moreover, connect current supply source with pins this device impedance. also advisable connect ceramic bypass capacitor approximately between pins near this device. Mode (MOD) Connect mode directly pins. prevent device unintentionally entering test mode noise, printed circuit board minimize distance from mode pins pins provide low-impedance connection.
MB95130M Series
ceramic capacitor capacitor with equivalent frequency characteristics. bypass capacitor must have capacitance value higher than connection smoothing capacitor refer diagram below. Connection Diagram
Analog power supply Always same potential AVCC VCC. When AVCC, current flow through AN00 AN07 pins.
MB95130M Series
PROGRAMMING FLASH MEMORY MICROCONTROLLERS USING PARALLEL PROGRAMMER
Supported parallel programmers adapters following table lists supported parallel programmers adapters. Package Applicable adapter model FPT-28P-M17 TEF110-95F136HSPF Parallel programmers
AF9708(Ver 02.35G greater) AF9709/B(Ver 02.35G greater)
Note information about applicable adapter models parallel programmers, contact following: Flash Support Group, Inc. TEL: +81-53-428-8380 Sector configuration following table shows sector-specific addresses data access parallel programmer. Kbytes) Flash memory Kbytes FFFFH 1FFFFH Programmer addresses corresponding addresses, used when parallel programmer programs data into Flash memory. These programmer addresses used parallel programmer program erase data Flash memory. Programming method type code parallel programmer "17237". Load program data programmer addresses 78000H 7FFFFH. Write data with parallel programmer. address 8000H Programmer address* 18000H
Kbytes) Flash memory Kbytes FFFFH 1FFFFH Programmer addresses corresponding addresses, used when parallel programmer programs data into Flash memory. These programmer addresses used parallel programmer program erase data Flash memory. Programming method type code parallel programmer "17237". Load program data programmer addresses 7C000H 7FFFFH. Write data with parallel programmer. address C000H Programmer address* 1C000H
MB95130M Series
Kbytes) Flash memory Kbytes FFFFH 1FFFFH Programmer addresses corresponding addresses, used when parallel programmer programs data into Flash memory. These programmer addresses used parallel programmer program erase data Flash memory. Programming method type code parallel programmer "17237". Load program data programmer addresses 7E000H 7FFFFH. Write data with parallel programmer. address E000H Programmer address* 1E000H
MB95130M Series
BLOCK DIAGRAM
F2MC-8FX X0,X1 PG2/(X1A)* PG1/(X0A)*
Reset control Clock control Watch counter Watch prescaler Internal
Interrupt control Wild register 8/16-bit
(P00/PPG00) (P01/PPG01) (P02/SCK) LIN-UART (P03/SOT) (P04/SIN)
P00/INT00 P07/INT07 P10/U10 P11/UO0 P12/UCK0 P13/TRG0/ADTG P14/PPG0 P15, P00/AN00 P07/AN07 AVCC AVSS
External interrupt
UART/SIO
16-bit 8/16-bit compound timer 8/10-bit converter Port Port
(P05/TO00) (P06/TO01) (P12/EC0) PF0,
Other pins
MOD, VCC, VSS,
Single clock product general-purpose port, dual clock product clock oscillation pin.
MB95130M Series
CORE
Memory Space
Memory space MB95130M series Kbytes consists area, data area, program area. memory space includes special-purpose areas such general-purpose registers vector table. Memory MB95130M series shown below. Memory
MB95136M 0000H 0080H 0100H 0200H 0480H 0F80H Extended 1000H Kbyte
Register
MB95F133MS/F133NS/F133JS MB95F134MS/F134NS/F134JS MB95F136MS/F136NS/F136JS MB95F133MW/F133NW/F133JW MB95F134MW/F134NW/F134JW MB95F136MW/F136NW/F136JW 0000H 0080H 0000H
MB95FV100D-103 0080H
3.75 Kbytes
0100H Register 0200H Address
0100H Register 0200H
Access prohibited
Access prohibited
0F80H Extended Extended 1000H
0F80H 1000H
Access prohibited
8000H MASK Kbytes FFFFH FFFFH Address
Access prohibited
Flash memory Kbytes Flash memory FFFFH
Flash memory MB95F133MS/F133NS/F133JS MB95F133MW/F133NW/F133JW MB95F134MS/F134NS/F134JS MB95F134MW/F134NW/F134JW MB95F136MS/F136NS/F136JS MB95F136MW/F136NW/F136JW Kbytes Kbytes Kbytes
bytes bytes Kbyte
Address 0180H 0280H 0480H
Address E000H C000H 8000H
MB95130M Series
Register
MB95130M series types registers; dedicated registers general-purpose registers memory. dedicated registers include: Program counter (PC) Accumulator Temporary accumulator Index register (IX) Extra pointer (EP) Stack pointer (SP) Program status (PS) 16-bit register indicate locations where instructions stored. 16-bit register temporary storage arithmetic operations. case 8-bit data processing instruction, lower 1-byte used. 16-bit register which performs arithmetic operations with accumulator. case 8-bit data processing instruction, lower 1-byte used. 16-bit register index modification 16-bit pointer point memory address. 16-bit register indicate stack area. 16-bit register storing register bank pointer, direct bank pointer, condition code register
bits
Initial Value Program counter Accumulator Temporary accumulator Index register Extra pointer Stack pointer Program status FFFDH 0000H 0000H 0000H 0000H 0000H 0030H
further divided into higher bits register bank pointer (RP) direct bank pointer (DP) lower bits condition code register (CCR). (Refer diagram below.) Structure program status
bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
MB95130M Series
indicates address register bank currently being used. relationship between content real address conforms conversion rule illustrated below: Rule Conversion Actual Addresses General-purpose Register Area upper
code lower
Generated address
specifies area mapping instructions different types instructions such dir) using direct addresses 0080H 00FFH. Direct bank pointer (DP2 DP0) Specified address area Mapping area XXXB effect mapping) 000B (initial value) 001B 010B 011B 100B 101B 110B 111B 0080H 00FFH 0000H 007FH 0000H 007FH (without mapping) 0080H 00FFH (without mapping) 0100H 017FH 0180H 01FFH 0200H 027FH 0280H 02FFH 0300H 037FH 0380H 03FFH 0400H 047FH
consists bits indicating arithmetic operation results transfer data content bits that control operations interrupt. when carry borrow from occurs result arithmetic operation. Cleared otherwise. This flag decimal adjustment instructions. flag Interrupt enabled when this flag "1". Interrupt disabled when this flag "0". flag cleared when reset. IL1, Indicates level interrupt currently enabled. Processes interrupt only request level higher than value indicated these bits. flag flag flag flag Interrupt level interruption Priority High flag
result arithmetic operation. Cleared when
"0".
when arithmetic operation results "0". Cleared otherwise. complement overflows result arithmetic operation. Cleared
otherwise. when carry borrow from occurs result arithmetic operation. Cleared otherwise. shift-out value case shift instruction.
MB95130M Series
following general-purpose registers provided: General-purpose registers: 8-bit data storage registers general-purpose registers bits located register banks memory. 1-bank contains 8registers. total banks used MB95130M series. bank currently specified register bank pointer (RP), lower bits code indicates general-purpose register (R0) general-purpose register (R7). Register Bank Configuration
8-bit 1F8H This address 0100H (RP) Address 100H 107H Bank 1FFH Bank
banks banks (RAM area) number banks limited usable capacitance.
Memory area
MB95130M Series
Address 0000H 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H 0009H 000AH 000BH 000CH 000DH 0027H 0028H 0029H 002AH 002BH 002CH 002DH 002EH 0034H 0035H 0036H 0037H 0038H, 0039H 003AH 003BH 003CH 0041H 0042H 0043H Register abbreviation PDR0 DDR0 PDR1 DDR1 WATR PLLC SYCC STBC RSRR TBTC WPCR WDTC PDRF DDRF PDRG DDRG PUL0 PUL1 PULG T01CR1 T00CR1 PC01 PC00 PCNTH0 PCNTL0 Register name Port data register Port direction register Port data register Port direction register (Disabled) Oscillation stabilization wait time setting register control register System clock control register Standby control register Reset source register Timebase timer control register Watch prescaler control register Watchdog timer control register (Disabled) Port data register Port direction register Port data register Port direction register Port pull-up register Port pull-up register (Disabled) Port pull-up register 8/16-bit compound timer control status register ch.0 8/16-bit compound timer control status register ch.0 (Disabled) 8/16-bit PPG1 control register ch.0 8/16-bit PPG0 control register ch.0 (Disabled) 16-bit control status register (Upper byte) ch.0 16-bit control status register (Lower byte) ch.0 Initial value 00000000B 00000000B 00000000B 00000000B 11111111B 00000000B 1010X011B 00000000B XXXXXXXXB 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B (Continued)
MB95130M Series
Address 0044H 0047H 0048H 0049H 004AH 004BH 004CH 004FH 0050H 0051H 0052H 0053H 0054H 0055H 0056H 0057H 0058H 0059H 005AH 005BH 006BH 006CH 006DH 006EH 006FH 0070H 0071H 0072H 0073H 0074H 0075H 0076H 0077H
Register abbreviation EIC00 EIC10 EIC20 EIC30 RDR/TDR ESCR ECCR SMC10 SMC20 SSR0 TDR0 RDR0 ADC1 ADC2 ADDH ADDL WCSR SWRE0 SWRE1 WREN WROR
Register name
Initial value 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00001000B 00000000B 00000100B 000000XXB 00000000B 00100000B 00000001B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 000X0000B 00000000B 00000000B 00000000B 00000000B (Continued)
(Disabled) External interrupt circuit control register ch.0/ch.1 External interrupt circuit control register ch.2/ch.3 External interrupt circuit control register ch.4/ch.5 External interrupt circuit control register ch.6/ch.7 (Disabled) LIN-UART serial control register LIN-UART serial mode register LIN-UART serial status register LIN-UART reception/transmission data register LIN-UART extended status control register LIN-UART extended communication control register UART/SIO serial mode control register ch.0 UART/SIO serial mode control register ch.0 UART/SIO serial status register ch.0 UART/SIO serial output data register ch.0 UART/SIO serial input data register ch.0 (Disabled) 8/10-bit converter control register 8/10-bit converter control register 8/10-bit converter data register (Upper byte) 8/10-bit converter data register (Lower byte) Watch counter status register (Disabled) Flash memory status register Flash memory sector writing control register Flash memory sector writing control register (Disabled) Wild register address compare enable register Wild register data test setting register
MB95130M Series
Address 0078H 0079H 007AH 007BH 007CH 007DH 007EH 007FH 0F80H 0F81H 0F82H 0F83H 0F84H 0F85H 0F86H 0F87H 0F88H 0F89H 0F91H 0F92H 0F93H 0F94H 0F95H 0F96H 0F97H 0F9BH 0F9CH 0F9DH 0F9EH 0F9FH 0FA0H 0FA3H
Register abbreviation ILR0 ILR1 ILR2 ILR3 ILR4 ILR5 WRARH0 WRARL0 WRDR0 WRARH1 WRARL1 WRDR1 WRARH2 WRARL2 WRDR2 T01CR0 T00CR0 T01DR T00DR TMCR0 PPS01 PPS00 PDS01 PDS00
Register name (Register bank pointer (RP) Mirror direct bank pointer (DP) Interrupt level setting register Interrupt level setting register Interrupt level setting register Interrupt level setting register Interrupt level setting register Interrupt level setting register (Disabled) Wild register address setting register (Upper byte) ch.0 Wild register address setting register (Lower byte) ch.0 Wild register data setting register ch.0 Wild register address setting register (Upper byte) ch.1 Wild register address setting register (Lower byte) ch.1 Wild register data setting register ch.1 Wild register address setting register (Upper byte) ch.2 Wild register address setting register (Lower byte) ch.2 Wild register data setting register ch.2 (Disabled) 8/16-bit compound timer control status register ch.0 8/16-bit compound timer control status register ch.0 8/16-bit compound timer data register ch.0 8/16-bit compound timer data register ch.0 8/16-bit compound timer 00/01 timer mode control register ch.0 (Disabled) 8/16-bit PPG1 cycle setting buffer register ch.0 8/16-bit PPG0 cycle setting buffer register ch.0 8/16-bit PPG1 duty setting buffer register ch.0 8/16-bit PPG0 duty setting buffer register ch.0 (Disabled)
Initial value 11111111B 11111111B 11111111B 11111111B 11111111B 11111111B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 11111111B 11111111B 11111111B 11111111B (Continued)
MB95130M Series
(Continued) Address 0FA4H 0FA5H 0FA6H 0FA9H 0FAAH 0FABH 0FACH 0FADH 0FAEH 0FAFH 0FB0H 0FBBH 0FBCH 0FBDH 0FBEH 0FBFH 0FC0H 0FC2H 0FC3H 0FC4H 0FE2H 0FE3H 0FE4H 0FE6H 0FE7H 0FE8H, 0FE9H 0FEAH 0FEBH 0FEDH 0FEEH 0FEFH 0FF0H 0FFFH Register abbreviation PPGS REVC PDCRH0 PDCRL0 PCSRH0 PCSRL0 PDUTH0 PDUTL0 BGR1 BGR0 PSSR0 BRSR0 AIDRL WCDR ILSR2 CSVCR ILSR WICR Register name 8/16-bit start register 8/16-bit output inversion register (Disabled) 16-bit down counter register (Upper byte) ch.0 16-bit down counter register (Lower byte) ch.0 16-bit cycle setting buffer register (Upper byte) ch.0 16-bit cycle setting buffer register (Lower byte) ch.0 16-bit duty setting buffer register (Upper byte) ch.0 16-bit duty setting buffer register (Lower byte) ch.0 (Disabled) LIN-UART baud rate generator register LIN-UART baud rate generator register UART/SIO dedicated baud rate generator prescaler selection register ch.0 UART/SIO dedicated baud rate generator baud rate setting register ch.0 (Disabled) input disable register (Lower byte) (Disabled) Watch counter data register (Disabled) Input level select register (option) (Disabled) Clock supervisor control register (Disabled) Input level select register Interrupt control register (Disabled) Initial value 00000000B 00000000B 00000000B 00000000B 11111111B 11111111B 11111111B 11111111B 00000000B 00000000B 00000000B 00000000B 00000000B 00111111B 00000000B 00111100B 00000000B 01000000B
MB95130M Series
access symbols Readable Writable Read only Write only Initial value symbols initial value this "0". initial value this "1". initial value this undefined. Note write (Disabled) Reading (Disabled) returns undefined value.
MB95130M Series
INTERRUPT SOURCE TABLE
Interrupt source Interrupt request number IRQ0 Vector table address Upper Lower Same level name priority order interrupt level simultaneous setting register occurrence) High FFFAH FFFBH
External interrupt ch.0 External interrupt ch.4 External interrupt ch.1 External interrupt ch.5 External interrupt ch.2 External interrupt ch.6 External interrupt ch.3 External interrupt ch.7 UART/SIO ch.0 8/16-bit compound timer ch.0 (Lower) 8/16-bit compound timer ch.0 (Higher) LIN-UART (reception) LIN-UART (transmission) (Unused) (Unused) (Unused) 8/16-bit ch.0 (Upper) 8/16-bit ch.0 (Lower) (Unused) 16-bit ch.0 (Unused) (Unused) 8/10-bit converter Timebase timer Watch prescaler/Watch counter (Unused) (Unused) Flash memory
IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ13 IRQ14 IRQ15 IRQ16 IRQ17 IRQ18 IRQ19 IRQ20 IRQ21 IRQ22 IRQ23
FFF8H FFF6H FFF4H FFF2H FFF0H FFEEH FFECH FFEAH FFE8H FFE6H FFE4H FFE2H FFE0H FFDEH FFDCH FFDAH FFD8H FFD6H FFD4H FFD2H FFD0H FFCEH FFCCH
FFF9H FFF7H FFF5H FFF3H FFF1H FFEFH FFEDH FFEBH FFE9H FFE7H FFE5H FFE3H FFE1H FFDFH FFDDH FFDBH FFD9H FFD7H FFD5H FFD3H FFD1H FFCFH FFCDH
MB95130M Series
ELECTRICAL CHARACTERISTICS
Absolute Maximum ratings
Parameter Power supply voltage*1 Input voltage*1 Output voltage*
Symbol AVCC ICLAMP |ICLAMP| IOL1 IOL2
Rating
Unit
Remarks
Maximum clamp current Total maximum clamp current level maximum output current
Applicable pins*4 Applicable pins*4 Other than PF0, PF0, Other than PF0, Average output current operating current operating ratio pin) PF0, Average output current operating current operating ratio pin)
IOLAV1 level average current IOLAV2
level total maximum output current level total average output current level maximum output current
IOLAV IOH1 IOH2
Total average output current operating current operating ratio (Total pins) Other than PF0, PF0, Other than PF0, Average output current operating current operating ratio pin) PF0, Average output current operating current operating ratio pin)
IOHAV1 level average current IOHAV2
level total maximum output current level total average output current Power consumption Operating temperature Storage temperature
IOHAV Tstg
Total average output current operating current operating ratio (Total number pins)
MB95130M Series
parameter based AVSS Apply equal potential AVCC VCC. should exceed AVCC should exceed must exceed rating voltage. However, maximum current to/from input limited some means with external components, ICLAMP rating supersedes rating. Applicable pins: P15, PF0, (Inapplicable pins: PG1, PG2) within recommended operating conditions. voltage (current). signal input signal that exceeds voltage. signal should always applied limiting resistance placed between signal microcontroller. value limiting resistance should that when signal applied input current microcontroller does exceed rated values, either instantaneously prolonged periods. Note that when microcontroller drive current low, such power saving modes, input potential pass through protective diode increase potential pin, this affects other devices. Note that signal inputted when microcontroller power supply (not fixed power supply provided from pins, that incomplete operation result. Note that input applied during power-on, power supply provided from pins resulting power supply voltage sufficient operate power-on reset. Care must taken leave input open. Note that analog system input/output pins other than input pins (LCD drive pins, etc.) cannot accept signal input. Sample recommended circuits Input/Output Equivalent circuits Protective diode Limiting resistance
P-ch N-ch
input
WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
MB95130M Series
Recommended Operating Conditions
(AVSS Parameter Power supply voltage Smoothing capacitor Operating temperature Symbol VCC, AVCC name Condition Value 2.42*2 5.5*1 Unit Remarks normal operation Holds condition stop mode
value varies depending operating frequency. value 2.88 when low-voltage detection reset used. ceramic capacitor capacitor with equivalent frequency characteristics. bypass capacitor must have capacitance value higher than connection smoothing capacitor refer diagram below.
connection diagram
WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their FUJITSU representatives beforehand.
MB95130M Series
Characteristics
(VCC AVCC 10%, AVSS Parameter Symbol name (selectable SIN), (selectable UI0) P07, P16, PF0, PF1, PG1, P07, P16, PF0, PF1, PG1, Condition Value Unit Remarks
VIHI
Hysteresis input
VIHSI level input voltage
Hysteresis input
VIHA
input selecting Automotive input level CMOS input (Flash memory product) Hysteresis input (MASK product) Hysteresis input
VIHM RST, (selectable SIN), (selectable UI0) P07, P16, PF0, PF1, PG1, P07, P16, PF0, PF1, PG1,
VILS level input voltage
Hysteresis input
VILA
input selecting Automotive input level CMOS input (Flash memory product) Hysteresis input (MASK product)
VILM RST, level output voltage level output voltage VOH1 VOH2 VOL1 VOL2
Output other than PF0, PF0, Output other than PF7, RST*1 PF0,
(Continued)
MB95130M Series
(VCC AVCC 10%, AVSS Parameter Symbol Input leakage current (Hi-Z output leakage current) Pull-up resistor Pull-down resistor Input capacity name Condition Value Unit Remarks
P07, P16, PF0, PF1, PG1,
When pull-up prohibition setting When pull-up permission setting MASK product only
RPULL
P07, P16, PG1, Other than AVCC, AVss,
RMOD
Flash memory product other than Flash memory writing erasing) Flash memory product Flash memory writing erasing) MASK product
Main clock mode (divided
12.5
Power supply current*2
(External clock operation)
Main clock mode (divided
15.2
20.0
Flash memory product other than Flash memory writing erasing) Flash memory product Flash memory writing erasing) MASK product (Continued)
35.7
42.5
11.6
15.2
MB95130M Series
(VCC AVCC 10%, AVSS Value Condition Unit Remarks Main Sleep mode (divided Main Sleep mode (divided FMPL clock mode (divided FMPL sleep mode (divided Watch mode Main stop mode Main mode (multiplied 2.5) Main mode (multiplied 2.5) FMPL mode (multiplied
Parameter Symbol
name
ICCS
12.0
ICCL
Dual clock product only
ICCLS Power supply current*2 ICCT (External clock operation)
Dual clock product only
Dual clock product only
14.9 11.2
12.5 20.0 15.2
Flash memory product MASK product Flash memory product MASK product
ICCMPLL
ICCSPLL
Dual clock product only
(Continued)
MB95130M Series
(Continued) Parameter Symbol name (VCC AVCC 10%, AVSS Value Condition Unit Remarks Timebase timer mode stop mode When conversion operation AVcc When conversion stopped
ICTS
(External clock operation)
0.15
ICCH Power supply current*2
20.0
Main stop mode single clock product
Product without clock supervisor only power supply current specified external clock. When low-voltage detection clock supervisor options selected, consumption current values both low-voltage detection circuit (ILVD) built-in oscillator (ICSV) must also added power supply current value. Refer Characteristics: Clock Timing" FCL. Refer Characteristics: Source Clock/Machine Clock" FMPL.
MB95130M Series
Characteristics
Clock Timing (VCC 2.42 AVSS Parameter SymCondiPin name tion Value 1.00 1.00 Clock frequency 3.00 3.00 3.00 X0A, tHCYL Clock cycle time tLCYL tWH1 tWL1 tWH2 tWL2 X0A, 61.5 30.8 61.5 32.768 30.5 15.2 1000 1000 32.768 16.25 32.50 10.00 8.13 6.50 Unit Remarks When using main oscillation circuit
When using external clock Main multiplied Main multiplied Main multiplied When using oscillation circuit When using When using main oscillation circuit When using external clock When using oscillation circuit When using external clock duty ratio about 70%. When using external clock
Input clock pulse width
Input clock rise/fall time
MB95130M Series
tHCYL tWH1 tWL1
Figure Main Clock Input Port External Connection When using crystal ceramic oscillator
Microcontroller
When using external clock
Microcontroller
Open
tLCYL tWH2 tWL2
Figure clock Input Port External Connection When using crystal ceramic oscillator
Microcontroller
When using external clock
Microcontroller
Open
MB95130M Series
Source Clock/Machine Clock (VCC 10%, AVSS Parameter Symbol name Value 61.5 tSCLK FSPL 0.50 16.384 61.5 tMCLK FMPL 0.031 1.024 976.5 16.250 131.072 61.0 16.25 131.072 32000 2000 Unit Remarks When using main clock 16.25 MHz, multiplied MHz, divided When using clock kHz, multiplied kHz, divided
Source clock cycle time*1 (Clock before setting division) Source clock frequency Machine clock cycle time*2 (Minimum instruction execution time) Machine clock frequency
When using main clock When using clock When using main clock 16.25 MHz, division MHz, divided When using clock FSPL kHz, division FSPL kHz, divided
When using main clock When using clock
Clock before setting division machine clock division ratio selection (SYCC DIV1 DIV0) This source clock divided machine clock division ratio selection (SYCC DIV1 DIV0) becomes machine clock. Further, source clock selected follows. Main clock divided multiplication main clock (select from multiplication) clock divided multiplication clock (select from multiplication) Operation clock microcontroller. Machine clock selected follows. Source clock division) Source clock divided Source clock divided Source clock divided Outline clock generation block
(main oscillation) Divided
Main SCLK (source clock) (sub oscillation) Divided Clock mode select (SYCC: SCS1, SCS0) Division circuit 1/16 MCLK (machine clock)
MB95130M Series
Operating voltage Operating frequency (When PLL, clock mode watch mode operation guarantee range
Main clock mode main mode operation guarantee range Operating voltage
Operating voltage
2.42
2.42
16.384
131.072
16.25
operation guarantee range
operation guarantee range Main clock operation guarantee range
Source clock frequency (FSPL)
Source clock frequency (FSP)
Operating voltage Operating frequency (When MB95FV100D-103 PLL, clock mode watch mode operation guarantee range
Main clock mode main mode operation guarantee range Operating voltage
Operating voltage
16.384
131.072
16.25
operation guarantee range
operation guarantee range Main clock operation guarantee range
Source clock frequency (FSPL)
Source clock frequency (FSP)
MB95130M Series
Main operation frequency
Source clock frequency (FSP)
7.5MHz
Main clock frequency (FMP)
MB95130M Series
External Reset (VCC 10%, AVSS Parameter Symbol Value tMCLK*1 level pulse width tRSTL Oscillation time oscillator*2 Refer Source Clock/Machine Clock" tMCLK. Oscillation start time oscillator time that amplitude reaches crystal oscillator, oscillation time between several tens ceramic oscillators, oscillation time between hundreds several external clock, oscillation time Unit Remarks normal operation stop mode, clock mode, sleep mode watch mode timebase timer mode
normal operation
tRSTL
stop mode, clock mode, sleep mode, watch mode, power-on
tRSTL
amplitude
Internal operating clock Oscillation time Oscillation stabilization wait time oscillator Execute instruction Internal reset
MB95130M Series
Power-on Reset (AVSS Parameter Power supply rising time Power supply cutoff time Symbol tOFF Condition Value Unit Waiting time until power-on Remarks
Note Complete power-on process within selected oscillation stabilization wait time.
tOFF
Note Sudden change power supply voltage activate power-on reset function. When changing power supply voltages during operation, slope rising within mV/ms shown below.
Limiting slope rising within mV/ms recommended. Hold Condition stop mode
MB95130M Series
Peripheral Input Timing (VCC 10%, AVSS Parameter Peripheral input pulse Peripheral input pulse Symbol
tILIH tIHIL
name INT00 INT07, EC0, TRG0/ADTG
Value tMCLK* tMCLK*
Unit
Remarks
Refer Source Clock/Machine Clock" tMCLK.
tILIH
tIHIL
INT00 INT07, EC0,TRG0/ADTG
MB95130M Series
UART/SIO Serial Timing (VCC 10%, AVSS Parameter Serial clock cycle time time Valid valid hold time Serial clock pulse width Serial clock pulse width time Valid valid hold time Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX name UCK0, UCK0, Internal clock operation output UCK0, TTL. UCK0, Condition Value tMCLK* tMCLK* tMCLK* tMCLK* tMCLK* tMCLK* tMCLK* +190 Unit Remarks
UCK0, UCK0, External clock UCK0, operation output TTL. UCK0, UCK0,
Refer Source Clock/Machine Clock" tMCLK.
Internal shift clock mode
tSCYC
UCK0
tSLOV
tIVSH tSHIX
External shift clock mode
tSLSH tSHSL tSLOV
UCK0
tIVSH tSHIX
MB95130M Series
LIN-UART Timing Sampling rising edge sampling clock*1 prohibited serial clock delay*2 (ESCR register SCES ECCR register SCDE (VCC 10%, AVSS Parameter Serial clock cycle time delay time Valid valid hold time Serial clock pulse width Serial clock pulse width delay time Valid valid hold time fall time rise time SymPin name tSCYC tSLOVI tIVSHI tSHIXI tSLSH tSHSL tIVSHE tSHIXE Internal clock SCK, operation output SCK, TTL. SCK, External clock SCK, operation output TTL. SCK, Condition Value tMCLK*3
MCLK
MCLK
Unit
tMCLK*3
MCLK
tSLOVE SCK,
tMCLK*3
Provide switch function whether sampling reception data performed rising edge falling edge serial clock. Serial clock delay function used delay half clock output signal serial clock. Refer Source Clock/Machine Clock" tMCLK.
MB95130M Series
Internal shift clock mode
tSCYC tSLOVI tIVSHI tSHIXI
External shift clock mode
tSLSH tSHSL tSLOVE tIVSHE tSHIXE
MB95130M Series
Sampling falling edge sampling clock*1 prohibited serial clock delay*2 (ESCR register SCES ECCR register SCDE (VCC 10%, AVSS Parameter Serial clock cycle time delay time Valid valid hold time Serial clock pulse width Serial clock pulse width delay time Valid valid hold time fall time rise time Symbol tSCYC tSHOVI tIVSLI tSLIXI tSHSL tSLSH tSHOVE tIVSLE tSLIXE name SCK, Internal clock operation output SCK, TTL. SCK, SCK, External clock SCK, operation output SCK, TTL. Condition Value tMCLK*3
MCLK
MCLK
Unit
tMCLK*3 tMCLK*3 tMCLK*3
Provide switch function whether sampling reception data performed rising edge falling edge serial clock. Serial clock delay function used delay half clock output signal serial clock. Refer Source Clock/Machine Clock" tMCLK.
MB95130M Series
Internal shift clock mode
tSCYC
tSHOVI tIVSLI tSLIXI
External shift clock mode
tSHSL tSLSH tSHOVE tIVSLE tSLIXE
MB95130M Series
Sampling rising edge sampling clock*1 enabled serial clock delay*2 (ESCR register SCES ECCR register SCDE (VCC 10%, AVSS Parameter Serial clock cycle time delay time Valid valid hold time delay time Symbol tSCYC tSHOVI tIVSLI tSLIXI tSOVLI name SCK, SCK, SCK, SCK, Internal clock operation output TTL. Condition Value tMCLK*3
MCLK
tMCLK*3
Unit
Provide switch function whether sampling reception data performed rising edge falling edge serial clock. Serial clock delay function used delay half clock output signal serial clock. Refer Source Clock/Machine Clock" tMCLK.
tSCYC
tSOVLI tIVSLI
tSHOVI
tSLIXI
MB95130M Series
Sampling falling edge sampling clock*1 enabled serial clock delay*2 (ESCR register SCES ECCR register SCDE (VCC 10%, AVSS Parameter Serial clock cycle time delay time Valid valid hold time delay time Symbol tSCYC tSLOVI tIVSHI tSHIXI tSOVHI name SCK, Internal clock SCK, operating output TTL. SCK, Condition Value tMCLK*3
MCLK
tMCLK*3
Unit
SCK,
Provide switch function whether sampling reception data performed rising edge falling edge serial clock. Serial clock delay function used delay half clock output signal serial clock. Refer Source Clock/Machine Clock" tMCLK.
tSCYC
tSOVHI
tSLOVI tIVSHI tSHIXI
MB95130M Series
voltage Detection (AVSS Parameter Release voltage Detection voltage Hysteresis width Power-supply start voltage Power-supply voltage Power-supply voltage change time power supply rise) Symbol VDL+ VDL- VHYS Voff Value 2.52 2.42 ILVD Consumption current voltage detection circuit only 3000 2.70 2.60 2.88 2.78 Unit Slope power supply that reset release signal generates Slope power supply that reset release signal generates within rating (VDL+) Slope power supply that reset detection signal generates Slope power supply that reset detection signal generates within rating (VDL-) Remarks power-supply rise power-supply fall
Power-supply voltage change time power supply fall) Reset release delay time Reset detection delay time Consumption current
MB95130M Series
Voff
Time
VDL+ VHYS VDL-
Internal reset signal Time
MB95130M Series
Clock Supervisor Clock (VCC AVCC 10%, AVSS Parameter Oscillation frequency Oscillation start time Current consumption Symbol fOUT ICSV Value Unit Current consumption built-in oscillator oscillation Remarks
MB95130M Series
Converter
Converter Electrical Characteristics (AVCC AVSS Parameter Resolution Total error Linearity error Differential linear error Zero transition voltage Full-scale transition voltage Compare time VFST Symbol Value Unit AVCC AVCC AVcc external impedance AVcc external impedance Remarks
AVSS AVSS AVSS AVCC AVCC AVCC 16500 16500
Sampling time
AVCC
Analog input current Analog input voltage
IAIN VAIN
AVSS
MB95130M Series
Notes Using Converter External impedance analog input sampling time converter with sample hold circuit. external impedance high keep sufficient sampling time, analog voltage charged internal sample hold capacitor insufficient, adversely affecting conversion precision. Therefore satisfy conversion precision standard, consider relationship between external impedance minimum sampling time either adjust register value operating frequency decrease external impedance that sampling time longer than minimum value. Also, sampling time cannot sufficient, connect capacitor about analog input pin. Analog input equivalent circuit
Analog input
Comparator
During sampling AVCC AVCC Note values reference values. (Max) (Max) (Max) (Max)
relationship between external impedance minimum sampling time (External impedance
(External impedance
External impedance
AVCC
External impedance
AVCC
AVCC
AVCC
Minimum sampling time [µs]
Minimum sampling time [µs]
Errors |AVCC AVSS| becomes smaller, values relative errors grow larger.
MB95130M Series
Definition Converter Terms Resolution level analog variation that distinguished converter. When number bits analog voltage divided into 1024. Linearity error (unit LSB) deviation between value along straight line connecting zero transition point ("00 0000 0000" 0000 0001") device full-scale transition point ("11 1111 1111" 1111 1110") compared with actual conversion values obtained. Differential linear error (Unit LSB) Deviation input voltage, which required changing output code LSB, from ideal value. Total error (unit: LSB) Difference between actual theoretical values, caused zero transition error, full-scale transition error, linearity error, quantum error, noise.
Ideal characteristics
VFST
Total error
3FFH 3FEH
3FFH 3FEH
Actual conversion characteristic LSB}
Digital output
Digital output
3FDH
3FDH
004H 003H 002H 001H AVSS AVCC
004H 003H 002H 001H AVSS AVCC Actual conversion characteristic Ideal characteristics
Analog input AVCC AVSS 1024
Analog input
Total error LSB} [LSB] digital output
converter digital output value Voltage which digital output transits from
(Continued)
MB95130M Series
(Continued) Zero transition error
004H
Actual conversion characteristics
3FFH
Full-scale transition error
Ideal characteristics Actual conversion characteristics
Digital output
003H
Ideal characteristics
Digital output
3FEH
002H
Actual conversion characteristics
VFST
(Actual value)
3FDH
001H
(Actual value)
3FCH
Actual conversion characteristics
AVSS
AVCC
AVSS
AVCC
Analog input
Analog input
Linearity error
3FFH 3FEH
Actual conversion characteristics
Differential linear error
Ideal characteristics
N+1H VOT}
VFST
(Actual value)
Digital output
Digital output
3FDH
Actual conversion characteristics
(N+1)T
004H 003H 002H 001H AVSS
Actual conversion characteristics Ideal characteristics
N-1H
Actual conversion characteristics
N-2H
(Actual value)
Analog input
AVCC
AVSS
Analog input
AVCC
Linear error VOT} digital output
Differential linear error digital output
converter digital output value Voltage which digital output transits from (Ideal value) AVSS VFST (Ideal value) AVCC
MB95130M Series
Flash Memory Program/Erase Characteristics
Parameter Chip erase time Byte programming time Erase/program cycle Power supply voltage erase/ program Flash memory data retention time Value 10000 20*3 1.0*1 15.0*2 3600 Unit cycle year Average Remarks Excludes programming prior erasure. Excludes system-level overhead.
10000 cycles 10000 cycles This value comes from technology qualification (using Arrhenius equation translate high temperature measurements into normalized value
MB95130M Series
MASK OPTION
MB95F133MS/ F133NS/F133JS MB95F134MS/ F134NS/F134JS MB95F136MS/ F136NS/F136JS Setting disabled MB95F133MW/ F133NW/F133JW MB95F134MW/ F134NW/F134JW MB95F136MW/ F136NW/F136JW Setting disabled
Part number Specifying procedure
MB95136M
MB95FV100D-103
Specify when ordering MASK selectable
Setting disabled
Clock mode select Single-system clock mode Dual-system clock mode
Single-system clock mode
Dual-system clock Changing mode switch board
voltage detection reset* With voltage detection Specify when reset ordering Without voltage MASK detection reset Clock supervisor* With clock supervisor Without clock supervisor Reset output* With reset output Without reset output Specify when ordering MASK
Specified part number
Specified part number
Change switch board
Specified part number
Specified part number
Change switch board
Specify when ordering MASK
Specified part number
board switch following Specified part With supervisor number Without reset output Without supervisor With reset output Fixed oscillation Fixed oscillation stabilization wait stabilization wait time time (214-2) /FCH (214-2) /FCH
Oscillation stabilization wait time
Fixed oscillation stabilization wait time (214-2) /FCH
Fixed oscillation stabilization wait time (214-2) /FCH
Refer table below about clock mode select, voltage detection reset, clock supervisor select reset output.
MB95130M Series
Low-voltage detection reset Single system MB95136M Dual system MB95F133MS MB95F133NS MB95F133JS MB95F134MS MB95F134NS MB95F134JS MB95F136MS MB95F136NS MB95F136JS MB95F133MW MB95F133NW MB95F133JW MB95F134MW MB95F134NW MB95F134JW MB95F136MW MB95F136NW MB95F136JW Single system MB95FV100D-103 Dual system Dual system Single system
Part number
Clock mode select
Clock supervisor
Reset output
MB95130M Series
ORDERING INFORMATION
Part number MB95136MPFV MB95F133MSPFV MB95F133NSPFV MB95F133JSPFV MB95F134MSPFV MB95F134NSPFV MB95F134JSPFV MB95F136MSPFV MB95F136NSPFV MB95F136JSPFV MB95F133MWPFV MB95F133NWPFV MB95F133JWPFV MB95F134MWPFV MB95F134NWPFV MB95F134JWPFV MB95F136MWPFV MB95F136NWPFV MB95F136JWPFV MB2146-303A (MB95FV100D-103PBT) Package
28-pin plastic (FPT-28P-M17)
board 224-pin plastic PFBGA (BGA-224P-M08)
MB95130M Series
PACKAGE DIMENSION
28-pin plastic Lead pitch Package width package length Lead shape Sealing method Mounting height Weight 1.27 17.75 Gullwing Plastic mold 2.80 0.82
(FPT-28P-M17)
Code (Reference)
28-pin plastic (FPT-28P-M17)
+0.25 +.010
Note These dimensions include resin protrusion. Note These dimensions include resin protrusion. Note Pins width pins thickness include plating thickness. Note Pins width include cutting remainder.
0.17 -0.04
+0.03 +.001
17.75 -0.20 .699 -.008
.007 -.002
11.80±0.30 (.465±.012) INDEX
8.60±0.20
(.339±.008) Details part 2.65±0.15 (Mounting height) (.104±.006) 0.25(.010)
0~8°
1.27(.050)
0.47±0.08 (.019±.003)
0.13(.005)
0.80±0.20 (.031±.008) 0.88±0.15 (.035±.006)
0.20±0.15 (.008±.006) (Stand off)
0.10(.004)
2002 FUJITSU LIMITED F28048S-c-3-4
Dimensions (inches). Note: values parentheses reference values.
Please confirm latest Package dimension following URL.
MB95130M Series
MAIN CHANGES THIS EDITION
Page Section Change Results Preliminary Data Sheet Data Sheet Added part numbers. (MB95F133JS/MB95F133JW MB95F134JS/MB95F134JW MB95F136JS/MB95F136JW) Added description "Clock supervisor" section "Option".
PRODUCT LINEUP
PROGRAMMING FLASH MEMORY MICROCONTROLLERS USING PARALLEL Inserted Programming Method". PROGRAMMER Added address 0FEAH. "Verified value section "Other than MB95FV100D-103", normal operating" "Power supply voltage"; 2.42.
Recommended Operating Conditions
Verified value 2.88 Moved level input voltage level input voltage section Characteristics". Added name "Pin name" section VIHA, level input voltage.
Characteristics
Added name "Pin name" section VILA, level input voltage. Deleted line "FCH MHz" section "ICTS" Power supply current. Changed table; 2.42 Changed value third column clock frequency; 16.25 10.00 Verified diagram Main operation frequency range. Changed release voltage: 2.55 2.52 (Min value) 2.85 2.88 (Max value) Changed detection voltage: 2.45 2.42 (Min value) 2.75 2.78 (Max value)
Characteristics Clock Timing
Characteristics Source Clock/Machine Clock
Voltage Detection
MB95130M Series
information microcontroller supports shown following homepage.
FUJITSU LIMITED
Rights Reserved. contents this document subject change without notice. Customers advised consult with FUJITSU sales representatives before ordering. information, such descriptions function application circuit examples, this document presented solely purpose reference show examples operations uses Fujitsu semiconductor device; Fujitsu does warrant proper operation device with respect based such information. When develop equipment incorporating device based such information, must assume responsibility arising such information. Fujitsu assumes liability damages whatsoever arising information. information this document, including descriptions function schematic diagrams, shall construed license exercise intellectual property right, such patent right copyright, other right Fujitsu third party does Fujitsu warrant non-infringement third-party's intellectual property right other right using such information. Fujitsu assumes liability infringement intellectual property rights other rights third parties which would result from information contained herein. products described this document designed, developed manufactured contemplated general use, including without limitation, ordinary industrial use, general office use, personal use, household use, designed, developed manufactured contemplated accompanying fatal risks dangers that, unless extremely high safety secured, could have serious effect public, could lead directly death, personal injury, severe physical damage other loss (i.e., nuclear reaction control nuclear facility, aircraft flight control, traffic control, mass transport control, medical life support system, missile launch control weapon system), requiring extremely high reliability (i.e., submersible repeater artificial satellite). Please note that Fujitsu will liable against and/or third party claims damages arising connection with above-mentioned uses products. semiconductor devices have inherent chance failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. products described this document represent goods technologies subject certain restrictions export under Foreign Exchange Foreign Trade Japan, prior authorization Japanese government will required export those products from Japan. company names brand names herein trademarks registered trademarks their respective owners. Edited Business Promotion Dept.
F0612

DS07-12612-3E

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