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DN505
Top Searches for this datasheetRSSI - RSSI DN505 - DN505 CC2500 PDF - CC2500 PDF cc2500 microcontroller interfacing - cc2500 microcontroller interfacing CC2500* - CC2500* CC1110 433 mhz - CC1110 433 mhz CC1101 RSSI read - CC1101 RSSI read CC1101 PDF - CC1101 PDF CC1101 a 433 mhz - CC1101 a 433 mhz CC1101 - CC1101 CC1100 PDF - CC1100 PDF DN505 - DN505 Design Note DN505 RSSI Interpretation Timing Siri Namtvedt CC1100 CC1101 CC1110 CC1111 CC2500 CC2510 CC2511 RSSI Introduction until demodulator detects sync word (when sync word detection enabled). that point RSSI readout value frozen until next time chip enters state. sync word detection disabled, RSSI register will continuously updated. Received Signal Strength Indicator measure power input transceiver. RSSI value based gain setting chain measured signal level channel. mode, RSSI value read continuously from RSSI status register SWRA114B Page Design Note DN505 Table Contents KEYWORDS INTRODUCTION ABBREVIATIONS RSSI REGISTER INTERPRETATION RSSI OFFSET.3 RSSI UPDATE RATE IMPROVING RSSI READOUT ACCURACY.8 RSSI THRESHOLD.8 REFERENCES.9 GENERAL INFORMATION DOCUMENT HISTORY.10 Abbreviations Automatic Gain Control Band Width Carrier Sense Received Signal Strength Indicator Wake Radio RSSI SWRA114B Page Design Note DN505 RSSI Register Interpretation RSSI value read from RSSI status register complement number with resolution. following procedure used convert RSSI reading absolute power level (RSSI_dBm). Assume that RSSI offset that 11111010b read from RSSI register. 11111010b interpret complement number value This means that RSSI value, before taking offset into account, dBm. Subtracting RSSI offset, RSSI value ends dBm. UINT8 rssi_dec; INT16 rssi_dBm; UINT8 rssi_offset rssi_dec halSpiReadStatus(CCxxx0_RSSI); (rssi_dec 128) rssi_dBm (INT16)((INT16)( rssi_dec 256) rssi_offset; else rssi_dBm (rssi_dec rssi_offset; RSSI Offset RSSI offset will vary with register settings, hence different data rates (using different settings) will have different RSSI offset. Table shows RSSI offset some data rates CC1100, CC1101, CC1110/CC1111, CC2500, CC2510/CC2511. Data Rate [kBaud] CC1100 CC1101 CC1110/ CC1111 CC2500 CC2510/ CC2511 RSSI Offset [dB] [MHz] [MHz] RSSI Offset [dB] [MHz] [MHz] RSSI Offset [dB] [MHz] [MHz] [MHz] RSSI Offset [dB] RSSI Offset [dB] 38.4 Table RSSI Offset When using data rates other than ones Table possible find RSSI offset applying known input power then read RSSI value. RSSI Update Rate RSSI update rate, fRSSI (Equation depends receiver filter bandwidth (BWchannel, Equation filter length (see AGCCTRL0 register data sheet ([1], [2], [3], [7], [8])). SWRA114B Page Design Note DN505 RSSI BWchannel FILTER LENGTH Equation RSSI Update Rate BWchannel xosc CHANBW 2CHANBW Equation Receiver Filter Bandwidth time takes from chip mode valid RSSI value present RSSI register estimated shown Equation (only valid weak signals; ~-70 lower): RSSI Response Time BWchannel WAIT_TIME FILTER LENGTH BWchannel DataRate Equation RSSI Response Time important notice that this equation only gives indication time required before valid RSSI value obtained (and only valid weak signals). Adding safety margin therefore necessary real life application. Example (CC2500): Data Rate kBaud AGCCTRL0 0x91 AGCCTRL0.WAIT_TIME MDMCFG4 0x78 AGCCTRL0.FILTER_LENGTH MDMCFG4.CHANBW_M MDMCFG4.CHANBW_E BWchannel xosc 232142.9 CHANBW 2CHANBW RSSI Response Time 232142.9 232142.9 10000 equation estimating RSSI response time example used when estimating time radio will when using direct termination based RSSI measurements (MCSM2.RX_TIME_RSSI Using this feature, mode will terminated RSSI level below programmable threshold. CC1100, following test where done: CC1100, operating 76.8 kBaud BWchannel kHz, mode with direct termination (This test cannot performed CC1110/CC1111 CC2510/CC2511 since these devises support WOR). different values AGCCTRL0.WAIT_TIME AGCCTRL0.FILTER_LENGTH, time spent (before terminating measured compared estimated RSSI response time. results seen Table SWRA114B Page Design Note DN505 FILTER_LENGTH WAIT_TIME Estimated RSSI Response Time [us] Measured time spent before termination [us] Table Estimated Measured RSSI Response Time (76.8 kBaud) stronger signals, will take longer time before read valid RSSI value since requires longer time gain. Assume application where wants radio minimum amount time before reading RSSI register. challenges that time taken before valid RSSI value read varies with signal strength, signal strength unknown. this case should measurements where known strong signal input receiver, RSSI register read continuously. should then measure time from radio enters state until valid RSSI value available. Figure Figure Figure shows different signals strengths (-50 dBm, dBm, dBm) different data rates (2.4 kBaud, kBaud, kBaud) time takes before valid value read from RSSI register. CC2500 used this test register settings were obtained from SmartRF® Studio. Pseudo code test firmware: Strobe Wait until radio mode Start reading RSSI register repeatedly store values buffer (for plots Figure Figure Figure RSSI register read times, with 5.96 between readings) From RSSI register values, calculate actual RSSI value plot RSSI values time SWRA114B Page Design Note DN505 RSSI Samples (5.96 Between Samples) RSSI Readout Value [dBm] kbps, kbps, kbps, -100 -110 -120 -130 -140 Figure RSSI Value Time (2.4 kBaud) 658.7 203125 203125 2400 RSSI Samples (5.96 Between Samples) RSSI Response Time RSSI Readout Value [dBm] kbps, kbps, kbps, -100 -110 -120 -130 -140 Figure RSSI Value Time kBaud) 245.6 232142.857 232142.857 10000 RSSI Response Time SWRA114B Page Design Note DN505 RSSI Samples (5.96 Between Samples) RSSI Readout Value [dBm] kbps, kbps, kbps, -100 -110 -120 -130 -140 Figure RSSI Value Time (250 kBaud) RSSI Response Time 103.4 541666.667 541666.667 250000 SWRA114B Page Design Note DN505 Improving RSSI Readout Accuracy important aware that real system, output power from transmitter variations transmission path will contributes RSSI inaccuracy. However, there certain steps improve RSSI readout accuracy Calculate average RSSI value based several readouts Follow workaround read synchronization issue (see [4], [5], [6]). This only necessary CC1100/CC1101/CC2500, SoCs. RSSI Threshold Table shows typical RSSI value threshold when data rate kBaud, AGCCTRL2.MAGN_TARGET AGCCTRL1.CARRIER_SENSE_ABS_THR AGCCTRL2.MAX_DVGA_GAIN[1:0] AGCCTRL2.MAX_LNA_GAIN[2:0] -94.5 -92.5 -87.5 -79.5 -76.5 -78.5 -73.5 -70.5 -78.5 -77.5 -67.5 Table Typical RSSI Value Threshold Assume MAX_LNA_GAIN MAX_DVGA_GAIN This means that when MAGN_TARGET CARRIER_SENSE_ABS_THR RSSI value threshold dBm. AGCCTRL2.MAGN_TARGET[2:0] Absolute carrier sense threshold disabled below MAGN_TARGET setting below MAGN_TARGET setting MAGN_TARGET setting above MAGN_TARGET setting above MAGN_TARGET setting Table MAGN_TARGET CARRIER_SENSE_ABS_THR Settings Changing MAGN_TARGET CARRIER_SENSE_ABS_THR will change threshold from (-82 [dBm]). SWRA114B Page Design Note DN505 References CC1100 Single-Chip Cost Power RF-Transceiver, Data sheet (cc1100.pdf) CC1101 Single-Chip Cost Power RF-Transceiver, Data sheet (cc1101.pdf) CC2500 Single-Chip Cost Power RF-Transceiver, Data sheet (cc2500.pdf) CC1100 Errata Notes (swrz012.pdf) CC1101 Errata Notes (swrz020.pdf) CC2500 Errata Notes (swrz002.pdf) CC1110Fx/CC1111Fx Low-Power Sub-1 System-on-Chip (SoC) with MCU, Memory, Transceiver, Controller (cc1110f32.pdf) CC2510Fx/CC2511Fx Low-Power (System-on-Chip) with MCU, Memory, Transceiver, Controller (cc2510f32.pdf) SWRA114B Page Design Note DN505 General Information Document History Revision SWRA114B SWRA114A SWRA114 Date 2007.10.22 2007.01.12 2006.10.23 Description/Changes Removed logo from header. Added info about CC1101 CC1111. Added info Table Corrected error code example. Added chapter RSSI Threshold Initial release. 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