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DAC8531 Evaluation Module
User's Guide
Data Acquistion (Dallas)
SLAU076
IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgment, including those pertaining warranty, patent infringement, limitation liability. warrants performance products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Customers responsible their applications using components. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such products services might used. TI's publication information regarding third party's products services does constitute TI's approval, license, warranty endorsement thereof. Reproduction information data books data sheets permissible only reproduction without alteration accompanied associated warranties, conditions, limitations notices. Representation reproduction this information with alteration voids warranties provided associated product service, unfair deceptive business practice, responsible liable such use. Resale TI's products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service, unfair deceptive business practice, responsible liable such use. Also see: Standard Terms Conditions Sale Semiconductor Products. www.ti.com/sc/docs/stdterms.htm
Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
IMPORTANT NOTICE Texas Instruments (TI) provides enclosed product(s) under following conditions: This evaluation being sold intended ENGINEERING DEVELOPMENT EVALUATION PURPOSES ONLY considered commercial use. such, goods being provided complete terms required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found product incorporating goods. prototype, this product does fall within scope European Union directive electromagnetic compatibility therefore meet technical requirements directive. Should this evaluation meet specifications indicated User's Guide, returned within days from date delivery full refund. FOREGOING WARRANTY EXCLUSIVE WARRANTY MADE SELLER BUYER LIEU OTHER WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, INCLUDING WARRANTY MERCHANTABILITY FITNESS PARTICULAR PURPOSE. user assumes responsibility liability proper safe handling goods. Further, user indemnifies from claims arising from handling goods. Please aware that products received regulatory compliant agency certified (FCC, etc.). open construction product, user's responsibility take appropriate precautions with regard electrostatic discharge. EXCEPT EXTENT INDEMNITY FORTH ABOVE, NEITHER PARTY SHALL LIABLE OTHER INDIRECT, SPECIAL, INCIDENTAL, CONSEQUENTIAL DAMAGES. currently deals with variety customers products, therefore arrangement with user exclusive. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. Please read User's Guide and, specifically, Warnings Restrictions notice User's Guide prior handling product. This notice contains important safety information about temperatures voltages. further safety concerns, please contact application engineer. Persons handling product must have electronics training observe good laboratory practice standards. license granted under patent right other intellectual property right covering relating machine, process, combination which such products services might used. Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
WARNINGS RESTRICTIONS important operate this within specified input output ranges described User's Guide. Exceeding specified input range cause unexpected operation and/or irreversible damage EVM. there questions concerning input range, please contact field representative prior connecting input power. Applying loads outside specified output range result unintended operation and/or possible permanent damage EVM. Please consult User's Guide prior connecting load output. there uncertainty load specification, please contact field representative. During normal operation, some circuit components have case temperatures greater than 60°C. designed operate properly with certain components above 60°C long input output ranges maintained. These components include limited linear regulators, switching transistors, pass transistors, current sense resistors. These types devices identified using schematic located User's Guide. When placing measurement probes near these devices during operation, please aware that these devices very warm touch. Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
Information About Cautions Warnings
Preface
Read This First
About This Manual
This user's guide describes characteristics, operation, DAC8531 Evaluation Module. covers pertinent areas involved properly this board along with devices that supports. physical layout, schematic diagram, circuit descriptions included.
This Manual
This document contains following chapters:
Chapter Overview Chapter Physical Description Chapter Operation
Information About Cautions Warnings
This manual contain cautions warnings. This information provided your benefit protection. Read each caution warning carefully.
This example caution statement. caution statement describes situation that could potentially damage your software equipment.
This example warning statement. warning statement describes situation that could potentially cause harm you.
Related Documentation From Texas Instruments
Related Documentation From Texas Instruments
obtain copy following documents, call Texas Instruments Literature Response Center (800) 477-8924 Product Information Center (PIC) (972) 644-5580. When ordering, identify this manual title literature number. Updated documents also obtained through website www.ti.com. Data Sheets: Literature Number: DAC8531 SBAS192 DAC8501 SBAS212 DAC7513 SBAS157 DAC7512 SBAS156 REF02 PDS-1177 TPS6734 SLVS127 OPA350 PDS-1470 OPA177 PDS-1081 SN74AHC74 SCLS255 SN74ACT10 SCAS526 SN74AHC08 SCLS236 SN74AHC1G04 SCLS318 SN74HC166 SCLS117 SN74HC163 SCLS298 Application Reports: TMS320C6000 Daughterboard Interface SPRA478
Questions About This Other Data Converter EVM's
have questions about this other Texas Instruments Data Converter evaluation modules, feel free e-mail Data Converter Application Team dataconvapps@list.ti.com. Include subject heading product have questions concerns with.
Warning
This equipment intended laboratory test environment only. generates, uses, radiate radio frequency energy been tested compliance with limits computing devices pursuant subpart part rules, which designed provide reasonable protection against radio frequency interference. Operation this equipment other environments cause interference with radio communications, which case user expense will required take whatever measures required correct this interference.
Contents
Contents
Overview Features Power Requirements 1.2.1 Supply Voltage 1.2.2 Reference Voltage Basic Functions
Physical Description Layout Bill Materials Operation Stand-Alone Mode Test 3.1.1 Factory Default 3.1.2 Test Mode Operation Host Processor Interface 3.2.1 Signal Interface 3.2.2 Host Processor Operation 3.2.3 Bipolar Operation Using DAC8531 Jumper Setting 3-11 Signal Mapping 3-12 3.4.1 Daughterboard Connector Signal Mapping 3-12 3.4.2 Microcontroller Connector Signal Mapping 3-13 3.4.3 Output Connector 3-14 Schematic Diagram 3-14
Contents
Figures
3-10 Block Diagram Assembly Bottom Assembly Layer (Silkscreen Top) Layer (Ground Plane) Layer (Power Plane) Layer (Silkscreen Bottom) Paste Bottom Paste Drill Layer (Mechanical Specifications) Switch Mapping Data Input Register (16-Bit Version) Switch Mapping Data Input Register (12-Bit Version) Write Sequence Timing Diagram Zero-Scale Output Half-Scale Output Full-Scale Output Bipolar Operation With DAC8531 DAC8531 Bipolar Output Operation 3-10 Daughterboard Connector Signal Mapping 3-13 Microcontroller Signal Mapping 3-14
Tables
List Devices Supported This Parts Lists Factory Default Jumper Setting Modes Operation DAC8531 Unity Gain Output Jumper Settings Gain Output Jumper Settings Capacitive Load Drive Output Jumper Settings Bipolar Operation Output Jumper Settings 3-10 Jumper Setting Function 3-11
viii
Chapter
Overview
This chapter presents general overview DAC8531 evaluation module (EVM), describes some factors that must considered using this module.
Topic
Page
Features Power Requirements Basic Functions
Overview
Features
Features
This features DAC8531 digital-to-analog converter. specifically designed DAC8531, also accommodate DAC8501, DAC7513, DAC7512. digital-to-analog converter device that installed onto board determines version this shown table below. Although this shipped from factory with DAC8531, table below shows different devices that installed option user.
Table 1-1. List Devices Supported This
Version 12-Bit DAC7513 DAC8501 16-Bit DAC8531 Default Optional Optional Device Option DAC7512 Channel Installation Optional
Although designed single-supply operation, bipolar output range also possible configuring output op-amp circuit properly. This discussed detail section 3.2.3. precision voltage reference provided default circuit reference DAC, connection terminal also available option external voltage reference desired. 80-pin user interface connector that SPRA711 compliant included C6000 C54X users. standard 20-pin header connector also available general microcontroller/microprocessor users. This built-in test mode easily check board functionality, thus eliminating arduous task providing digital data information DAC. breadboarding area also provided board. This will serve platform additional circuitry needed that user deems necessary further evaluating onboard other experiments.
Power Requirements
following sections describe power requirements this EVM.
1.2.1
Supply Voltage
power supply range this from connected J2-2 terminal referenced ground through J2-1 terminal. bipolar mode operation desired, then separate supply required provide rails OPA177 op-amp that used generate rail OPA350 op-amp. 15-V supply connects through J1-3 terminal, -15-V supply connects through J1-1 terminal. ±15-V supply referenced ground through J1-2 terminal. consumes approximately approximately
Basic Functions
this used connect evaluation board through common connectors, evaluation board supplies power through jumper provided allow 3.3-V 5.5-V supply selected individually user. Caution using external power supply remove jumper avoid potential damage circuitry. other hand, evaluation board connected through common connectors, external power supply must disconnected.
1.2.2
Reference Voltage
precision reference voltage provided through U16, whichever installed onboard, jumper shorting pins adjustable 100-k potentiometer, R29, installed series with 20-k resistor, R30, allow user adjust reference voltage desired settings. TP11 TP12 provided well, allow user connect external reference source exceed Caution When applying external voltage reference through TP11, make sure that does exceed maximum. Otherwise, this will damage device, DUT.
Basic Functions
DAC8531EVM evaluation platform serial input, rail-to-rail output, 12-bit 16-bit digital-to-analog converters listed Table 1-1. built-in test circuit provided easily check board functionality 20-MHz serial clock rate. self-test mode performed correctly setting appropriate jumpers simply turning switch position. Evaluating device more detailed manner accomplished with microprocessor capable interfacing with standard SPI, QSPI, Microwire, interfaces. versatile three-wire serial interface implemented support standard interfaces mentioned earlier operate clock rates MHz. 20-pin headers, provided, means channel necessary signals needed interface microprocessor/microcontroller some TI's older starter DAC8531 EVM. These headers also used customizing user's processor interface hooking with pattern generators. most TI's starter kits (DSKs) that support common connector interface, headers mounted bottom side board, used mate with DSK's 80-pin
Overview
Basic Functions
common connector headers. Refer accompanying manual proper orientation. does correctly with EVM's common connector headers, then smart adapter, SPRA711 adapter, used. smart adapter routes necessary signals properly with ease correctly configuring adapter board being used. precision reference voltage provided onboard, which adjusted user's preference through potentiometer. This sets effective range DAC's output signal. output monitored through three different access points which follows: jack (J11), test point (TP1), also header through 6-pin header, W13, provides different flavors output, requires output op-amp, U12, configured correctly first desired waveform characteristic. Shorting pins allow user monitor output DAC. bipolar mode operation integrated into board through output op-amp, U12. This option operate bipolar mode yields rail-to-rail output voltage range maximum. Although op-amp, U12, circuit originally intended bipolar operation, single supply option also implemented properly configuring jumpers. block diagram shown Figure 1-1.
Figure 1-1. Block Diagram
Power Module
(J11) (J3) (TP1) Output Buffer Module
VREF
Supply User Interface Module SCLK
Module
Module
Chapter
Physical Description
This chapter describes physical characteristics layout lists components used module.
Topic
Page
Layout Bill Materials
Physical Description
Layout
Layout
constructed four-layer printed circuit board using copperclad FR-4 laminate material. printed circuit board dimensions 147,828 (5.82 inch) 86,106 (3.39 inch), board thickness 1,57 (0.062 inch). Figures through show individual artwork layers.
Figure 2-1. Assembly
Figure 2-2. Bottom Assembly
Layout
Figure 2-3. Layer (Silkscreen Top)
Figure 2-4. Layer (Ground Plane)
Physical Description
Layout
Figure 2-5. Layer (Power Plane)
Figure 2-6. Layer (Silkscreen Bottom)
Layout
Figure 2-7. Paste
Figure 2-8. Bottom Paste
Physical Description
Layout
Figure 2-9. Drill Layer (Mechanical Specifications)
Notes:
fabricated meet exceed IPC-6012, Class standards workmanship shall conform IPC-A-600, Class 2-current revisions. Board material construction approved marked finished board. Laminate material: copper-clad FR-4 Copper weight: finished-all layers Finished thickness: 0.062 ±0.010 inch Minimum plating thickness through holes: 0.001 inch SMOBC/HASL soldermask both sides using appropriate layer artwork: color purple silkscreen required: color white 10)Vendor information incorporated back side whenever possible. Minimum copper conductor width mils Minimum conductor spacing mils Minimum annular ring mils
Bill Materials
Bill Materials
Table 2-1. Parts Lists
Item Qty. Designator C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C45, C24, C25, C27, C28, C30, C40, C41, C21, C22, C43, C31, C32, C33, C34, C35, C36, C37, C38, W10, W11, Description 0.1-µF Multilayer ceramic capacitor Manufacturer Panasonic equivalent Part Number ECJ3VB1C104K
0.1-µF Multilayer ceramic capacitor 1-nF Multilayer ceramic capacitor 1-µF Multilayer ceramic capacitor 10-µF Multilayer ceramic capacitor 33-µF Aluminum electrolytic capacitor, size 10-µF Aluminum electrolytic capacitor, size Lumex LED, amber Lumex LED, green 40-V, 400-mV Schottky diode (1N5817M) transient voltage suppressors SMTZ 15-V transient voltage suppressors SMTZ 3-Terminal screw connector 2-Terminal screw connector 26-Pin header 2-Position jumper, inch spacing 4-Pin dual header 80-Pin 0.050 inch centers connector 20-Pin header Jack (alternate parts: MaCom #5002-5003-10/ Amphenol #901-144) 15-µH Inductor DO1608C-series, Coil Craft 4.7-µH Inductor DO1608C-series, Coil Craft 1/4-W 1206 chip resistor 33-, 1/4-W 1206 chip resistor
Panasonic equivalent Panasonic equivalent Panasonic equivalent Kemet equivalent Panasonic equivalent Panasonic equivalent
ECU-V1H103KBM ECU-V1H102JCH ECJ3YB1C105K C1210C106K8PAC ECEV1CA100SR ECEV1AA330SR
Lumex equivalent Lumex equivalent Diodes, Inc. equivalent General Semiconductor Inc. equivalent General Semiconductor Inc. equivalent Lumberg equivalent Lumberg equivalent Samtec equivalent Samtec equivalent Samtec equivalent Samtec Samtec equivalent Lighthorse Technologies Inc. equivalent Coil Craft/Inductor Warehouse equivalent Coil Craft/Inductor Warehouse equivalent Panasonic equivalent Panasonic equivalent
CMD15-21VYC/TR8 CMD15-21VGC/TR8 1N5817M SMBJ5.0A SMBJ15A KRMZ3 KRMZ2 TSW-113-07-L-D TSW-102-07-L-S TSW-104-07-L-D TFM-140-31-S-D-A TSW-104-07-L-D LTI-SASF54GT
R10, R27, R16, R17, R18, R19, R20,
DO1608C-153 DO1608C-472 ERJ-8GEY0R00V ERJ-8GEYJ330V
Physical Description
Bill Materials
Table 2-1. Parts List (Continued)
Item Qty. Designator R12, R13, R11, SW2, TP2, TP3, TP4, TP5, TP6, TP7, TP1, TP9, TP10, TP11, TP12 Description 510-, 1/4-W 1206 chip resistor 1-k, 1/4-W, 1206 chip resistor 4.7-k, Panasonic EXB-A/CTS Series 4.99-k, 1/4-W 1206 chip resistor 10-k, 1/4-W 1206 chip resistor 10-k, Bourns 32X4W series 20-k, 1/4-W 1206 chip resistor 100-k, 1/4-W 1206 chip resistor 100-k, Bourns 32X4W series 150-k, 1/4-W 1206 chip resistor 2-Position, 4-pin SPST slide switch 4-Position, 8-pin SPST slide switch Test point, single 0.025 inch Turrent terminal test point 4-bit Dual Single inverter 8-Bit parallel serial shift register Triple 3-input positive-NAND gate Quad NAND gate DAC8531 Operational amplifier TPS6734ID Panasonic equivalent C&K/CTS equivalent C&K/CTS equivalent Keystone Electronics equivalent Cambion equivalent Texas Instruments Incorporated Texas Instruments Incorporated Texas Instruments Incorporated Texas Instruments Incorporated Texas Instruments Incorporated Texas Instruments Incorporated Texas Instruments Incorporated Texas Instruments Incorporated Texas Instruments Incorporated Manufacturer Panasonic equivalent Panasonic equivalent Panasonic equivalent Panasonic equivalent Panasonic equivalent Part Number ERJ-8GEYJ511V ERJ-8GEYJ102V EXBA10P472J ERJ-8ENF4991V ERJ-8ENF1002V
Bourns equivalent Panasonic equivalent Panasonic equivalent
3214W-103E ERJ-8ENF2002V ERJ-8ENF1003V 3214W-104E ERJ-8ENF1503V TD02H0SK1 TD04H0SK1 5000
180-7337-02-05 SN74HC163D SN74AHC74D SN74AHC1G04DBVR SN74HC166D SN74ACT10D SN74HC08DR DAC8531E OPA350UA TPS6734ID
Bill Materials
Table 2-1. Parts List (Continued)
Item Qty. Designator U14, Description Precision voltage reference Thaler precision voltage regulator Operation amplifier 3-Pin dual header 3-Position jumper, 0.01 inch spacing 20-MHz Epson programmable oscillator 8002JC series DAC8531 schematic file DAC8531 printed-circuit assembly DAC8531 family printed wiring board Manufacturer Texas Instruments Incorporated Thaler Corporation Texas Instruments Incorporated Samtec equivalent Samtec equivalent Part Number REF02AU VRE3050JS OPA177GS TSW-103-07-L-D TSW-103-07-LS
Epson equivalent
SG-8002JC20.0M-PHBS
Texas Instruments Incorporated Texas Instruments Incorporated Texas Instruments Incorporated
6430514 6430516 6430515
Physical Description
2-10
Chapter
Operation
This chapter covers detail operation provide guidance user evaluating onboard interface specific host processor. Refer DAC8531 data sheet, SBAS192, information about serial interface other related topics. board factory tested configured such that should work immediately stand-alone mode with just slide switch.
Topic
Page
Stand-Alone Mode Test Host Processor Interface Jumper Setting 3-11 Signal Mapping 3-12 Schematic Diagram 3-14
Operation
Stand-Alone Mode Test
Stand-Alone Mode Test
stand-alone mode (SAM) test performed only mode quickly verify board proper functionality. Apply power source with +supply connecting J2-2 referenced J2-1. power indicator light, should illuminate (green) once power applied. board into stand-alone self-test) mode, SW1B SW1A switches must self-test indicator light, should also illuminate indicate that board self-test mode.
3.1.1
Factory Default
board from factory configuration listed table below operate with single supply unity gain buffer output through U12.
Table 3-1. Factory Default Jumper Setting
Reference
Note:
Jumper Position OPEN OPEN OPEN OPEN OPEN
Function Serial data input from circuit data input pin, Serial clock from circuit serial clock input pin, SCLK Frame sync signal from circuit sync input pin, SYNC frame sync (FS) enabled SCLK cycles data enabled 24-bit serial data stream +Supply rail (signal conditioning circuit) power supply provided starter (see Note). configured unity gain. configured unity gain. Bipolar supply selected. output signal conditioned directed J11, J3-1, output terminals. Adjustable onboard reference voltage selected. Enable parallel load data inputs
Jumper must removed external power applied avoid damaging Starter Kit.
3.1.2
Test Mode Operation
Briefly mentioned earlier, switch bank provides control stand-alone mode operation. Switch SW1B controls start stop serial clock SW1A controls signal circuitry. When both switches self-test indicator light (yellow) turns Switch banks provides control bits data bits 16-bit DAC. SW2A SW2B control generator, which allows programmed into four separate modes operation, Table 3-2. SW2A SW2B maps (DB17) (DB16) respectively data input register (16-bit version). Figure shows
Stand-Alone Mode Test
complete mapping respective switches data input register either DAC8531 DAC8501. SW3A SW3B maps (DB13) (DB12) respectively data input register (12-bit version). Figure shows 12-bit version (DAC7512/13).
Table 3-2. Modes Operation DAC8531
Normal operation Power down mode with output Power down mode with output High-Z Operating Mode
Figure 3-1. Switch Mapping Data Input Register (16-Bit Version)
DB23
CONTROL BITS
DATA BITS
Since there only switches (six MSBs) available control data bits, maximum value that data bits programmed limited 0xFC00, which does exactly match full-scale range 16-bit DACs. This intended purely testing purposes done limit component count save space, still effectively shows that properly functioning. 12-bit version, there only bits available control data bits sufficient enough check functionality.
Figure 3-2. Switch Mapping Data Input Register (12-Bit Version)
DB23
used 12-bit version
CONTROL BITS
DATA BITS
general, 16-bit version 12-bit version identical operation with exception number SCLK periods size their shift data registers. With this mind, this users guide will focus primarily 16-bit operation only. self-test mode only provides 20-MHz SCLK serial data transfers emulates standard serial interface. write sequence initiated asserting SYNC line held period SCLKs. serial data clocked into 24-bit shift register, first from line, falling edge SCLK. last data clocked 24th falling edge 16th falling edge 12-bit DAC) SCLK updated. this point, SYNC line disabled three SCLK cycles write sequence
Operation
Stand-Alone Mode Test
again repeated. timing diagram write sequence shown Figure 3-3.
Figure 3-3. Write Sequence Timing Diagram
SYNC
SCLK
output displayed with oscilloscope probing either output terminals J11, J3-1, TP1. Figure shows normal output first power from factory (default configuration). This figure shows zero-scale output DAC. Channel presents output through unity gain signal conditioning op-amp, U12. Channel output straight U11, comparison.
Figure 3-4. Zero-Scale Output
Figure shows half-scale output switches configured send data 0x008000 DAC. Channel presents
Host Processor Interface
output through unity gain signal conditioning op-amp, U12, channel output straight U11, comparison.
Figure 3-5. Half-Scale Output
Figure shows full-scale output switches configured send data 0x00FC00 DAC. Channel presents output through unity gain signal conditioning op-amp, U12, channel output straight U11, comparison.
Figure 3-6. Full-Scale Output
Host Processor Interface
This section describes operation using host processor, such microcontroller, interface with EVM. daughterboard connectors,
Operation
Host Processor Interface
incorporated into direct plug-in development board starter that supports common connector interface. However, headers provided allow user customize their interface cable suit their system configuration. development board starter used interface with board through common connector, then supply power must selected through voltage supply selected depending overall system's requirement. When operating host processor mode testing, make sure slide switches, SW1A SW1B, position. This will ensure that clock other digital devices onboard idled will emit switching noise other noise related digital parts onboard.
3.2.1
Signal Interface
There three signals that essential successful operation DAC, which will covered detail this section. These three serial interface signals SCLK, SYNC, DIN, compatible with SPI, QSPI, Microwire, most serial interfaces.
3.2.1.1
Serial Clock (SCLK) serial input clock, SCLK, maximum frequency compatible with high-speed processors. development board starter when mated with through daughterboard connector must provide external clock source. external clock source signal through routed DAC, U11, through shorting pins header, J10, also used feed external clock source when using another type processor microcontroller that does support common connector scheme, supports serial interface protocol.
3.2.1.2
Synchronization Signal (SYNC) SYNC signal synchronizes stream data with serial clock marks start write sequence. When SYNC line brought low, first falling edge SCLK start valid data. SYNC line must held least SCLK cycles write sequence complete, updated 24th falling edge SCLK. SYNC line brought high before 24th falling edge SCLK, shift register reset write sequence terminated becomes invalid. updated well. essence, this serve interrupt signal DAC. external SYNC signal through routed DAC, through shorting pins header, J10, also used feed external SYNC signal when using another type processor microcontroller that does support common connector scheme, supports serial interface protocol.
Host Processor Interface
lowest power operation device, SYNC line should idled between write sequences because SYNC buffer draws more current when SYNC signal high than does when low. Just before another write sequence desired, SYNC line must brought high minimum that falling edge SYNC initiate next write sequence. 3.2.1.3 Serial Data Input (DIN serial data input clocked into 24-bit shift register from line falling edge SCLK. data shifted starting with only bits valid. first ignored bits (PD1) (PD0) extracted determine DACs mode operation (see Table 3-2). remaining bits data bits which transferred register 24th falling edge SCLK. external signal through routed DAC, U11, through shorting pins header, J10, also used feed external signal when using another type processor microcontroller that does support common connector scheme, supports serial interface protocol.
3.2.2
Host Processor Operation
host processor basically drives DAC, DACs proper operation depends successful configuration between host processor board, course properly written code DAC. incorporates four different options output through operational amplifier, U12. This requires some jumper setting configuration, particularly around op-amp (U12) circuitry, other required equipment needed. Each option discussed individually next subsections. Regardless, output probed through that compared with output necessary. output terminals J11, J3-1 used monitor output shorting pins W13.
3.2.2.1
Unity Gain Output (Default Mode) shipped with unity-gain output default configuration mode. buffered output should closely match output with maybe some slight distortion because feedback resistor capacitor. user tailor feedback circuit closely match their desired wave shape simply desoldering replacing with desired values. Also eliminated altogether resistor soldered replacement desired. Table shows jumper settings relating unity gain configuration output buffer.
Operation
Host Processor Interface
Table 3-3. Unity Gain Output Jumper Settings
Reference Jumper Function Setting Open Open Rail op-amp supplied VCCA Rail op-amp tied analog Disconnect VREF from negative input op-amp Disconnect negative input op-amp from Buffered output channeled output terminals
3.2.2.2
Output Gain operating there need output maintain peak level, than this configuration implemented. Table shows proper jumper settings gain output DAC.
Table 3-4. Gain Output Jumper Settings
Reference Jumper Setting Open Close Close Function Select positive rail supply op-amp closed Negative rail op-amp tied analog Disconnect VREF from negative input op-amp Provides gain output op-amp Supplies constant positive rail op-amp pins shorted together Buffered output channeled output terminals
reference voltage must such that output voltage range does exceed positive rail supply op-amp, U12. Otherwise output op-amp, U12, will clipped. VCCA used also supply positive rail op-amp shorting pins With this configuration, effective output op-amp will maximum VCCA. reference voltage must also VCCA/2. 3.2.2.3 Capacitive Load Driving Another output configuration option drive wide range capacitive loads. However, op-amps under certain conditions become unstable depending op-amp configuration, gain, load value. These just factors that affect op-amp stability performance should considered during implementation. unity gain, OPA350 op-amp, U12, performs very well with very large capacitive loads. Increasing gain enhances amplifier's ability drive even more capacitance, adding load resistor improves capacitive load drive capability. Table shows jumper setting configuration capacitive load drive.
Host Processor Interface
Table 3-5. Capacitive Load Drive Output Jumper Settings
Reference
Note:
Jumper Setting Open Open (see Note) Close
Function Select positive rail supply op-amp closed Negative rail op-amp tied analog Disconnect VREF from negative input op-amp Disconnect (see Note) Supplies constant positive rail op-amp pins shorted together Buffered output channeled output terminals
there need incrementally adjust capacitive load output, replace with capacitor with desired capacitance value close W11.
3.2.3
Bipolar Operation Using DAC8531
Although DAC8531 been designed single-supply operation, bipolar output operation implemented using circuit shown Figure 3-7. output circuit output voltage range ±VREF. rail-to-rail operation amplifier output achievable using OPA350 output amplifier.
Figure 3-7. Bipolar Operation With DAC8531
VREF
OPA350
DAC8531 VREF VOUT
Three-Wire Serial Interface
requires additional ±15-V power supply provide supply rails OPA177 op-amp, U17. ±15-V supply provided through connector EVM. attached J1-3 terminal attached J1-1 terminal. ±15-V supplies referenced J1-2 terminal. OPA177 op-amp specifically used generate -5-V supply voltage negative rail OPA350 op-amp circuit, U12. bipolar configuration accomplished following correct jumper settings according Table 3-6.
Operation
Host Processor Interface
Table 3-6. Bipolar Operation Output Jumper Settings
Reference Jumper Setting Closed Open Close Function Select positive rail supply closed Select negative supply rail closed Connect VREF negative input op-amp negative biasing Disconnect Supplies constant positive rail also into negative input generate output voltage Buffered output channeled output terminals
example Figure shows sinusoid signal channel being amplified within range ±VREF shown channel reference voltage, VREF, which then supplied negative input bias circuit negative rail. This provides output with 0000h corresponding -5-V output FFFFh corresponding output. output voltage input code calculated follows: 65536 VREF
where represents input code decimal 65536). With VREF 65536
Figure 3-8. DAC8531 Bipolar Output Operation
DAC8531 Output
Bipolar Output
Similarly, adjusting VREF voltage desired value less than produces voltage output range ±VREF.
3-10
Jumper Setting
Jumper Setting
table below lists function each jumper EVM.
Table 3-7. Jumper Setting Function
Reference Jumper Setting
Function
Enables stand-alone mode route DAC8531 pin.
Enables user interface route DAC8531
Enables stand-alone mode SCLK route DAC8531 SCLK pin.
Enables user interface SCLK route DAC8531 SCLK pin.
Enables stand-alone mode route DAC8531 SYNC pin.
Enables user interface route DAC8531 SYNC pin. Generates SYNC signal stand-alone mode after SCLK cycles (default mode). Generates SYNC signal stand-alone mode after SCLK cycles (used only 12-bit DACs described table 1-1). Provides 24-bit serial data stand-alone mode when DAC8531 DAC8501 installed EVM. Provides 16-bit serial data stand-alone mode when DAC7512 DAC7513 installed EVM. Supplies VCCA positive rail U12.
Supplies constant positive rail provided closed.
Ties negative rail AGND. Supplies constant negative rail provided closed supply applied board through terminal. board powered 3.3-V supply from through common connector used. Read caution Section 1.2.1 when setting jumper. board powered supply from through common connector used. Read caution Section 1.2.1 when setting jumper.
Legend:
Indicates corresponding pins that shorted closed.
Operation
3-11
Signal Mapping
Table 3-7. Jumper Setting Function (Continued)
Reference Jumper Setting Function Disconnects VREF from negative input terminal U12. Allows VREF routed negative input terminal bipolar operation. Disconnect negative terminal AGND. Allow gain output unipolar mode. Disconnects 12-V supply voltage divider circuit. Connects 12-V supply voltage divider circuit.
Routes output DAC8531 test point, J3-1, output terminals.
Routes output test point, J3-1 output terminals. Used unipolar bipolar modes operation.
Routes output test point, J3-1 output terminals. Used capacitive load driving.
Routes adjustable onboard reference voltage DAC8531 VREF pin.
Routes adjustable user supplied reference voltage DAC8531 VREF pin.
Legend:
Indicates corresponding pins that shorted closed.
Signal Mapping
Figure Figure 3-10 shows signals with respect their connectors/headers.
3.4.1
Daughterboard Connector Signal Mapping
Figure describes essential signals from boards that brought through common connectors which mates with daughterboard connectors
3-12
Signal Mapping
Figure 3-9. Daughterboard Connector Signal Mapping
DGND DGND
DGND
DGND
DGND DGND DGND DGND CLKX DGND CLKR DGND
DGND DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND DGND DGND DGND
DGND
DGND
DGND DGND
DGND DGND CLKS DGND DGND
DGND
DGND
DGND DGND
3.4.2
Microcontroller Connector Signal Mapping
Figure 3-10 describes essential signals serial interface using host processor microcontroller. Basically, three headers used that user build customized 20-pin ribbon cable plug into header easily route signals using wire wrap jumper method. This achieve properly identifying signals from 20-pin custom cable connecting each corresponding signals indicated odd-numbered pins header J10.
Operation
3-13
Schematic Diagram
Figure 3-10. Microcontroller Signal Mapping
CLKS CLKR CLKX
3.4.3
Output Connector
output routed header well jack.
Schematic Diagram
following pages show complete schematic diagram DAC8531 evaluation module board.
3-14
Number
Revision History
Approved
VCCD
Power Reference Module
VCCA
Module
serialDAC_2.sch
+Supply
Analog
Digital
+Supply
VREF
VREF SCLK
DAC_VREF DAC_FS VOUT
Supply
Supply DSP_+3.3V Supply DSP_+5V SCLK Supply
DAC_SCLK DAC_DIN
VOUT
Supply
Supply
User Interface Module
serialDAC_3.sch
DSP_+3.3V DSP_+5V
DSP_+3.3V DSP_+5V UI_FS UI_SCLK UI_SDI UI_FS UI_SCLK
UI_SDI
SCLK
External Test Module
serialDAC_1.sch
SAM_SDI SAM_SCLK
SAM_SDI SAM_SCLK SAM_FS
SAM_FS
12500 Blvd. Dallas, Texas 75243
Title: Engineer: Drawn FILE:
DAC8531
Block Diagram
DATE:
Joselito Parguian Joselito Parguian
SIZE:
19-Apr-2001
REV: SHEET:
Serial DACevm.ddb
6430514
Revision History
VCCD Number Approved
LOAD SAM_SCLK RCO1
SAM_FS
SAM_FS
SAM_SCLK
VCCD /QA1 /QB1 /QC1
SN74AHC74 0.1uF
VCCD
VCCD
0.1uF
SN74HC163
VCCD
VCCD
VCCD RCO1 LOAD
SW1B
SN74HC1G04
AMBER TEST
SAM_SCLK
SAM_SCLK
0.1uF
SAM_SCLK
VCCD
20MHz
SN74HC163
0.1uF
VCCD
4.7K
SDI_D0 SDI_D1 SDI_D2 SDI_D3 SDI_D4 SDI_D5 SDI_D6 SDI_D7
0.1uF
VCCD RCO1
SAM_SCLK
/QA1 /QB1 /QC1
SN74ACT10N
SN74HC166M
VCCD
SN74X08
SN74X08
SDI_D8 SDI_D9
0.1uF
SDI_D10 SDI_D11 SDI_D12 SDI_D13 SDI_D14 SDI_D15
SAM_SCLK
VCCD
SAM_SCLK SW1A
SN74AHC74
SDI_D10 SDI_D11 SDI_D12 SDI_D13 SDI_D14 SDI_D15 SDI_D16 SDI_D17
SDI_D10 SDI_D11 SDI_D12 SDI_D13 SDI_D14 SDI_D15 SDI_D16 SDI_D17
SN74HC166M
VCCD
SAM_SDI
SAM_SDI
SDI_D16 SDI_D17
VCCD
0.1uF
4.7K
SDI_D18 SDI_D19 SDI_D20 SDI_D21 SDI_D22 SDI_D23
SAM_SCLK
0.1uF
0.1uF
VCCD
SN74HC166M
Title: Engineer: Drawn FILE:
12500 Boulevard. Dallas, Texas 75243 SN74X08
DAC8531
DATE:
SN74ACT10N (14)
SN74ACT10N (14)
SN74X08
Joselito Parguian Joselito Parguian
SIZE:
External Test Module
19-Apr-2001
REV: SHEET:
Serial EVM.prj
6430514
Number
Revision History
Approved
VCCA
0.1uF
10uF
VCCA
SCLK
DAC_FS DAC_SCLK DAC_DIN
SYNC SCLK
VOUT VREF
10uF
0.01uF
CLD_OUT
VOUT
VOUT
OPA350
DAC8531
0.1uF
100K Optional
DAC_VREF
VREF
0.01uF
CLD_OUT
12500 Blvd. Dallas, Texas 75243
Title: Engineer: Drawn FILE:
DAC8531
Module
DATE:
Joselito Parguian Joselito Parguian
SIZE:
19-Apr-2001
REV: SHEET:
Serial EVM.prj
6430514
SDI_D10 SDI_D11 SDI_D12 SDI_D13 SDI_D14 SDI_D15 SDI_D16 SDI_D17
SDI_D10 SDI_D11 SDI_D12 SDI_D13 SDI_D14 SDI_D15 SDI_D16 SDI_D17 DSP_+5V
TMS320 Common Connector Interface
DSP_+5V
TFM-140 DSP_+3.3V
VCCD
R15A
SW2A SW2B SW2C SW2D SW3A SW3B SW3C SW3D
R15B R15C R15D R15E R15F R15G R15H
SDI_D17
CLKX CLKR
SDI_D16
SDI_D15
DSP_+3.3V
DSP_+3.3V
SDI_D14
Note: Switch
SDI_D13
SDI_D12
SDI_D11
SDI_D10
TFM-140
DSP_+3.3V
16-bit Control Bits 12-bit Control Bits
CLKS
16-bit 12-bit
UI_FS UI_FS UI_SCLK UI_SCLK UI_SDI UI_SDI CLKR CLKX
CLKS CLKR CLKX
12500 Boulevard. Dallas, Texas 75243
Title: Engineer: Drawn FILE:
DAC8531
User Interface Module
DATE:
Joselito Parguian Joselito Parguian
SIZE:
19-Apr-2001
REV: SHEET:
Serial EVM.prj
6430514
VCCA 15uH GREEN
TRIM TEMP
150K
Supply
100K
REF02AU(8)
-15V
COMP
VRE3050 TRIM 0.1uF
TRIM TEMP
0.1uF Supply
4.7uH
1N5817
REF02AU(8)
33uF
0.1uF
+15V 0.1uF
33uF
0.01uF
TPS6734ID
VREF
VREF
100K
WARNING
EXTERNAL REFERENCE VCCA VCCD +Supply 4.7uH 33uF 0.1uF 33uF TP10 Supply SMBJ15 Supply 33uF 33uF 4.7uH 0.1uF 33uF SMBJ15 Supply Supply 4.7uH 33uF 0.1uF 33uF
TP11 TP12
Apply voltage maximum TP11. Anything over will damage U11.
+15V
3-5V
+Supply
SMBJ5.0
10uF
OPA177
0.1uF
4.7uH
DSP_+3.3V
DSP_+5V
-15V VCCD
VCCD
10uF
10uF
0.1uF
0.1uF
0.1uF
12500 Boulevard. Dallas, Texas 75243
Title: Engineer: Drawn FILE:
DAC8531
DATE:
Joselito Parguian Joselito Parguian
SIZE:
Power Reference Module
19-Apr-2001
REV: SHEET:
Serial EVM.prj
6430514
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