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AS5043
Top Searches for this datasheetNON-CONTACT SPEED LENGTH MEASUREMENT - NON-CONTACT SPEED LENGTH MEASUREMENT AS5043 - AS5043 AN5043* - AN5043* AS5043 - AS5043 AS5043 Data Sheet Configuration AS5043 Programmable 360° Magnetic Angle Encoder with Absolute Analog Outputs General Description AS5043 contactless magnetic angle encoder accurate measurement 360°. system-on-chip, combining integrated Hall elements, analog front digital signal processing single device. AS5043 provides digital 10-bit well programmable analog output that directly proportional angle magnet, rotating over chip. analog output configured many ways, including user programmable angular range, adjustable output voltage range, voltage current output, etc. internal voltage regulator allows operation AS5043 from 3.3V 5.0V supplies. Data Sheet Features 360° contactless high resolution angular position encoding User programmable zero position 10-bit absolute outputs: Serial digital interface Versatile analog output programmable angular range 360° programmable ratiometric output voltage range Failure detection mode magnet field strength loss power supply Serial read-out multiple interconnected AS5043 devices using daisy chain mode Mode input optimizing noise speed Alignment mode magnet placement guidance Wide temperature range: 40°C 125°C Small package: SSOP (5.3mm 6.2mm) Benefits Complete system-on-chip Flexible system solution provides absolute output, both digital analog Angle measurement with software programmable range 360° High reliability non-contact magnetic sensing Ideal applications harsh environments Robust system, tolerant magnet misalignment, airgap variations, temperature variations external magnetic fields calibration required Applications AS5043 ideal applications with angular travel range from degrees full turn 360°, such Industrial applications: Contactless rotary position sensing Robotics Valve Controls Automotive applications: Throttle position sensors brake pedal position sensing Headlight position control Front panel rotary switches Replacement potentiometers Figure Typical Arrangement AS5043 Magnet www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Configuration Configuration Figure AS5043 Configuration SSOP16 MagRngn Mode Prog_DI VDD5V VDD3V3 Vout DACout DACref Package SSOP16 lead Shrink Small Outline Package) Table Description SSOP16 Symbol Type Description Magnet Field Magnitude RaNGe warning; active low, indicates that magnetic field strength outside recommended limits. Mode input. Select between noise (low, connect VSS) high speed (high, connect VDD5V) mode power Internal pull-down resistor. Chip Select, active low; Schmitt-Trigger input, internal pull-up resistor (~50k) Clock Input Synchronous Serial Interface; Schmitt-Trigger input must left unconnected Data Output Synchronous Serial Interface Negative Supply Voltage (GND) Programming Input Data Input Daisy Chain mode. Internal pull-down resistor (~74k). Should connected programming used Reference voltage input external reference output (unbuffered, ~8k) Feedback, OPAMP inverting input OPAMP output Must left unconnected Must left unconnected 3V-Regulator Output internal core, regulated from VDD5V.Connect VDD5V supply voltage. load externally. Positive Supply Voltage, MagRngn DO_OD Mode Prog_DI DACref DACout Vout VDD3V3 VDD5V DI_PD, DI_PU, DI,ST DO_T DI_PD DO_OD digital output open drain DI_PD digital input pull-down DI_PU digital input pull-up DO_T supply digital output /tri-state Schmitt-trigger input analog input analog output digital input www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Configuration Description Pins supply pins, pins internal must left open. magnetic field strength indicator, MagRNGn. open-drain output that pulled when magnetic field recommended range (45mT 75mT). chip will still continue operate, with reduced performance, when magnetic field range. When this low, analog output pins will indicate out-of-range condition. MODE allows switching between filtered (slow) unfiltered (fast mode). This must tied VDD5V, must switched after power section Chip Select (CSn; active low) selects device serial data transmission over interface. "logic high" forces output digital tri-state. clock input serial data transmission over interface (see section (Data Out) serial data output during data transmission over interface (see section PROG_DI used program different operation modes, well zero-position register. This also used digital input shift serial data through device Daisy Chain Configuration, (see page DACref external voltage reference input Digital-to-Analog Converter (DAC). selected, analog output voltage (Vout) will ratiometric voltage this pin. Pin10 DACout unbuffered output DAC. This used connect external OPAMP, etc. DAC. (Feedback) inverting input OPAMP buffer stage. Access this allows various OPAMP configurations. Vout analog output pin. analog output voltage, ratiometric VDD5V (3.0 5.5V) external voltage source proportional angle. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Functional Description Functional Description AS5043 manufactured CMOS standard process uses spinning current Hall technology sensing magnetic field distribution across surface chip. integrated Hall elements placed circle around center device deliver voltage representation magnetic field perpendicular surface Through Sigma-Delta Analog Digital Conversion Digital Signal-Processing (DSP) algorithms, AS5043 provides accurate high-resolution absolute angular position information. this purpose Coordinate Rotation Digital Computer (CORDIC) calculates angle magnitude Hall array signals. also used indicate movements magnet towards away from chip indicate, when magnetic field outside recommended range (status bits MagInc, MagDec; hardware MagRngn). small cost diametrically magnetized (two-pole) standard magnet, centered over chip, used input device. AS5043 senses orientation magnetic field calculates 10-bit binary code. This code accessed Synchronous Serial Interface (SSI). addition, absolute angular representation converted analog signal, ratiometric supply voltage. analog output configured many ways, such 360°/180°/90° angular range, external internal reference voltage, 0-100%*VDD 10-90% *VDD analog output range, external internal amplifier gain setting. various output modes well user programmable zero position programmed register. long programming voltage applied PROG, setting overwritten time will reset default when power cycled. make setting permanent, register must programmed applying programming voltage. AS5043 tolerant magnet misalignment unwanted external magnetic fields differential measurement technique Hall sensor conditioning circuitry. also tolerant airgap temperature variations Sin-/Cos- signal evaluation. Figure AS5043 Block Diagram MagRNGn Mode DACref Vout DACout Prog_DI www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet 3.3V Operation 3.3V Operation AS5043 operates either 3.3V ±10% ±10%. This made possible internal 3.3V Low-Dropout (LDO) Voltage regulator. core supply voltage always taken from output, internal blocks always operating 3.3V. 3.3V operation, must bypassed connecting VDD3V3 with VDD5V (see Figure operation, supply connected VDD5V, while VDD3V3 (LDO output) must buffered 1.10µF capacitor, which should placed close supply pin. VDD3V3 output intended internal only. should loaded with external load. voltage levels digital interface I/O's correspond voltage VDD5V, buffers supplied from this (see Figure Figure Connections 3.3V Supply Voltages buffer capacitor 100nF recommended both cases close VDD5V. Note that VDD3V3 must always buffered capacitor. must left floating, this cause instable internal 3.3V supply voltage which lead larger than normal jitter measured angle. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet 10-bit Absolute Synchronous Serial Interface (SSI) 10-bit Absolute Synchronous Serial Interface (SSI) serial data transmission timing outlined Figure changes logic low, Data (DO) will change from high impedance (tri-state) logic high read-out sequence will initiated. After minimum time tCLK data latched into output shift register with first falling edge CLK. Each subsequent rising edge shifts data. serial word contains bits, first bits angular information D[9:0], subsequent bits contain system information, about validity data such OCF, COF, LIN, Parity Magnetic Field status (increase decrease range) subsequent measurement initiated logic "high" pulse with minimum duration tCSn. Data transmission terminated time pulling high. Serial Data Contents D9:D0 absolute angular position data (MSB clocked first). (Offset Compensation Finished), logic high indicates that Offset Compensation Algorithm finished data valid. (Cordic Overflow), logic high indicates range error CORDIC part. When this set, data D9:D0 invalid. absolute output maintains last valid angular value. This alarm resolved bringing magnet within X-Y-Z tolerance limits. (Linearity Alarm), logic high indicates that input field generates critical output linearity. When this set, data D9:D0 still used, contain invalid data. This warning resolved bringing magnet within X-Y-Z tolerance limits. Data D9:D0 valid, when status bits have following configurations: Table Status Outputs even checksum bits 1:15 Parity MagInc, (Magnitude Increase) becomes HIGH, when magnet pushed towards thus magnetic field strength increasing. MagDec, (Magnitude Decrease) becomes HIGH, when magnet pulled away from thus magnetic field strength decreasing. Both signals HIGH indicate magnetic field that allowed range (see Table Note: (MagRngn) combination MagInc MagDec. active open drain output requires external pull-up resistor. magnetic field range, this output turned off. (logic "high"). Even Parity transmission error detection bits 1.15 (D9.D0, OCF, COF, LIN, MagInc, MagDec) absolute angular output always resolution 360°. Placing magnet above chip, angular values increase clockwise direction default. Figure Synchronous Serial Interface with Absolute Angular Position Data Even active valid Angular Position Data Status Bits Tristate www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet 10-bit Absolute Synchronous Serial Interface (SSI) Z-Axis Range Indication (Push Button Feature, Red/Yellow/Green Indicator) AS5043 provides several options detecting movement distance magnet vertical (Z-) direction. Signal indicators MagINC, MagDEC available status bits serial data stream, while MagRngn open-drain output that indicates out-of range status YELLOW range). Additionally, analog output provides safety feature form that will turned when magnetic field strong weak (RED range). serial data always available, red/yellow/green status indicated status bits shown below: Table Magnetic Field Strength Indicators Status Bits Hardware Pins Rngn Analog Output enabled enabled enabled enabled Description distance change Magnetic Input Field (GREEN range, ~45.75mT) Distance increase, GREEN range; Pull-function. This state dynamic only active while magnet moving away from chip. Distance decrease, GREEN range; Push- function. This state dynamic only active while magnet moving towards chip. YELLOW Range: Magnetic field 25.45mT ~75.135mT. AS5043 still operated this range, with slightly reduced accuracy. Range: Magnetic field ~<25mT >~135mT. analog output will turned this range default. enabled permanently programming (see 11.1.2). still possible absolute serial interface range, recommended. disabled www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Mode Input Mode Input absolute angular position sampled rate 10.4kHz (t=96µs) fast mode rate 2.6kHz (t=384µs) slow mode. These modes selected MODE (#2) during power AS5043. This activates deactivates internal filter, which used reduce digital jitter consequently analog output noise. Activating filter pulling Mode reduces transition noise <0.03° rms. same time, sampling rate reduced 2.6kHz signal propagation delay increased 384µs. This mode recommended high precision, speed 360° applications. Deactivating filter setting Mode HIGH increases sampling rate 10.4kHz reduces signal propagation delay 96µs. transition noise will increase <0.06° rms. This mode recommended higher speed full scale 360° applications. Switching MODE affects following parameters: Table Mode Settings Parameter Sampling rate Transition noise sigma) Propagation delay Startup time Slow Mode (Pin MODE 2.61 (383µs) 0.03° 384µs 20ms Fast Mode (Pin MODE 10.42 (95.9µs) 0.06° 96µs 80ms MODE should power-up. change mode during operation allowed. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Daisy Chain Mode Daisy Chain Mode Daisy Chain Mode allows connection several AS5043's series, while still keeping just digital input data transfer (see "Data Figure This mode accomplished connecting data output (DO; data input (PROG; subsequent device. filter must implemented between each PROG device device n+1, prevent then encoders enter alignment mode, case discharge, long cables, conform signal levels shape. Using values R=100R C=1nF allow max. frequency 1MHz whole chain. serial data connected devices read from first device chain. length serial stream increases with every connected device, (16+1) bits: e.g. devices, three devices, etc. last data first device (Parity) followed dummy first data second device (D9), etc. (see Figure Figure Daisy Chain Hardware Configuration PROG 100R PROG 100R AS5043 PROG AS5043 AS5043 Figure Daisy Chain Data Transfer Timing Diagram active valid ngular osition tatus evice ngular osition evice www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Analog Output Analog Output analog output Vout provides analog voltage that proportional angle rotating magnet ratiometric supply voltage VDD5V (max.5.5V). source sink currents ±1mA normal operation 66mA short circuit current). analog output block consists digital angular range selector, 10-bit Digital-to-Analog converter OPAMP buffer stage (see Figure 14). digital range selector allows preselection angular range 360°,180°,90° (see Table Fine-tuning angular range accomplished adjusting gain OPAMP buffer stage. reference voltage Digital-to-Analog converter (DAC) taken internally from VDD5V this mode, output voltage ratiometric supply voltage. Alternatively, external reference applied DACref (#9). this mode, analog output ratiometric external reference voltage. on-chip diagnostic feature turns analog output case error (broken supply magnetic field range; Table output accessed directly DACout. addition OPAMP output allows variety user configurable options, such variable output voltage ranges variable output voltage versus angle response. adding external transistor, analog voltage output buffered allow output currents hundred milliamperes more. Furthermore, OPAMP configured constant current source. option, configured different output ranges: 0.100% VDACref. reference point either taken from VDD5V/2 from external DACref input. 0.100% range allows easy replacement potentiometers. nature rail-to-rail outputs, linearity will degrade output voltages that close supply rails. 10.90% VDACref. This range allows better linearity, OPAMP driven rails. Furthermore, this mode allows failure detection, when analog output voltage outside normal operating range 10.90%VDD, case broken supply when magnetic field range analog output turned off. 11.1 Analog Output Voltage Modes Analog output voltage modes programmable OTP. Depending application, analog output selected rail-to-rail output clamped output with 10%-90% VDD5V. output ratiometric supply voltage (VDD5V), which range from 3.0V 5.5V. reference switched external reference (pin DACref), output ratiometric external reference. 11.1.1 Full Scale Mode This output mode provides ratiometric output 100%)x Vref amplified OPAMP stage (default internal gain, Figure Figure Analog Output, Full Scale Mode (shown 360°mode) Vref 100% analog output voltage Note: simplification, Figure describes linear output voltage from rail rail VDD). practice, this feasible saturation effects OPAMP output driver transistors. actual curve will rounded towards supply rails indicated Figure angle 360° 180° 270° Note: Figure shown 360° operation. Table (page further angular range programming options. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Analog Output 11.1.2 Diagnostic Output Mode Figure Diagnostic Output Mode Vref 100% analog output voltage normal operating area error case, output voltage grey area Diagnostic Output Mode (see Figure analog output internal ranges from Vref error case, either when supply interrupted when magnetic field "red" range, (see Table output switched thus indicates error condition. possible enable analog output permanently will switched even magnetic field range). enable this feature factory setting must set. corresponding FS6. application note AS5040-20 (Extended features programming) further details. application note available download austriamicrosystems website. 180° 270° 360° angle analog digital outputs will have following conditions: Status Normal operation Magnetic field range Output Voltage Vref Digital Output #1023 (0°-360°), MagRngn #1023 (0°-360°) range signaled status bits: MagInc=MagDec=LIN=1, MagRngn= Vref output switched VDD**) VDD**) VDD**) VDD**) Broken positive power supply (VOUT pull down resistor receiving side) Broken power supply ground (VOUT pull down resistor receiving side) Broken positive power supply (VOUT pull resistor receiving side) Broken power supply ground (VOUT pull resistor receiving side) with pull down resistor (receiving side), bits read will "0"s, indicating non-valid output Vref internal: VDD5V (pin #16) external: VDACref (pin#9), depending Ref_extEN (0=int., 1=ext.) positive supply voltage receiving side (3.0 5.5V) www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Programming AS5043 Programming AS5043 After power-on, programming AS5043 enabled with rising edge Prog logic high. configuration data must serially shifted into register Prog-pin. first "CCW" followed zero position data (MSB first) Analog Output Mode setting shown Table Data must valid rising edge (see Figure 10). Following this sequence, voltage Prog must raised programming voltage VPROG (see Figure 10). pulses (tPROG) must applied program fuses. exit programming mode, chip must reset power-on-reset. programmed data available after next power-up. Note: During programming process, transitions programming current cause high voltage spikes generated inductance connection cable. avoid these spikes possible damage connection wires, especially signals PROG must kept short possible. maximum wire length between VPROG switching transistor PROG (see Figure should exceed 50mm inches). suppress eventual voltage spikes, 10nF ceramic capacitor should connected close pins PROG VSS. This capacitor only required programming, required normal operation. clock timing tclk must selected proper rate ensure that signal PROG stable rising edge (see Figure 10). Additionally, programming supply voltage should buffered with 10µF capacitor mounted close switching transistor. This capacitor aids providing peak currents during programming. specified programming voltage PROG 7.5V (see section 19.7). compensate voltage drop across VPROG switching transistor, applied programming voltage slightly higher (7.5 8.0V, Figure 12). Register Contents: Counter Clockwise ccw=0 angular value increases with clockwise rotation ccw=1 angular value increases with counterclockwise rotation [9:0]: Programmable Zero Index Position FB_intEN: OPAMP gain setting: 0=external, 1=internal RefExtEN: reference: 0=internal, 1=external ClampMd Analog output span: 0=0-100%, 1=10-90%*VDD Output Range (OR0, OR1): Analog Output Range Selection [1:0] 360° 180° Figure Programming Access Write Cycle (section tDatain Prog FB_int RefExt Clamp Output Range1 Output Range0 CLKPROG tProg enable tDatain valid tclk text Zero Position Analog Modes www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Programming AS5043 Figure Complete Programming Sequence Write Data Programming Mode Power Prog CLKPROG Data 7.5V VProgOff tLoad PROG tPrgH tPrgR tPROG tPROG finished Figure Programming Hardware Connection AS5043 (shown with AS5043 demoboard) 12.1 Zero Position Programming AS5043 allows easy assembly system, actual angle magnet does need considered. programming, position assigned permanent zero position with accuracy 0.35° (all modes). Using same procedure, AS5043 calibrated assign given output voltage given angle. With this approach, offset errors (DAC OPAMP) also compensated calibrated position. Essentially, given mechanical position, angular measurement system electrically rotated changing Zero Position value register), until output matches desired mechanical position. example Figure below shows configuration supply voltage 10%-90% output voltage range. adjusted Zero Position Programming provide analog output voltage Volts angle 180°. slope curve further adjusted changing gain OPAMP output stage selecting desired angular range (360°/180°/90°/45°). www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Programming AS5043 Figure Zero Position Programming (shown 360° mode) VDD5V analog output voltage Mechanical 360° angle output electrically rotated match given output voltage mechanical position 180° 270° 12.2 Analog Mode Programming analog output configured many ways: consists three major building blocks, digital range preselector, 10-bit Digital-to-Analog-Converter (DAC) OP-AMP buffer stage. default configuration (all bits analog output 360° operation, internal reference (VDD5V/2), external OPAMP gain, 0-100% ratiometric VDD5V. Shown below typical example 0°-360° range, 0-5V output. complete application requires only external component, buffer capacitor VDD3V3 only connections VDD, Vout (connectors 1-3). Note: default setting OPAMP feedback path is:FB_intEn=0=external. external resistors must installed. programmed state (FB_intEn=1=internal), these resistors need installed feedback path internal (Rf_int Rg_int). www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Programming AS5043 Figure Analog Output Block Diagram Magnetic field range alarm. Active low. Leave open connect used Mode pin. Default open (low noise) External reference pin. Leave open connect used Connect pins VDD= 3.0-3.6V. connect 4.5-5.5V Mode DACref VDD5V AS5043 MagRngn REF_extEN 1=ext from 360° 180° Vref 10bit digital VDD5V 0=int DACout 100% VDD5V 10bit analog output pin. Leave open used Range Selector VOUT ClampMdEN 0-100% Vref (def.) 10-90% Vref 0=ext 1=int FB_intEN Gain (int) Rf_int Rg_int PROG programming alignment mode only. Leave open connect used OP-Amp feedback pin. Leave open used. Test pins. Leave open Digital serial interface, 10bit/360°. Leave open used. also tied used Vout 12.2.1 Angular Range Selector Angular Range selector allows digital pre-selection angular range. AS5043 configured full scale angular range 45°, 90°, 180° 360°. addition, Output voltage versus angle response fine-tuned setting gain OP-AMP with external resistors maximum output voltage DAC. combination these options allows configure operation range AS5043 angles 360° output voltages 5.5V. response curve analog output linear selected range (45°/90°/180°/360°). addition, slope mirrored 180° 45°- 90°- modes step response 270° 180°-mode. This allows AS5043 used variety applications. these three modes, output remains Vout,max Vout,min avoid sudden output change when mechanical angle rotated beyond selected analog range. 360°-mode, jitter between Vout,max Vout,min 360° point also prevented hysteresis. www.austriamicrosystems.com Revision 1.80 1-10µF Vout 3.3V VDD3V3 RLmin <100pF 360°angle AS5043 Data Sheet Programming AS5043 Table Digital Range Selector Programming Option Output Range1 Output Range0 Mode Note 1023 default mode, analog resolution= 10bit (1024 steps) over 360° 180° 270° 360° analog step size: 1LSB 0.35° 1023 analog resolution= 10bit (1024 steps) over 180° 180° 270° 1024 360° Analog step size: 1LSB 0.175° 1023 180° 270° 1024 360° analog resolution= 10bit (1024 steps) over Analog step size: 1LSB 0.088° analog resolution= 180° 225° 1024 360° (512 steps) over Analog step size: 1LSB 0.088° Note: resolution digital interface always 10bit (0.35°/step) over 360°, independent analog mode 12.3 Repeated Programming Although single AS5043 register programmed only once (from possible program other, unprogrammed bits subsequent programming cycles. However, that already been programmed should programmed twice. Therefore recommended that bits that already programmed during programming cycle. 12.4 Non-permanent Programming also possible re-configure AS5043 non-permanent overwriting register. This procedure essentially "Write Data" sequence (see Figure without subsequent programming cycle. "Write Data" sequence applied time during normal operation. This configuration remains while power supply voltage above power-on reset level (see 19.5). Application Note AN5000-20 further information. 12.5 Digital-to-Analog Converter (DAC) resolution 10bit (1024 steps) configured following options. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Programming AS5043 Internal external reference default reference voltage (VDD5V) divided (see Figure 13). Using this reference, system that output voltage ratiometric supply voltage built. Optionally, external reference source, applied pin#9 (DACref) used. This programming option useful applications requiring precise output voltage that independent supply fluctuations, current sink outputs applications with dynamic reference, e.g. attenuation audio signals. 0-100% 10-90% full scale range reference voltage buffered internally. recommended range external reference voltage 0.2V (VDD3V3 -0.2)V. output voltage will switched when magnetic field range, when MagInc MagDec indicators both MagRngn-pin (#1) will low. default full scale output voltage range 0-100%*VDD5V. limitations output stage OP-Amp buffer, cannot drive output voltage from 0-100% rail-to-rail. Without load, minimum output voltage will millivolts higher than maximum output voltage will slightly lower than VDD5V. With increasing load, voltage drops will increase accordingly. programming option, output range 10-90%*VDD5V selected. this mode, there saturation upper lower output voltage limits like 0-100% mode allows failure detection output voltage will outside 10-90% limits, when magnetic field "red" range (Vout=0V, Table when supply chip interrupted (Vout=0V VDD5V). unbuffered output accessible (DACout). This output must loaded. 12.6 OP-AMP Stage output buffered non-inverting Op-Amp stage. amplifier supplied VDD5V (pin #16) hence provide output voltages allowing access inverting input Op-Amp with addition discrete components configured many ways, like high current buffer, current sink output, adjustable angle range, etc. default, gain Op-Amp must external resistors (see Figure 13). Optionally, fixed internal gain setting (2x) programmed OTP, eliminating need external resistors. 12.6.1 Output Noise Noise level analog output depends states digital angular output: digital angular output value stable this case, output noise figure given Vnoise paragraph 19.3.6. Note that noise level given default gain other gains, must scaled accordingly. digital output edge step this case, digital output jitter between adjacent values. rate jitter specified transition noise (parameter paragraph 19.5). resulting output noise calculated Vnoise ,Vout where: Vnoise, Vout VDD5V Vnoise,OPAMP Vnoise ,OPAMP noise level Vout Vrms transition noise °rms; 19.5) Supply voltage VDD5V noise level OPAMP (paragraph 19.3.6) Vrms 12.7 Application Examples Application Note AN5043-10 AS5043 Application Examples. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Analog Readback Mode Analog Readback Mode Non-volatile programming (OTP) uses on-chip zener diodes, which become permanently resistive when subjected specified reverse current. quality programming process depends amount current that applied during programming process 130mA). This current must provided external voltage source. this voltage source cannot provide adequate power, zener diodes programmed properly. order verify quality programmed bits, analog level read each zener diode, giving indication whether this particular properly programmed not. AS5043 Analog Readback Mode, digital sequence must applied pins CSn, PROG shown Figure digital level this depends supply configuration (3.3V section page second rising edge (OutpEN) changes PROG digital output log. high signal PROG must removed avoid collision outputs (grey area Figure 15). following falling slope changes PROG analog output, providing reference voltage Vref, that must saved reference calculation subsequent programmed unprogrammed bits. Following this step, each rising slope outputs data reverse order during programming. (see Figure Output Range ClampMdEn, RefExtEn, FB_IntEn, Z0.Z9, ccw) During analog readback, capacitor PROG (see Figure should removed allow fast readout rate. measured analog voltage each must subtracted from previously measured Vref, resulting value gives indication quality programmed bit: reading <100mV indicates properly programmed reading indicates properly unprogrammed bit. reading between 100mV indicates faulty bit, which result undefined digital value, when read power-up. Following clock (after reading "ccw"), chip must reset disconnecting power supply. Figure Analog Register Read PROG www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Alignment Mode Alignment Mode alignment mode simplifies centering magnet over chip gain maximum accuracy XY-alignment tolerance. This electrical centering method allows wider XY-alignment tolerance (0.485mm radius) than mechanical centering (0.25mm radius) eliminates placement tolerance within package (+/- 0.235mm). Alignment mode enabled with falling edge while PROG logic high (Figure 15). Data bits D9-D0 change 10-bit displacement amplitude output. high value indicates large displacement, also higher absolute magnetic field strength. magnet properly aligned, when difference between highest lowest value over full turn minimum. Under normal conditions, properly aligned magnet will result reading less than over full turn. Stronger magnets short gaps between magnet show values larger than These magnets still properly aligned long difference between highest lowest value over full turn minimum. MagInc MagDec indicators will when alignment mode reading same time, hardware MagRngn (#1) will pulled VSS. Alignment mode reset normal operation mode power-on-reset (cycle power supply) falling edge with PROG=low (see Figure 16). Figure Enabling Alignment Mode Figure Exiting Alignment Mode PROG AlignMode enable PROG Read-out exit AlignMode Read-out min. min. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Choosing Proper Magnet Choosing Proper Magnet Typically magnet should diameter 2.5mm height. Magnetic materials such rare earth AlNiCo, SmCo5 NdFeB recommended. magnet's field strength perpendicular surface should verified using gauss-meter. magnetic field given distance, along concentric circle with radius 1.1mm (R1), should range ±45mT.±75mT. (see Figure 18). Figure Typical Magnet Magnetic Field Distribution typ. diameter Magnet axis Vertical field component (45.75mT) Magnet axis Vertical field component concentric circle; radius 1.1mm 15.1 Physical Placement Magnet best linearity achieved placing center magnet exactly over defined center package shown Figure Figure Defined Center Magnet Displacement Radius 2.433 Defined center 2.433 Area recommended maximum magnet misalignment www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Choosing Proper Magnet 15.1.1 Magnet Placement magnet's center axis should aligned within displacement radius 0.25mm from defined center with reference edge (see Figure 19). This radius includes placement tolerance chip within SSOP-16 package (+/- 0.235mm). displacement radius 0.485mm with reference center chip (see section Alignment Mode). vertical distance should chosen such that magnetic field surface within specified limits (see Figure 18). typical distance between magnet package surface 0.5mm 1.8mm with recommended magnet (6mm 3mm). Larger gaps possible, long required magnetic field strength stays within defined limits. magnetic field outside specified range still produce usable results, out-of-range condition will indicated MagRngn (pin which will pulled low. this condition, angular data still available over digital serial interface (SSI), analog output will turned off. Figure Vertical Placement Magnet surface Package surface 0.576mm 0.1mm 1.282mm 0.15mm www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Simulation Modelling Simulation Modelling Figure Arrangement Hall Sensor Array Chip (principle) With reference Figure diametrically magnetized permanent magnet placed above below surface AS5043. chip uses array Hall sensors sample vertical vector magnetic field distributed across device package surface. area magnetic sensitivity circular locus 1.1mm radius with respect center die. Hall sensors area magnetic sensitivity grouped configured such that orthogonally related components magnetic fields sampled differentially. differential signal Y1-Y2 will give sine vector magnetic field. differential signal X1-X2 will give orthogonally related cosine vector magnetic field. angular displacement magnetic source with reference Hall sensor array then modelled arctan 0.5° ±0.5° angular error assumes magnet optimally aligned over center result gain mismatch errors AS5043. Placement tolerances within package ±0.235mm direction, using reference point edge (Figure 21). order neglect influence external disturbing magnetic fields, robust differential sampling ratiometric calculation algorithm been implemented. differential sampling sine cosine vectors removes common mode error components introduced magnetic source itself external disturbing magnetic fields. ratiometric division sine cosine vectors removes need accurate absolute magnitude magnetic field thus accurate Z-axis alignment magnetic source. recommended differential input range magnetic field strength (B(X1-X2),B(Y1-Y2)) ±75mT surface die. addition this range, additional offset ±5mT, caused unwanted external stray fields allowed. chip will continue operate, with degraded output linearity, signal field strength outside recommended range. strong magnetic fields will introduce errors saturation effects internal preamplifiers. weak magnetic fields will introduce errors noise becoming more dominant. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Failure Diagnostics Failure Diagnostics AS5043 also offers several diagnostic failure detection features: 17.1 Magnetic Field Strength Diagnosis software: MagInc MagDec status bits will both high when magnetic field range. hardware: (MagRngn) logical NAND-ed combination MagInc MagDec status bits. opendrain output will turned with external pull-up resistor) when magnetic field range. hardware: (Vout) analog output OP-Amp. analog output will when magnetic field range (all analog modes). 17.2 Power Supply Failure Detection software: power supply AS5043 interrupted, digital data read will "0"s. Data only valid, when high, hence data stream with "0"s invalid. ensure adequate levels failure case, pull-down resistor (~10k) should added between receiving side hardware: MagRngn open drain output requires external pull-up resistor. normal operation, this high ohmic output high. failure case, either when magnetic field range power supply missing, this output will become low. ensure adequate level case broken power supply AS5043, pull-up resistor (~10k) must connected positive supply (VDD5V). www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Angular Output Tolerances Angular Output Tolerances 18.1 Accuracy; Digital Outputs Accuracy defined error between measured angle actual angle. influenced several factors: non-linearity analog-digital converters, internal gain mismatch errors, non-linearity misalignment magnet these errors, accuracy with centered magnet (Errmax Errmin)/2 specified better than ±0.5 degrees 25°C (see Figure 23). Misalignment magnet further reduces accuracy. Figure shows example 3D-graph displaying nonlinearity over XY-misalignment. center square XY-area corresponds centered magnet (see center graph). axis extends misalignment ±1mm both directions. total misalignment area graph covers square (79x79mil) with step size 100µm. each misalignment step, measurement shown Figure repeated accuracy (Errmax Errmin)/2 (e.g. 0.25° Figure entered Z-axis 3D-graph. 18.2 Accuracy; Analog Output analog output same accuracy digital output with addition nonlinearities OPAMP (+/-1LSB; Table Figure Example Linearity Error over Misalignment Linearity Error over XY-misalignment 1000 -100 -400 -700 -200 -400 -600 -1000 -800 -1000 maximum non-linearity error this example better than degree (inner circle) over misalignment radius ~0.7mm. volume production, placement tolerance within package (±0.235mm) must also taken into account. total nonlinearity error over process tolerances, temperature misalignment circle radius 0.25mm specified better than ±1.4 degrees. magnet used this measurement cylindrical NdFeB (Bomatec® BMN-35H) magnet with diameter 2.5mm height. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Angular Output Tolerances Figure Example Linearity Error over 360° Linearity Error with Centered Magnet [degrees] -0.1 -0.2 -0.3 -0.4 -0.5 transition noise 18.3 Transition Noise Transition noise defined jitter transition between steps. nature measurement principle (Hall sensors Preamplifier ADC), there always certain degree noise involved. This transition noise voltage results angular transition noise outputs. specified 0.06 degrees sigma) fast mode (pin MODE high) 0.03 degrees sigma) slow mode (pin MODE open). These values repeatability indicated angle given mechanical position. transition noise different implications type output that used: absolute output; interface: transition noise absolute output reduced user applying averaging readings. averaging readings will reduce transition noise 50%, e.g. from 0.03°rms 0.015°rms sigma) slow mode analog output: Ideally, analog output should have jitter that less than digit. 360° mode, both fast slow mode selected adequate jitter. 180°, mode, where step sizes smaller, slow mode should selected reduce output jitter. statistically, sigma represents 68.27% readings, sigma represents 99.73% readings. 18.4 High Speed Operation 18.4.1 Sampling Rate AS5043 samples angular value rate 10.42k samples second (ksps) fast mode 2.61ksps slow mode. Consequently, reading performed each 96µs. (fast mode) 384µs (slow mode). stationary position magnet, this sampling rate creates additional error. Absolute Mode: With given sampling rates, number samples turn magnet rotating high speed calculated fast mode www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Angular Output Tolerances slow mode practice, there upper speed limit. only restriction that there will fewer samples revolution speed increases. Regardless rotational speed, absolute angular value always sampled highest resolution. Table Speed Performance Fast Mode (Pin Mode 610rpm 1024 samples turn 1220rpm samples turn 2441rpm samples turn etc. Slow Mode (Pin Mode open) 610rpm samples turn 1220rpm samples turn 2441rpm samples turn etc. 18.5 Output Delays propagation delay delay between time that sample taken until available angular data. This delay 96µs fast mode (pin Mode high) 384µs slow mode (pin Mode open). analog output produces further delay, output voltage will updated soon available. Using interface data transmission, additional delay must considered, caused asynchronous sampling (0.1/fsample) time takes external control unit read process angular data from AS5043. 18.5.1 Angular Error Caused Propagation Delay rotating magnet will cause angular error caused propagation delay. This error increases linearly with speed: sampling (deg) pr.delay where esampling angular error rotating speed [rpm] prop.delay propagation delay [seconds] Note: since propagation delay known, automatically compensated control unit processing data from AS5043. 18.6 Internal Timing Tolerance AS5043 does require external ceramic resonator quartz. internal clock timings AS5043 generated on-chip oscillator. This oscillator factory trimmed accuracy room temperature (±10% over full temperature range). This tolerance influences sampling rate: 18.6.1 Absolute Output; Interface angular value updated every 96µs (Mode 384µs (Mode open) www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Angular Output Tolerances 18.7 Temperature 18.7.1 Magnetic Temperature Coefficient major benefits AS5043 compared linear Hall sensors that much less sensitive temperature. While linear Hall sensors require compensation magnet's temperature coefficients, AS5043 automatically compensates varying magnetic field strength over temperature. magnet's temperature drift does need considered, AS5043 operates with magnetic field strengths from ±45.±75mT. Example: NdFeB magnet field strength 75mT -40°C temperature coefficient -0.12% Kelvin. temperature change from -40° +125° 165K. magnetic field change -0.12% -19.8%, which corresponds 75mT -40°C 60mT 125°C AS5043 compensate this temperature related field strength change automatically, user adjustment required. 18.7.2 Accuracy over Temperature influence temperature absolute accuracy very low. While accuracy ±0.5° room temperature, increase ±0.9° increasing noise high temperatures. 18.7.3 Timing Tolerance over Temperature internal oscillator factory trimmed ±5%. Over temperature, this tolerance increase ±10%. Generally, timing tolerance influence accuracy resolution system, used mainly internal clock generation. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Electrical Characteristics Electrical Characteristics 19.1 Absolute Maximum Ratings (non operating) Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only. Functional operation device these other conditions beyond those indicated under "Operating Conditions" implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Parameter supply voltage Symbol VDD5V VDD3V3 -0.3 Unit Note VDD5V VDD3V3 Pins MagRngn, Mode, CSn, CLK, DACout, Vout -0.3 Input voltage -0.3 -0.3 Input current (latchup immunity) Electrostatic discharge Storage temperature Body temperature (Lead-free package) Humidity non-condensing Iscr Tstrg TBody -100 VDD5V +0.3 DACref PROG_DI Norm: JEDEC Norm: method 3015 67°F +257°F t=20 40s, Norm: IPC/JEDEC J-Std-020C Lead finish 100% "matte tin" 19.2 Operating Conditions Parameter Ambient temperature Supply current Supply voltage VDD5V Voltage regulator output voltage VDD3V3 Supply voltage VDD5V Supply voltage VDD3V3 Symbol Unit Note Tamb Isupp VDD5V Operation 3.3V Operation (pin VDD5V VDD3V3 connected) -40°F.+257°F VDD3V3 VDD5V VDD3V3 19.3 Characteristics Digital Inputs Outputs 19.3.1 CMOS Schmitt-Trigger Inputs: CLK, (internal Pull-up), Mode (internal Pull-down) (operating conditions: Tamb +125°C, VDD5V 3.0-3.6V operation) VDD5V 4.5-5.5V operation) unless otherwise noted) Parameter High level input voltage level input voltage Schmitt Trigger hysteresis Input leakage current Pull-up level input current Pull-down high level input current Symbol VIon- VIoff ILEAK VDD5V VDD5V Unit Note Normal operation -100 CLK, VDD5V 5.0V CSn, VDD5V= 5.0V Mode, VDD5V= 5.0V www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Electrical Characteristics 19.3.2 CMOS Input: Program Input (Prog) (operating conditions: Tamb +125°C, VDD5V 3.0-3.6V operation) VDD5V 4.5-5.5V operation) unless otherwise noted) Parameter High level input voltage High level input voltage level input voltage Pull-down high level input current Symbol VPROG VDD5V Unit Note "programming conditions" VDD5V During programming VDD5V: 5.5V 19.3.3 CMOS Output Open Drain: MagRngn (operating conditions: Tamb +125°C, VDD5V 3.0-3.6V operation) VDD5V 4.5-5.5V operation) unless otherwise noted) Parameter level output voltage Output current Open drain leakage current Symbol VSS+0.4 Unit Note VDD5V: 4.5V VDD5V: 19.3.4 Tristate CMOS Output: (operating conditions: Tamb +125°C, VDD5V 3.0-3.6V operation) VDD5V 4.5-5.5V operation) unless otherwise noted) Parameter High level output voltage level output voltage Output current Tri-state leakage current Symbol VDD5V -0.5 VSS+0.4 Unit Note VDD5V: 4.5V VDD5V: 19.3.5 Digital-to-Analog Converter Parameter Resolution Output range VOUTM1 VOUTM2 Output resistance reference voltage (DAC full scale range) Integral nonlinearity Differential nonlinearity Analog output hysteresis ROut,DAC Vref VDD5V INLDAC DNLDAC Hyst 0.10 *Vref Symbol Unit Note Setting ClampMdEn (default) ClampMdEn Vref 0.90 *Vref VDD3V3 0.100% Vref (default) 10.90% Vref Unbuffered DACout (#10) reference external: Pin: DACref (#9) reference internal RefExt RefExtEn (default) Non-Linearity OPAMP; -40.+125°C, analog modes: 1LSB Vref 1024 analog modes 360°-0° transition, 360° mode only OR1,OR0 (default) www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Electrical Characteristics 19.3.6 OPAMP Output Stage Parameter Power Supply Range Parallel Load Capacitance Parallel Load Resistance Open Loop Gain Offset Voltage Output Range Output Range High Current capability sink Current capability source Output noise Symbol VDD5V VosOP VoutL VoutH Isink Isource Vnoise Unit Note 0.05 VDD5V 0.95 VDD5V 3.3V operation sigma Linear range analog output Permanent short circuit current: Vout VDD5V Permanent short circuit current: Vout Over full temperature range; µVrms 1Hz.10MHz,Gain Internal; OTP: FB_int External OTP: FB_int (default) With external resistors, pins Vout [#12] [#11]: Figure OPAMP gain (noninverting) Gain 19.4 Magnetic Input Specification (operating conditions: Tamb +125°C, VDD5V 3.0-3.6V operation) VDD5V 4.5-5.5V operation) unless otherwise noted) Two-pole cylindrical diametrically magnetised source: Parameter Diameter Thickness Magnetic input field amplitude Magnetic offset Field non-linearity Input frequency (rotational speed magnet) Symbol dmag tmag Boff Unit Note Recommended magnet: 2.5mm cylindrical magnets Required vertical component magnetic field strength die's surface, measured along concentric circle with radius 1.1mm Constant magnetic stray field Including offset gradient Absolute mode: readout 1024 positions (see table Incremental mode: missing pulses rotational speeds 10,000 (see table Max. offset between defined device center magnet axis NdFeB (Neodymium Iron Boron) fmag_abs fmag_inc Displacement radius Recommended magnet material temperature drift Disp -0.12 -0.035 0.25 SmCo (Samarium Cobalt) www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Electrical Characteristics 19.5 Electrical System Specifications (operating conditions: Tamb +125°C, VDD5V 3.0-3.6V operation) VDD5V 4.5-5.5V operation) unless otherwise noted) Parameter Resolution Symbol INLopt Unit Note 0.352 Maximum error with respect best line fit. Verified optimum magnet placement, Tamb Maximum error with respect best line fit. Verified optimum magnet placement Tamb +125°C Best line (Errmax Errmin) Over displacement tolerance with diameter magnet, Tamb +125°C 10bit, missing codes sigma, fast mode (pin MODE sigma, slow mode (pin MODE=0 open) Integral non-linearity (optimum) Integral non-linearity (optimum) INLtemp Integral non-linearity* 0.176 0.06 0.03 Differential non-linearity* Transition noise* Power-on reset thresholds voltage; 300mV typ. hysteresis voltage; 300mV typ. hysteresis Power-up time, Until offset compensation finished, Angular Data valid System propagation delay absolute output delay Internal sampling rate absolute output: Voff 1,37 1.08 supply voltage 3.3V (VDD3V3) supply voltage 3.3V (VDD3V3) fast mode (pin MODE=1) slow mode (pin MODE=0 open) fast mode (pin MODE=1) slow mode (pin MODE=0 open) Tamb 25°C, slow mode (pin MODE=0 open) Tamb +125°C, slow mode (pin MODE=0 open) Tamb 25°C, fast mode (pin MODE Tamb +125°C, fast mode (pin MODE Max. clock frequency read serial data tPwrUp tdelay 2.48 2.35 2.61 2.61 10.42 10.42 2.74 2.87 10.94 11.46 fS,mode0 Internal sampling rate absolute output Read-out frequency digital interface 9.90 fS,mode1 9.38 www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Electrical Characteristics Figure Integral Differential Non-Linearity (exaggerated curve) 1023 10bit code Actual curve 1023 DNL+1LSB 0.35° Ideal curve 180° [degrees] Integral Non-Linearity (INL) maximum deviation between actual position indicated position. Differential Non-Linearity (DNL) maximum deviation step length from position next. Transition Noise (TN) repeatability indicated position. 19.6 Timing Characteristics Synchronous Serial Interface (SSI) (operating conditions: Tamb +125°C, VDD5V 3.0-3.6V operation) VDD5V 4.5-5.5V operation) unless otherwise noted) Parameter Data output activated (logic high) First data shifted output register Start data output Data output valid Data output tristate Pulse width Read-out frequency Symbol active tCLK valid tristate fCLK Unit Note Time between falling edge data output activated Time between falling edge first falling edge Rising edge shifts time Time between rising edge data output valid After last changes back "tristate" high; initiate read-out next angular position Clock frequency read serial data 19.7 Programming Conditions (operating conditions: Tamb +125°C, VDD5V 3.0-3.6V operation) VDD5V 4.5-5.5V operation) unless otherwise noted) Parameter Programming enable time Write data start Write data valid Symbol Prog enable Data Data valid Unit Note Write data rising edge CLKPROG Time between rising edge Prog rising edge www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Electrical Characteristics Parameter Load programming data Rise time VPROG before PROG Symbol Load PROG PrgR PrgH PROG PROG PROG finished PROG ProgOff PROG CLKAread Vprogrammed Vunprogrammed Unit Note Hold time VPROG after PROG During programming; clock cycles Programmed data available after next power-on Must switched after zapping Line must discharged this level During programming Analog readback mode VRef-VPROG during analog readback mode (see Write data programming PROG pulse width Hold time Vprog after programming Programming voltage Programming voltage level Programming current Analog read Programmed zener voltage (log.1) Unprogrammed zener voltage (log. www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Package Drawings Markings Package Drawings Markings Figure 16-Lead Shrink Small Outline Package SSOP-16 AYWWIZZ AS5043 Dimensions Symbol 1.73 0.05 1.68 0.25 0.09 6.07 7.65 0.65 0.63 0.75 0.95 Marking: AYWWIZZ inch 1.86 0.13 1.73 0.315 6.20 Pb-Free Identifier Last Digit Manufacturing Year Manufacturing Week Plant Identifier Traceability Code JEDEC Package Outline Standard: Thermal Resistance Rth(j-a): typ. still air, soldered IC's marked with white letters "ES" denote Engineering samples 1.99 0.21 1.78 0.38 0.20 6.33 5.38 .068 .002 .066 .010 .004 .239 .301 .205 .0256 .025 .073 .005 .068 .012 .244 .307 .209 .030 .078 .008 .070 .015 .008 .249 .311 .212 .037 Packing Options Delivery: Tape Reel reel 2000 devices) Tubes tubes devices) delivery tubes delivery tape reel Order AS5043ASSU Order AS5043ASST www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Recommended Footprint Recommended Footprint Recommended Footprint Data 9.02 6.16 0.46 0.65 5.01 inch 0.355 0.242 0.018 0.025 0.197 www.austriamicrosystems.com Revision 1.80 AS5043 Data Sheet Contact Information Copyrights Copyright 1997-2009, austriamicrosystems Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered rights reserved. material herein reproduced, adapted, merged, translated, stored, used without prior written consent copyright owner. products companies mentioned trademarks registered trademarks their respective companies. This product protected U.S. Patent 7,095,228. Disclaimer Devices sold austriamicrosystems covered warranty patent indemnification provisions appearing Term Sale. austriamicrosystems makes warranty, express, statutory, implied, description regarding information forth herein regarding freedom described devices from patent infringement. austriamicrosystems reserves right change specifications prices time without notice. Therefore, prior designing this product into system, necessary check with austriamicrosystems current information. This product intended normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, high reliability applications, such military, medical life-support lifesustaining equipment specifically recommended without additional processing austriamicrosystems each application. information furnished here austriamicrosystems believed correct accurate. However, austriamicrosystems shall liable recipient third party damages, including limited personal injury, property damage, loss profits, loss use, interruption business indirect, special, incidental consequential damages, kind, connection with arising furnishing, performance technical data herein. obligation liability recipient third party shall arise flow austriamicrosystems rendering technical other services. Contact Information Headquarters austriamicrosystems A-8141 Schloss Premstaetten, Austria Tel: 3136 Fax: 3136 Sales Offices, Distributors Representatives, please visit: www.austriamicrosystems.com Revision 1.80 Other recent searchesTSIL6400 - TSIL6400 TSIL6400 Datasheet TA49304 - TA49304 TA49304 Datasheet SN74AHC138 - SN74AHC138 SN74AHC138 Datasheet SN54AHC138 - SN54AHC138 SN54AHC138 Datasheet MA05701 - MA05701 MA05701 Datasheet IRFP23N50L - IRFP23N50L IRFP23N50L Datasheet HBC10 - HBC10 HBC10 Datasheet DZ23C2V7 - DZ23C2V7 DZ23C2V7 Datasheet DZ23C51 - DZ23C51 DZ23C51 Datasheet CY7C1021BV33 - CY7C1021BV33 CY7C1021BV33 Datasheet C805F - C805F C805F Datasheet
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