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AN-228


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PROGRAMMING TURBOCLOCK IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
APPLICATION NOTE AN-228
PROGRAMMING TURBOCLOCK IIIDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
technology demands high-performance design, distribution high-speed clock become difficult task system designers. TurboClock IIprovides design engineers with opportunities overcome many challenging issues clock skew, clock multiplication division. family offers 3.3V 2.5V products 32-pin TQFP 44-pin TQFP packages: IDT5V995 (3.3V, LVTTL outputs TQFP) IDT5V9950 (3.3V, LVTTL outputs TQFP) IDT5T995 (2.5V, LVTTL outputs TQFP) IDT5T9950 (2.5V, LVTTL outputs TQFP) IDT5T995A (2.5V, LVTTL outputs TQFP) IDT5T9950A (2.5V, LVTTL outputs TQFP)
APPLICATION NOTE AN-228
PROGRAMMING OUTPUT SKEW
outputs TurboClock organized four banks outputs each (nQ1, nQ0). Each output pair programmed with corresponding Function/Skew Select (nF1, nF0) inputs. inputs tied High, Low, left unconnected level internal resistor network will bias signal level 0.5VCC). These 3-level inputs allow total nine different output selections. datasheet, Skew Selection Table Output Pairs (reproduced Control Summary Table) shows list outputs from each pair when zero skew output used feedback. Note that output pair share same output characteristics. IDT5V995 IDT5T995/A, input passes through programmable divider before being feedback signal. division ratio this divider controlled DS[1:0] inputs, which tied high, tied low, left unconnected level.
Figure shows TurboClock block diagrams different product variants.
FIGURE TURBOCLOCK BLOCK DIAGRAMS
T5V995/A T5T995/A T5V9950 9950
/2001 Integrated Device Technology, Inc. DSC-5950/7
PROGRAMMING TURBOCLOCK IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
APPLICATION NOTE AN-228
first step programming determine frequency (FNOM) based input frequency, designed output frequencies. will always adjust align frequency phase with output divider. example, when undivided output used feedback, divider unity, will operate same frequency REF. divide-by-four output used feedback, divider also operates times frequency. Note that loop stability considerations impose restrictions combinations output divider values which permitted (refer DIVIDE SELECTION table page second step decide setting nF1:0 control inputs based frequency desired output skew. desired output skew will multiple Time Unit (tU) calculated from Programmable Skew Range Resolution Table.
flexibility TurboClock further enhanced using skewed output feedback. instance, feedback 3F1:0 (-2tU), output will have zero skew when 2F1:0 (-2tU) since actual output skew calculated from programmed output skew (-2tU) minus feedback skew (-2tU). 2F1:0 then actual output skew -2tU [-4tU- (-2tU)]. Output Configuration tables show possible output configurations (skew adjustment, frequency multiplication/ division) with different feedbacks. Tables through hold true output configurations first column tables skew feedback. Each output pair nine possible output combinations given FB(listed immediately right-hand side skew) setting different levels Function Select pairs (nF1:0).
CONTROL SUMMARY TABLE FEEDBACK SIGNALS
nF(1:0) Skew (Pair -4tU -3tU -2tU -1tU Zero Skew Skew (Pair Divide -6tU -4tU -2tU Zero Skew Divide Skew (Pair Divide -6tU -4tU -2tU Zero Skew Inverted
DIVIDE SELECTION TABLE
DS(1:0) Feedback Divide-by-n Permitted Divide-by-n Connected
PROGRAMMABLE SKEW RANGE RESOLUTION TABLE
Time Unit (tU) Frequency (FNOM) IDT5V995, IDT5V9950, IDT5T995A, IDT5T9950A IDT5T995 IDT5T9950 40MHz 80MHz 1/(32 FNOM) 50MHz 1/(16 FNOM) 100MHz HIGH 1/(8 FNOM)
PROGRAMMING TURBOCLOCK IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
APPLICATION NOTE AN-228
OBTAINING MAXIMUM FREQUENCY OPERATION IDT5T995 IDT5T9950
IDT5 T995 IDT5T9950
IDT5 T995 IDT5T9950
Figure Wiring Diagram Frequency Multiply with 3F[1:0] Figure demonstrates IDT5T995 IDT5T9950 configured getting output 160MHz. output programmed divide back This causes increase frequency until outputs locked 80MHz while 1Qx, outputs 160MHz. 1Qx, outputs skewed programming their select inputs accordingly (Refer Table more details.) Note that connected High fastest frequency output range. Also note that DS[1:0] applicable IDT5T9950. DS[1:0] divide-by-1 selection.
Figure Wiring Diagram Frequency Multiply four with 3F[1:0] Figure shows IDT5T995 IDT5T9950 configured getting output 160MHz. output programmed divide four back This causes increase frequency until outputs locked 40MHz while 1Qx, outputs 160MHz. 1Qx, outputs skewed programming their select inputs accordingly (Refer Table more details.) Note that connected High fastest frequency output range. Also note that DS[1:0] applicable IDT5T9950. DS[1:0] divide-by-1 selection.
13.33
26.67
13.33
26.67
IDT5T995
IDT5T995
TEST
Figure Wiring Diagram Frequency Multiply with 4F[1:0] DS[1:0] Figure illustrates IDT5T995 configured getting output 160MHz. input programmed divide six. With 26.67MHz input REF, will increase frequency until output divider also 26.67MHz. input output will then times 26.67MHz 160MHz. 1Qx, outputs skewed programming their select inputs accordingly (Refer Table more details.) Note that connected High fastest frequency output range.
Figure Wiring Diagram Frequency Multiply twelve with 1F[1:0] DS[1:0] Figure illustrates IDT5T995 configured getting output 160MHz. input programmed divide twelve. With 13.33MHz input REF, will increase frequency until output divider also 13.33MHz. input output will then twelve times 13.33MHz 160MHz. 2Qx, outputs skewed programming their select inputs accordingly (Refer Table more details.) Note that connected High fastest frequency output range.
PROGRAMMING TURBOCLOCK IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
APPLICATION NOTE AN-228
OBTAINING MAXIMUM FREQUENCY OPERATION IDT5V995, IDT5V9950, IDT5T995A, IDT5T9950A
IDT5 IDT5 IDT5
IDT5V9950 IDT5T99 IDT5 T9950A
Figure Wiring Diagram Frequency Multiply with 3F[1:0] Figure demonstrates IDT5V995, IDT5V9950, IDT5T995A, IDT5T9950A configured getting output 200MHz. output programmed divide back This causes increase frequency until outputs locked 100MHz while 1Qx, outputs 200MHz. 1Qx, outputs skewed programming their select inputs accordingly (Refer Table more details.) Note that connected High fastest frequency output range. Also note that DS[1:0] applicable IDT5V9950 IDT5T9950A. DS[1:0] divide-by-1 selection.
33.33 33.33
IDT5
Figure Wiring Diagram Frequency Multiply four with 3F[1:0] Figure shows IDT5V995, IDT5V9950, IDT5T995A, IDT5T9950A configured getting output 200MHz. output programmed divide four back This causes increase frequency until outputs locked 50MHz while 1Qx, outputs 200MHz. 1Qx, outputs skewed programming their select inputs accordingly (Refer Table more details.) Note that connected High fastest frequency output range. Also note that DS[1:0] applicable IDT5V9950 IDT5T9950A. DS[1:0] divide-by-1 selection.
16.67
16.67
5V995 IDT5 T995A TEST
Figure Wiring Diagram Frequency Multiply with 4F[1:0] DS[1:0] Figure illustrates IDT5V995 IDT5T995 configured getting output 200MHz. input programmed divide six. With 33.33MHz input REF, will increase frequency until output divider also 33.33MHz. input output will then times 33.33MHz 200MHz. 1Qx, outputs skewed programming their select inputs accordingly (Refer Table more details.) Note that connected High fastest frequency output range.
Figure Wiring Diagram Frequency Multiply twelve with 1F[1:0] DS[1:0] Figure illustrates IDT5V995 IDT5T995 configured getting output 200MHz. input programmed divide twelve. With 16.67MHz input REF, will increase frequency until output divider also 16.67MHz. input output will then twelve times 16.67MHz 200MHz. 2Qx, outputs skewed programming their select inputs accordingly (Refer Table more details.) Note that connected High fastest frequency output range.
PROGRAMMING TURBOCLOCK IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
APPLICATION NOTE AN-228
OBTAINING MINIMUM FREQUENCY OPERATION IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
minimum frequency 24MHz with product variants. corresponding input frequency will depend division ratios used output dividers. Note that low, minimum input frequency 2MHz, which limits maximum value combined output dividers frequency 24MHz. minimum output frequency 6MHz achieved 3Qx, with minimum frequency (24MHz with low) output divider (3F[1:0] HH).
OUTPUT CONFIGURATION TABLES
TABLE OUTPUT CONFIGURATIONS WITH DIFFERENT 2F(1:0)
1F(1:0) -1tU -2tU -3tU -4tU -5tU -6tU -7tU -8tU -1tU -2tU -3tU -4tU -5tU -6tU -7tU -1tU -2tU -3tU -4tU -5tU -6tU -1tU -2tU -3tU -4tU -5tU Output 2F(1:0) -1tU -2tU -3tU -4tU -1tU -2tU -3tU -1tU -2tU -1tU
NOTE: DS[1:0] IDT5V995 IDT5T995/A.
TABLE OUTPUT CONFIGURATIONS WITH DIFFERENT 3F(1:0)
1F(1:0) f/2+4tU f/2+3tU f/2+2tU f/2+1tU f/2+0tU f/2-1tU f/2-2tU f/2-3tU f/2-4tU -2tU -3tU -4tU -5tU -6tU -7tU -8tU -9tU -10tU -1tU -2tU -3tU -4tU -5tU -6tU -7tU -8tU -1tU -2tU -3tU -4tU -5tU -6tU Output 3F(1:0) -1tU -2tU -3tU -4tU -1tU -2tU 10tU f/4+4tU f/4+3tU f/4+2tU f/4+1tU f/4+0tU f/4-1tU f/4-2tU f/4-3tU f/4-4tU
NOTE: DS[1:0] IDT5V995 IDT5T995/A.
PROGRAMMING TURBOCLOCK IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
APPLICATION NOTE AN-228
TABLE OUTPUT CONFIGURATIONS WITH DIFFERENT 4F(1:0)
1F(1:0) f/2+4tU f/2+3tU f/2+2tU f/2+1tU f/2+0tU f/2-1tU f/2-2tU f/2-3tU f/2-4tU -2tU -3tU -4tU -5tU -6tU -7tU -8tU -9tU -10tU -1tU -2tU -3tU -4tU -5tU -6tU -7tU -8tU -1tU -2tU -3tU -4tU -5tU -6tU Output 4F(1:0) -1tU -2tU -3tU -4tU -1tU -2tU 10tU -f+4tU -f+3tU -f+2tU -f+1tU -f+0tU -f-1tU -f-2tU -f-3tU -f-4tU
NOTE: 1.DS[1:0] IDT5V995 IDT5T995/A.
TABLE 1Q/2Q OUTPUT CONFIGURATIONS WITH DIFFERENT 1F(1:0)/2F(1:0)
3F(1:0) 2*f-4tU -2tU -4tU -6tU -8tU -10tU 4*f-4tU 2*f-3tU -1tU -3tU -5tU -7tU -9tU 4*f-3tU 2*f-2tU -2tU -4tU -6tU -8tU 4*f-2tU 2*f-1tU -1tU -3tU -5tU -7tU 4*f-1tU Output 1F(1:0)/2F(1:0) 2*f+0tU -2tU -4tU -6tU 4*f+0tU 2*f+1tU -1tU -3tU -5tU 4*f+1tU 2*f+2tU -2tU -4tU 4*f+2tU 2*f+3tU -1tU -3tU 4*f+3tU 2*f+4tU 10tU -2tU 4*f+4tU
NOTE: 1.DS[1:0] IDT5V995 IDT5T995/A.
TABLE OUTPUT CONFIGURATIONS WITH DIFFERENT 4F(1:0)
3F(1:0)
NOTE: 1.DS[1:0] IDT5V995 IDT5T995/A.
Output 4F(1:0) f/2+6tU f/2+4tU f/2+2tU f/2+0tU f/2-2tU f/2-4tU f/2-6tU 2*f-6tU -2tU -4tU -6tU -8tU -10tU -12tU 4*f-6tU 2*f-4tU -2tU -4tU -6tU -8tU -10tU 4*f-4tU 2*f-2tU -2tU -4tU -6tU -8tU 4*f-2tU 2*f+0tU -2tU -4tU -6tU 4*f+0tU 2*f+2tU -2tU -4tU 4*f+2tU 2*f+4tU 10tU -2tU 4*f+4tU 2*f+6tU 12tU 10tU 4*f+6tU -2*f -f+6tU -f+4tU -f+2tU -f+0tU -f-2tU -f-4tU -f-6tU -4*f
PROGRAMMING TURBOCLOCK IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
APPLICATION NOTE AN-228
TABLE 1Q/2Q OUTPUT CONFIGURATIONS WITH DIFFERENT 1F(1:0)/2F(1:0)(1)
4F(1:0) -2*f-4tU -2tU -4tU -6tU -8tU -10tU -f-4tU 2*f-3tU -1tU -3tU -5tU -7tU -9tU -f-3tU 2*f-2tU -2tU -4tU -6tU -8tU -f-2tU Output 1F(1:0)/2F(1:0) 2*f-1tU -1tU -3tU -5tU -7tU -f-1tU 2*f+0tU -2tU -4tU -6tU -f+0tU 2*f+1tU -1tU -3tU -5tU -f+1tU 2*f+2tU -2tU -4tU -f+2tU 2*f+3tU -1tU -3tU -f+3tU 2*f+4tU 10tU -2tU -f+4tU
NOTE: 1.DS[1:0] IDT5V995 IDT5T995/A.
TABLE OUTPUT CONFIGURATIONS WITH DIFFERENT 3F(1:0)
4F(1:0)
NOTE: 1.DS[1:0] IDT5V995 IDT5T995/A.
Output 3F(1:0) f/2+6tU f/2+4tU f/2+2tU f/2+0tU f/2-2tU f/2-4tU f/2-6tU -f/2 2*f-6tU -2tU -4tU -6tU -8tU -10tU -12tU -f-6tU 2*f-4tU -2tU -4tU -6tU -8tU -10tU -f-4tU 2*f-2tU -2tU -4tU -6tU -8tU -f-2tU 2*f+0tU -2tU -4tU -6tU -f+0tU 2*f+2tU -2tU -4tU -f+2tU 2*f+4tU 10tU -2tU -f+4tU 2*f+6tU 12tU 10tU -f+6tU f/2+0tU f/4+6tU f/4+4tU f/4+2tU f/4+0tU f/4-2tU f/4-4tU f/4-6tU -f/4
TABLE DS(1:0) OUTPUT CONFIGURATIONS WITH DIFFERENT 3F(1:0) DIVIDE-BY-6
4F(1:0)
NOTE: 1.Not applicable IDT5V9950 IDT5T9950/A.
Output 3F(1:0) 6*f+0tU 3*f+6tU 3*f+4tU 3*f+2tU 3*f+0tU 3*f-2tU 3*f-4tU 3*f-6tU -3*f 12*f-6tU -6*f+0tU -6*f-2tU -6*f-4tU -6*f-6tU -6*f-8tU -6*f-10tU -6*f-12tU -6*f-6tU 12*f-4tU -6*f+2tU -6*f+0tU -6*f-2tU -6*f-4tU -6*f-6tU -6*f-8tU -6*f-10tU -6*f-4tU 12*f-2tU -6*f+4tU -6*f+2tU -6*f+0tU -6*f-2tU -6*f-4tU -6*f-6tU -6*f-8tU -6*f-2tU 12*f+0tU -6*f+6tU -6*f+4tU -6*f+2tU -6*f+0tU -6*f-2tU -6*f-4tU -6*f-6tU -6*f+0tU 12*f+2tU -6*f+8tU -6*f+6tU -6*f+4tU -6*f+2tU -6*f+0tU -6*f-2tU -6*f-4tU -6*f+2tU 12*f+4tU -6*f+10tU -6*f+8tU -6*f+6tU -6*f+4tU -6*f+2tU -6*f+0tU -6*f-2tU -6*f+4tU 12*f+6tU -6*f+12tU -6*f+10tU -6*f+8tU -6*f+6tU -6*f+4tU -6*f+2tU -6*f+0tU -6*f+6tU 3*f/2+6tU 3*f/2+4tU 3*f/2+2tU 3*f/2+0tU 3*f/2-2tU 3*f/2-4tU 3*f/2-6tU -3*f/2
PROGRAMMING TURBOCLOCK IDT5V995, IDT5V9950, IDT5T995/A, IDT5T9950/A
APPLICATION NOTE AN-228
TABLE 1Q/2Q; DS(1:0) OUTPUT CONFIGURATIONS WITH DIFFERENT 3F(1:0) DIVIDE-BY-12
1F(1:0)/2F(1:0)
NOTE: 1.Not applicable IDT5V9950 IDT5T9950/A.
Output 3F(1:0) 6*f+4tU 6*f+3tU 6*f+2tU 6*f+1tU 6*f+0tU 6*f-1tU 6*f-2tU 6*f-3tU 6*f-4tU 12*f-2tU 12*f-3tU 12*f-4tU 12*f-5tU 12*f-6tU 12*f-7tU 12*f-8tU 12*f-9tU 12*f-10tU 12*f+0tU 12*f-1tU 12*f-2tU 12*f-3tU 12*f-4tU 12*f-5tU 12*f-6tU 12*f-7tU 12*f-8tU 12*f+2tU 12*f+1tU 12*f+0tU 12*f-1tU 12*f-2tU 12*f-3tU 12*f-4tU 12*f-5tU 12*f-6tU 12*f+4tU 12*f+3tU 12*f+2tU 12*f+1tU 12*f+0tU 12*f-1tU 12*f-2tU 12*f-3tU 12*f-4tU 12*f+6tU 12*f+5tU 12*f+4tU 12*f+3tU 12*f+2tU 12*f+1tU 12*f+0tU 12*f-1tU 12*f-2tU 12*f+8tU 12*f+7tU 12*f+6tU 12*f+5tU 12*f+4tU 12*f+3tU 12*f+2tU 12*f+1tU 12*f+0tU 12*f+10tU 12*f+9tU 12*f+8tU 12*f+7tU 12*f+6tU 12*f+5tU 12*f+4tU 12*f+3tU 12*f+2tU 3*f+4tu 3*f+3tu 3*f+2tu 3*f+1tu 3*f+0tu 3*f-1tu 3*f-2tu 3*f-3tu 3*f-4tu
TABLE DS(1:0) 1Q/2Q OUTPUT CONFIGURATIONS WITH DIFFERENT 1F(1:0)/2F(1:0) DIVIDE-BY-4
4F(1:0)
NOTE: 1.Not applicable IDT5V9950 IDT5T9950/A.
Output 3F(1:0) 8*f-4tU 4*f+2tU 4*f+0tU 4*f-2tU 4*f-4tU 4*f-6tU 4*f-8tU 4*f-10tU 4*f-4tU 8*f-3tU 4*f+3tU 4*f+1tU 4*f-1tU 4*f-3tU 4*f-5tU 4*f-7tU 4*f-9tU 4*f-3tU 8*f-2tU 4*f+4tU 4*f+2tU 4*f+0tU 4*f-2tU 4*f-4tU 4*f-6tU 4*f-8tU 4*f-2tU 8*f-1tU 4*f+5tU 4*f+3tU 4*f+1tU 4*f-1tU 4*f-3tU 4*f-5tU 4*f-7tU 4*f-1tU 8*f+0tU 4*f+6tU 4*f+4tU 4*f+2tU 4*f+0tU 4*f-2tU 4*f-4tU 4*f-6tU 4*f+0tU 8*f+1tU 4*f+7tU 4*f+5tU 4*f+3tU 4*f+1tU 4*f-1tU 4*f-3tU 4*f-5tU 4*f+1tU 8*f+2tU 4*f+8tU 4*f+6tU 4*f+4tU 4*f+2tU 4*f+0tU 4*f-2tU 4*f-4tU 4*f+2tU 8*f+3tU 4*f+9tU 4*f+7tU 4*f+5tU 4*f+3tU 4*f+1tU 4*f-1tU 4*f-3tU 4*f+3tU 8*f+4tU 4*f+10tU 4*f+8tU 4*f+6tU 4*f+4tU 4*f+2tU 4*f+0tU 4*f-2tU 4*f+4tU
CONCLUSION
With flexible, programmable skew capability, TurboClock ideally suited variety applications. With added feature divider IDT5V995 IDT5T995/A, designers have many more possible solutions than ever before. designers then select solution that best meets their requirements. addition, IBIS Hspice models available cost system simulation purposes.
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