A3959SLB
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A3959SLB (SOIC)
PHASE ROSC GROUND GROUND LOGIC SUPPLY ENABLE PFD2 BLANK PFD1
DMOS FULL-BRIDGE MOTOR DRIVER
CHARGE PUMP
VREG SLEEP CONNECTION OUTB LOAD SUPPLY GROUND GROUND SENSE OUTA CONNECTION MODE
Designed pulse-width modulated (PWM) current control motors, A3959SB, A3959SLB, A3959SLP capable output currents operating voltages Internal fixed off-time current-control timing circuitry adjusted control inputs operate slow, fast, mixed current-decay modes. PHASE ENABLE input terminals provided controlling speed direction motor with externally applied PWM-control signals. Internal synchronous rectification control circuitry provided reduce power dissipation during operation. Internal circuit protection includes thermal shutdown with hysteresis, undervoltage monitoring supply charge pump, crossover-current protection. Special power-up sequencing required. A3959SB/SLB/SLP choice three power packages, 24-pin plastic with copper batwing (package suffix `B'), 24-lead plastic SOIC with copper batwing (package suffix `LB'), thin (<1.2 28-lead plastic TSSOP with exposed thermal (suffix `LP'). cases, power ground potential needs electrical isolation.
LOGIC
TIMER
Dwg. PP-069-4
Note that A3959SLB(SOIC), A3959SB (DIP), A3959SLP (TSSOP) share common terminal assignment.
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, Output Current, IOUT (Repetitive) ±3.0 (Peak, ±6.0 Logic Supply Voltage, Logic Input Voltage Range, (Continuous) -0.3 -1.0 Sense Voltage, (Continuous) Reference Voltage, VREF Package Power Dissipation 25°C), A3959SB A3959SLB A3959SLP Operating Temp. Range, -20°C +85°C Junction Temperature, +150°C Storage Temp. Range, -55°C +150°C Output current rating limited duty cycle, ambient temperature, heat sinking. Under conditions, exceed specified current rating junction temperature 150°C.
FEATURES
Output Rating rDS(on) Outputs (270 Typical) Mixed, Fast, Slow Current-Decay Modes Synchronous Rectification Power Dissipation Internal UVLO Thermal-Shutdown Circuitry Crossover-Current Protection Internal Oscillator Digital Timing
Always order complete part number:
Part Number A3959SB A3959SLB A3959SLP Package 24-pin batwing 24-lead batwing SOIC 28-lead thin shrink SOIC RJA* 38°C/W 50°C/W 40°C/W 6°C/W 6°C/W
Double-sided board, square inch copper each side. also, Layout, page
3959 DMOS FULL-BRIDGE MOTOR DRIVER
FUNCTIONAL BLOCK DIAGRAM
LOGIC SUPPLY
CHARGE PUMP BANDGAP CREG
LOAD SUPPLY BANDGAP REGULATOR VREG
UNDERVOLTAGE FAULT DETECT
CHARGE PUMP
SLEEP MODE PHASE ENABLE CONTROL LOGIC
GATE DRIVE
OUTA
OUTB SENSE
ZERO CURRENT DETECT
BLANK PFD1 PFD2 ROSC
CURRENT SENSE
TIMER
REFERENCE BUFFER
VREF
Dwg. FP-048-2A
PHASE ROSC GROUND GROUND GROUND GROUND LOGIC SUPPLY ENABLE PFD2 BLANK
CHARGE PUMP
VREG SLEEP OUTB LOAD SUPPLY GROUND GROUND SENSE OUTA MODE PFD1
Dwg. PP-069-5A
A3959SB (DIP)
Note that A3959SLB (SOIC), A3959SB (DIP), A3959SLP (TSSOP) share common terminal assignment.
LOGIC
TIMER
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright 2001, 2003 Allegro MicroSystems, Inc.
3959 DMOS FULL-BRIDGE MOTOR DRIVER
ELECTRICAL CHARACTERISTICS +25°C, VSENSE fPWM (unless noted otherwise)
Limits Characteristics Output Drivers Load Supply Voltage Range Output Leakage Current Output Resistance Crossover Delay Body Diode Forward Voltage Load Supply Current Source diode, Sink diode, fPWM Charge pump outputs disabled Sleep Mode Control Logic Logic Supply Voltage Range Logic Input Voltage Logic Input Current (all inputs except ENABLE) ENABLE Input Current Internal frequency Reference Input Volt. Range Reference Input Current Comparator Input Offset Volt. VIN(1) VIN(0) IIN(1) IIN(0) IIN(1) IIN(0) fOSC VREF IREF ROSC shorted GROUND ROSC Operating VREF VREF Operating 3.25 3.65 <1.0 <-2.0 4.25 4.25 ±5.0 5.25 4.85 ±1.0 IDSS rDS(on) Operating During sleep mode VOUT VOUT Source driver, IOUT Sink driver, IOUT <1.0 <-1.0 1000 Symbol Test Conditions Min. Typ. Max. Units
Continued next page
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3959 DMOS FULL-BRIDGE MOTOR DRIVER
ELECTRICAL CHARACTERISTICS +25°C, VSENSE fPWM (unless noted otherwise), continued.
Limits Characteristics Control Logic Reference Divider Ratio Error (Note Propagation Delay Times VREF VREF Eout: change source change source change sink change sink Increasing fPWM Sleep Mode 3.90 0.05 0.10 ±4.0 1200 1200 4.45 Symbol Test Conditions Min. Typ. Max. Units
Thermal Shutdown Temp. Thermal Shutdown Hysteresis UVLO Enable Threshold UVLO Hysteresis Logic Supply Current
UVLO UVLO
NOTES: Typical Data design information only. Negative current defined coming (sourcing) specified device terminal. error ([VREF/10] VSENSE)/(VREF/10) where VSENSE
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
3959 DMOS FULL-BRIDGE MOTOR DRIVER
FUNCTIONAL DESCRIPTION
VREG. This internally generated voltage used operate sink-side DMOS outputs. VREG terminal should decoupled with 0.22 capacitor ground. VREG internally monitored case fault condition, outputs device disabled. Charge Pump. charge pump used generate gate-supply voltage greater than drive sourceside DMOS gates. 0.22 ceramic capacitor should connected between pumping purposes. 0.22 ceramic capacitor should connected between reservoir operate high-side DMOS devices. voltage internally monitored and, case fault condition, source outputs device disabled. PHASE Logic. PHASE input terminal determines device operating "forward" "reverse" state. PHASE OUTA High OUTB High MODE Logic. When using external current control, MODE input determines current path during chopped cycle. With MODE low, fast decay mode, opposite pair selected outputs will enabled during cycle. With MODE high, slow decay mode, both sink drivers with ENABLE low. MODE Decay Fast Slow
Current Regulation. Load current regulated internal fixed off-time control circuit. When outputs DMOS bridge turned current increases motor winding until reaches trip value determined external sense resistor (RS) applied analog reference voltage (VREF): ITRIP VREF/10RS trip point, sense comparator resets sourceenable latch, turning source driver. load inductance then causes current recirculate fixed off-time period. current path during recirculation determined configuration slow/ mixed/fast current-decay mode PFD1 PFD2. Oscillator. timer based internal oscillator resistor connected from ROSC terminal VDD. Typical value with resistor. allowable range resistor from fOSC 109/ROSC. ROSC pulled VDD, must shorted ground. Fixed Time. A3959 fixed time cycles internal oscillator, typically with oscillator.
ENABLE Logic. ENABLE input terminal allows external PWM. ENABLE high turns selected sinksource pair. ENABLE switches source driver source sink driver, depending MODE, load current decays. ENABLE kept high, current will rise until reaches level internal current-control circuit. ENABLE Outputs Chopped
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3959 DMOS FULL-BRIDGE MOTOR DRIVER
FUNCTIONAL DESCRIPTION (continued)
Internal Current-Control Mode. Inputs PFD1 PFD2 determine current-decay method after overcurrent event detected SENSE input. slow-decay mode, both sink drivers turned fixed off-time period. Mixed-decay mode starts fast-decay mode portion (15% 48%) fixed time, then followed slow decay remainder period. PFD2 PFD1 toff Decay Slow Mixed Mixed Fast Synchronous Rectification. When cycle triggered, either ENABLE chop command internal fixed off-time cycle, load current will recirculate according decay mode selected control logic. A3959 synchronous rectification feature will turn appropriate pair DMOS outputs during current decay effectively short body diodes with rDS(on) driver. This will reduce power dissipation significantly eliminate need external Schottky diodes. Synchronous rectification will prevent reversal load current turning outputs when zero-current level detected. Shutdown. event fault (excessive junction temperature, voltage VREG) outputs device disabled until fault condition removed. power event VDD, UVLO circuit disables drivers. Braking. braking function implemented driving device slow-decay mode EXTMODE applying enable chop command. Because possible drive current either direction through DMOS drivers, this configuration effectively shorts motor-generated BEMF long ENABLE chop mode asserted. important note that internal current-control circuit will limit current when braking, because current does flow through sense resistor. maximum brake current approximated VBEMF/RL. Care should taken ensure that maximum ratings device exceeded worst-case braking situations high speed high inertial loads. SLEEP Logic. SLEEP input terminal used minimize power consumption when when use. This disables much internal circuitry including regulator charge pump. Logic will device into sleep mode, logic high will allow normal operation.
Blank Timer. When source driver turns current spike occurs reverse-recovery currents clamp diodes and/or switching transients related distributed capacitance load. prevent this current spike from erroneously resetting source-enable latch, sense comparator blanked. blank timer runs after off-time counter provide blanking function. blank timer reset when ENABLE chopped PHASE changed. external control, PHASE change ENABLE will trigger blanking function. duration determined BLANK input oscilator. BLANK tblank 6/fosc 12/fosc
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
3959 DMOS FULL-BRIDGE MOTOR DRIVER
FUNCTIONAL DESCRIPTION (continued)
Current Sensing. minimize inaccuracies sensing ITRIP current level, which caused ground trace drops, sense resistor should have independent ground return ground terminal device. low-value sense resistors drops sense resistor's traces significant should taken into account. sockets should avoided they introduce variation their contact resistance. maximum value given 0.5/ITRIP where ITRIP Thermal Protection. Circuitry turns drivers when junction temperature reaches 165°C typically. intended only protect device from failures excessive junction temperatures should imply that output short circuits permitted. Thermal shutdown hysteresis approximately 15°C.
SUFFIX 'B', 26°C/W SUFFIX 'LP', 28°C/W SUFFIX 'LB', 35°C/W MULTI-LAYER HIGH-K BOARD
Layout. star ground system located close driver recommended. printed wiring board should heavy ground plane. optimum electrical thermal performance*, driver should soldered directly onto board. ground side should have individual path ground terminals device. This path should short possible physically should have other components connected recommended that capacitor placed between SENSE ground close device possible; load supply terminal, VBB, should decoupled with electrolytic capacitor recommended) placed close device possible. 28-lead TSSOP package, copper ground plane located under exposed thermal typically used star ground.
ALLOWABLE PACKAGE POWER DISSIPATION WATTS
thermal resistance, RJA, absolute maximum allowable package power dissipation specified page measured typical two-sided with square inch copper ground area each side. With minimal copper single-sided (worst-case), package 40°C/W, `LB' 77°C/W, `LP' 80°C/W. also, Application Note 29501.5, Improving Batwing Power Dissipation. specification purposes, multi-layer high-K board performance graphed here JEDEC Standard JESD51.
products described here manufactured under more U.S. patents U.S. patents pending. Allegro MicroSystems, Inc. reserves right make, from time time, such departures from detail specifications required permit improvements performance, reliability, manufacturability products. Before placing order, user cautioned verify that information being relied upon current.
SUFFIX 'B', 38°C/W
SUFFIX 'LP', 40°C/W SUFFIX 'LB', 50°C/W DOUBLE-SIDED BOARD, COPPER SIDE
TEMPERATURE
Dwg. GP-049-6
Allegro products authorized critical components life-support devices systems without express written approval. information included herein believed accurate reliable. However, Allegro MicroSystems, Inc. assumes responsibility use; infringement patents other rights third parties which result from use.
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3959 DMOS FULL-BRIDGE MOTOR DRIVER
Terminal List
Terminal Name PHASE ROSC GROUND LOGIC SUPPLY ENABLE PFD2 BLANK PFD1 MODE CONNECT OUTA SENSE GROUND LOAD SUPPLY OUTB CONNECT SLEEP VREG GROUND Terminal Description Reservoir capacitor (typically 0.22 charge pump capacitor (typically 0.22 (internal) connection Logic input direction control Oscillator resistor Grounds VDD, voltage (typically supply Logic input enable control (internal) connection Logic-level input fast decay Logic-level input blanking control Logic-level input fast decay VREF, load current reference input voltage Logic input mode control (Internal) connection DMOS bridge outputs motor (internal) connection Sense resistor (internal) connection Grounds VBB, high-current, motor supply DMOS bridge outputs motor (Internal) connection Logic-level Input sleep operation Regulator decoupling capacitor (typically 0.22 Ground (SOIC) (DIP) (TSSOP)
A3959SB (DIP) only, there indeterminate resistance between substrate grounds (pins grounds pins Pins must connected together externally. A3959SLP (TSSOP) grounds terminals should connected together exposed beneath device.
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
3959 DMOS FULL-BRIDGE MOTOR DRIVER
A3959SB
Dimensions Inches (controlling dimensions)
0.014 0.008
NOTE
0.430 0.280 0.240
0.300
0.070 0.045
1.280 1.230
0.100
0.005
0.210
0.015
0.150 0.115 0.022 0.014
Dwg. MA-001-25A
Dimensions Millimeters (for reference only)
NOTE
0.355 0.204
10.92 7.11 6.10
7.62
1.77 1.15
32.51 31.24
2.54
0.13
5.33
0.39
3.81 2.93 0.558 0.356
Dwg. MA-001-25A
NOTES:
Webbed lead frame. Leads internally piece. Exact body lead configuration vendor's option within limits shown. Lead spacing tolerance non-cumulative. Lead thickness measured seating plane below. Supplied standard sticks/tubes devices.
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3959 DMOS FULL-BRIDGE MOTOR DRIVER
A3959SLB
Dimensions Inches (for reference only)
0.0125 0.0091
0.2992 0.2914
0.419 0.394 0.050 0.016
0.020 0.013
0.6141 0.5985
0.050
NOTE NOTE
0.0926 0.1043 0.0040 MIN.
Dwg. MA-008-25A
Dimensions Millimeters (controlling dimensions)
0.32 0.23
7.60 7.40
10.65 10.00 1.27 0.40
0.51 0.33
15.60 15.20
1.27
NOTE NOTE
2.65 2.35 0.10 MIN.
NOTES:
Dwg. MA-008-25A
Exact body lead configuration vendor's option within limits shown. Lead spacing tolerance non-cumulative. Webbed lead frame. Leads internally piece. Supplied standard sticks/tubes devices "TR" part number tape reel.
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
3959 DMOS FULL-BRIDGE MOTOR DRIVER
A3959SLP
0.130
0.0394
0.177 0.169
INDEX AREA
0.0591
GAUGE PLANE SEATING PLANE
0.0098
0.012 0.0075
0.386 0.378
0.026
0.030 0.018
Dimensions Inches (for reference only)
0.260 0.244 0.0472
0.0079 0.0035 0.0059 0.00
EXPOSED THERMAL
Dwg. MA-008-30
3.30
1.00
4.50 4.30
INDEX AREA
1.50
GAUGE PLANE SEATING PLANE
0.25
0.30 0.19
9.80 9.60
0.65
0.75 0.45
Dimensions Millimeters (controlling dimensions)
6.60 6.20
1.20
0.20 0.09 0.15 0.00
EXPOSED THERMAL
Dwg. MA-008-30
NOTES:
Exact body lead configuration vendor's option within limits shown. Lead spacing tolerance non-cumulative. Supplied standard sticks/tubes devices "TR" part number tape reel. Dimensions meet JEDEC MO-153AET. However, thermal A3959SLP approximately (0.12" 0.20").
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3959 DMOS FULL-BRIDGE MOTOR DRIVER
MOTOR DRIVERS
Output Ratings* Part Number INTEGRATED CIRCUITS BRUSHLESS MOTORS 3-Phase Power MOSFET Controller 3933 3-Phase Power MOSFET Controller 3935 3-Phase Power MOSFET Controller 3932 3938 3-Phase Back-EMF Controller/Driver ±900 8904 3-Phase Current-Controlled DMOS Driver ±3.0 3936 INTEGRATED BRIDGE DRIVERS BIPOLAR STEPPER MOTORS Current-Controlled Dual Full Bridge ±500 3965 Dual Full Bridge with Protection Diagnostics ±500 3976 Current-Controlled Dual Full Bridge ±650 3966 Current-Controlled Dual Full Bridge ±650 3968 Microstepping Translator/Dual Full Bridge ±750 3967 Current-Controlled Dual Full Bridge ±750 2916 Current-Controlled Dual Full Bridge ±750 2919 Current-Controlled Dual Full Bridge ±750 6219 Current-Controlled Dual Full Bridge ±800 3964 Current-Controlled Dual DMOS Full Bridge ±1.0 3973 Current-Controlled Full Bridge ±1.3 3953 Current-Controlled Dual Full Bridge ±1.5 2917 Current-Controlled DMOS Full Bridge ±1.5 3948 Current-Controlled Microstepping Full Bridge ±1.5 3955 Current-Controlled Microstepping Full Bridge ±1.5 3957 Current-Controlled Dual DMOS Full Bridge ±1.5 3972 Current-Controlled Dual DMOS Full Bridge ±1.5 3974 Current-Controlled Full Bridge ±2.0 3952 Current-Controlled DMOS Full Bridge ±2.0 3958 Microstepping Translator/Dual DMOS Full Bridge ±2.5 3977 Current-Controlled DMOS Full Bridge ±3.0 3959 UNIPOLAR STEPPER MOTOR OTHER DRIVERS Unipolar Stepper-Motor Translator/Driver 1.25 5804 Unipolar Stepper-Motor Quad Drivers 7024 7029 Unipolar Microstepper-Motor Quad Driver 7042 Unipolar Stepper-Motor Quad Driver 2540 Unipolar Stepper-Motor Translator/Driver 7051 Unipolar Stepper-Motor Quad Driver 7026 Unipolar Microstepper-Motor Quad Driver 7044 Current maximum specified test condition, voltage maximum rating. specification sustaining voltage limits over-current protection voltage limits. Negative current defined coming (sourcing) output. Complete part number includes additional characters indicate operating temperature range package style. Also, 3175, 3177, 3235, 3275 Hall-effect sensors with brushless motors. Function
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
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