CXP88616 88624

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CXP88616 - CXP88616
88624 - 88624

CXP88616/88624
Description CXP88616/88624 CMOS 8-bit microcomputer which consists converter, serial interface, timer/counter, time base timer, high precision timing pattern generation circuits, output, VISS/ VASS circuit, remote control receiving circuit, VSYNC separator measurement circuit which measure signals capstan amplifier drum FG/PG amplifier other servo systems, well basic configurations like 8-bit CPU, ROM, port. They integrated into single chip. Also, CXP88616/88624 provides sleep/stop function which enables lower power consumption. (Plastic)
Structure Silicon gate CMOS
Features wide instruction (213 instructions) which cover various types data 16-bit arithmetic/multiplication division/boolean operation instructions Minimum instruction cycle 250ns 16MHz operation Incorporated capacity bytes (CXP88616) bytes (CXP88624) Incorporated capacity bytes (including RAM) Peripheral function converter bits, channels, successive approximation system (Conversion time 20µs/16MHz) Serial interface Incorporated 8-bit, 8-stage FIFO data (Auto transfer bytes), channel Timer 8-bit timer/counter, channels 19-bit time base timer High precision timing pattern generation pins 32-stage programmable circuit pins, channel 5-bit, 8-satge FIFO (RECCTL control), 1channel PWM/DA gate output bits, channels (Repetitive frequency 62.5kHz/16MHz) gate pulse output, bits, channels Analog signal input circuit Capstan amplifier circuit Drum amplifier circuit Drum amplifier circuit PBCTL amplifier circuit write/rewrite circuit Recording current control circuit Servo input control Capstan Drum FG/PG, input VSYNC separator capture unit Incorporated 26-bit 8-stage FIFO VISS/VASS circuit Pulse duty auto detection circuit 32kHz timer/event counter 32kHz oscillation circuit, ultra-low speed instruction mode Remote control reception circuit 8-bit pulse measurement counter, 6-stage FIFO Tri-state output pin, output pins Pseudo HSYNC output function High speed head switching circuit Interruption factors, vectors, multi-interruption possible Standby mode SLEEP/STOP Package 100-pin plastic Piggyback/evaluation chip CXP88800 100-pin ceramic
Sony reserves right change products specifications without prior notice. This information does convey license implication otherwise under patents other right. Application circuits shown, any, typical examples illustrating operation devices. Sony cannot assume responsibility problems arising these circuits.
E96108-ST
Block Diagram
XTAL INT2 INT0 EXTAL
AVREF
AVDD
AVss
SPC700 CORE
PORT
CLOCK GENERATOR/ SYSTEM CONTROL
FIFO 16K/24K BYTES BYTES
PORT
SERIAL INTERFACE UNIT (CH0)
SCK0
PORT
TIMER/COUNTER1
INTERRUPT CONTROLLER
SELECT
TIMER/COUNTER
PORT
AN13
CONVERTER
INT1/NMI
SYNC
SYNC SEPARATOR
PORT PORT
PE0,
EXI0 EXI1 PRESCALER/ TIME BASE TIMER CAPTURE UNIT FIFO
CTLAMP
GAIN CONTROL
SERVO INPUT CONTROL
REMOCON INPUT
FIFO
PORT
PULSE WIDTH COUNTER
PORT
PWM0 DAA0
REALTIME PULSE GENERATOR FIFO
PWM1 DAA1
GENERATOR
PROGRAMABLE PATTERN GENERATOR
PSEUDO HSYNC GENERATOR
RECCTL CTLCIN
CONTROL
AMPVDD
AMPVSS
PPO0 PPO18
RTO3 RTO7
PORT
PG0,
VISS/VASS
GENERATOR
CXP88616/88624
CXP88616/88624
Assignment (Top View)
PA0/PPO0/HGO
PB6/PPO14
PB7/PPO15
PA1/PPO1
PA4/PPO4
PA5/PPO5
PA6/PPO6
PA7/PPO7
PE3/SYNC
PA2/PPO2
PA3/PPO3
PB5/PPO13 PB4/PPO12 PB3/PPO11 PB2/PPO10 PB1/PPO9 PB0/PPO8 PC7/RTO7 PC6/RTO6 PC5/RTO5 PC4/RTO4 PC3/RTO3 PC2/PPO18 PC1/PPO17 PC0/PPO16 PI1/EC/INT2 PI0/INT0/ENV-DET PD7/SI0 PD6/SO0 PD5/SCK0 PD4/CS0 PD3/TO/DDO/ADJ/SRVO PD1/RMC PD0/INT1/NMI PE5/EXI1 PE6/PWM0/DAA0 PE7/PWM1/DAA1 VREFOUT AMPVSS CTLSAMPI CTLFAMPO CTLAG CTLAMP CTLAMP CTLCIN CTLCIN RECCTL RECCTL AMPVDD RECCAP AN0/ANOUT PF0/AN4 PF1/AN5 AVDD AVREF AVSS PF2/AN6
Note) (Pin always connected VDD. (Pins left open. (Pins both connected (Pins both connected GND. (Pin must connected GND.
PG1/AN13
PG0/AN12
PF7/AN11
PF6/AN10
PF5/AN9
PF4/AN8
PF3/AN7
EXTAL
XTAL
PE4/EXI0
CXP88616/88624
Description Symbol PA0/PPO0 /HGO PA1/PPO1 PA7/PPO7 Output/Real-time output/Output Output/ Real-time output (Port 8-bit output port. Data gated with contents OR-gate they output. pins) (Port 8-bit output port. Data gated with contents OR-gate they output. Tri-state control possible. pins) (Port 8-bit output port. unit single bits. Data gated with contents OR-gate they output. pins) Description Pseudo HSYNC output pin.
PB0/PPO8 PB7/PPO15
Output/ Real-time output
Programmable pattern generator (PPG) output. Functions high precision realtime pulse output port. pins) tri-state controlled with PPG.
PC0/PPO16 PC2/PPO18 PC3/RTO3 PC7/RTO7 PD0/INT1/ PD1/RMC DDO/SRVO PD4/CS0 PD5/SCK0 PD6/SO0 PD7/SI0 PE3/SYNC PE4/EXI0 PE5/EXI1 PE6/PWM0/ DAA0 PE7/PWM1/ DAA1
I/O/ Real-time output
I/O/ Real-time output
Real-time pulse generator (RTG) output. Functions high precision real-time pulse output port. pins) Input request external interruption non-maskable interruption. Remote control receiving circuit input pin.
I/O/Input/Input I/O/Input I/O/Output/Output/ (Port Output 8-bit output port. unit single bits. I/O/Input pins) I/O/I/O I/O/Output I/O/Input Output Output Input Input/Input Input/Input Input/Input Output/Output Output/Output
Timer/counter, duty detector servo amplifier output pin. Serial chip select (CH0) input pin. Serial clock (CH0) pin. Serial data (CH0) output pin. Serial data (CH0) input pin.
(Port Composite sync signal input pin. 8-bit port. Bits External input capture unit. inputs; bits pins) outputs. pins) output pin. pins) gate pulse output pin. pins)
CXP88616/88624
Description AN0/ANOUT PF0/AN4 PF3/AN7 PF4/AN8 PF7/AN11 PG0/AN12 PG1/AN13
Input/Output Input Input/Input
Description Analog circuit internal waveform output pin.
Output/Input
(Port Lower bits inputs; upper bits outputs. Lower bits standby release input pins. pins) (Port 2-bit input port. pins)
Analog input converter. pins)
Input/Input
Output
(Port 8-bit output port; N-ch open drain output medium drive voltage (12V) large current (12mA). pins) (Port 8-bit port. unit single bits. Function standby release input unit single bits. pins) Input request Trigger pulse input external interruption. head Active when falling switching. edge. Input request External event input external interruption. timer/counter. Active when falling edge.
PI0/INT0/ ENV-DET
I/O/Input
PI1/EC/ INT2 RECCTL RECCTL CTLCIN CTLCIN CTLAMP CTLAMP CTLFAMPO CTLSAMPI RECCAP VREFOUT CTLAG AMPVSS AMPVDD
I/O/Input/Input
Input Input Input Output Input Output Input Output Output Capstan input pin. Drum input pin. Drum input pin. RECCTL signal output pin. pins) PBCTL signal input pin. pins)
Connected RECCTL RECCTL with internal switch playback. pins) Input PBCTL signal with capacitor coupled. pins) PBCTL signal amplifier output. PBCTL signal amplifier input. Capacitor connecting slope setting writing trapezoidal wave. Capacitor connecting VREF level smoothing DPG, CFG. Capacitor connecting AGND smoothing. Analog signal input circuit pin. Analog signal input circuit power supply pin.
CXP88616/88624
Symbol EXTAL XTAL AVDD AVREF AVSS Input Input Input Output Input
Description Connecting crystal oscillator system clock. When supplying external clock, input EXTAL input opposite phase clock XTAL pin. System reset pin; level active. pin. Connect leave Pins open. Test mode input pin. Always connect GND. Positive power supply converter. Reference voltage input converter. converter. Positive power supply pin. pin. Connect both pins GND.
CXP88616/88624
Input/Output Circuit Formats Pins Port Circuit format When reset
PA0/PPO0/
Data
HOUT PPO0
Hi-Z
(Port
HSEL HOUTE
Output becomes active from high impedance data writing port. PPO1 control status register Tri-state control selection PPO1
PA1/PPO1
Data
Hi-Z
(Port Output becomes active from high impedance data writing port.
Port
data
PA2/PPO2 PA7/PPO7
Data
Port data
Hi-Z
(Port
pins Port
data
Output becomes active from high impedance data writing port.
PB0/PPO8 PB7/PPO15
Port data Data (Port Port tri-state control
Hi-Z
pins
CXP88616/88624
Port PC0/PPO16 PC2/PPO18 PC3/RTO3 PC7/RTO7
PPO, data Port data
Circuit format
When reset
Input protection circuit Port direction Data (Port
Hi-Z
pins
(Port direction)
Port
Port data
PD0/INT1/ PD1/RMC PD4/CS0 PD7/SI0
Port direction (Port PD1.Remote control circuit PD0.Interruption circuit PD4, 7.Serial Schmitt input
Hi-Z
Data
pins
Port
Port data
Port direction (Port
Hi-Z
Data
Port
Port function select
PD3.
PD3/TO/ DDO/SRVO
Timer/counter, duty detection circuit, 32kHz timer, amplifier circuit Port data Port direction
Hi-Z
Data
pins
(Port
CXP88616/88624
Port
Port function select
Circuit format
When reset
PD5/SCK0 PD6/SO0
Port data
Hi-Z
Note) schmitt input inverter input
Port direction
Data
pins Port
(Port
Port data
Hi-Z
Data (Port Hi-Z control
pins Port
Schmitt input
(Port Data
Hi-Z
Port
Schmitt input
PE3/SYNC PE4/EXI0 PE5/EXI1
Servo input
Data (Port Note) PE3/SYNC, CMOS schmitt input schmitt input selected with mask option.
Hi-Z
pins
CXP88616/88624
Port
Port/DA/PWM select
Circuit format
When reset
PE6/PWM0/ DAA0 PE7/PWM1/ DAA1
gate output output
High level
Port data
Data Hi-Z control
pins
(Port
Input multiplexer
AN0/ANOUT
converter
Hi-Z
From amplifier circuit Analog output control
pins Port
Input multiplexer
Input multiplexer converter
Hi-Z
PF0/AN4 PF3/AN7
converter
Hi-Z
Data
pins Port
(Port
PF4/AN8 PF7/AN11
Port data Data (Port Port/AD select Input multiplexer converter
Hi-Z
pins
CXP88616/88624
Port PG0/AN12 PG1/AN13
Circuit format
Input multiplexer converter
When reset
Hi-Z
Data
pins Port
Port data
(Port
Medium drive voltage12
Hi-Z
Large current 12mA
Data
pins Port
(Port
Port data
PI0/INT0/ EVN-DET PI1/EC/INT2
Data
Port direction
Hi-Z
(Port Edge detection
Standby release Interruption circuit Data
pins
(Port direction)
Port
Port data
Data
Port direction (Port Standby release Data
Hi-Z
Edge detection
pins
(Port direction)
CXP88616/88624
Circuit format
When reset
CTLAMP CTLAMP CTLFAMPO
CTLAG CTLAMP
1/2AMPVDD
CTLFAMPO
CTLAMP
pins
Input charge control
CTLSAMPI
Input charge control circuit CTLAG
1/2AMPVDD
Input charge control circuit VREFOUT
1/2AMPVDD
pins
AMPVDD
CTLAG VREFOUT 1/2AMPVDD
AMPVSS VREFOUT. CFG, DFG, amplifiers CTLAG. amplifier
pins
CXP88616/88624
Circuit format
AMPVDD Recording current control circuit
When reset
Write current select RTO6
RECCTL
RTO7 RTO3 AMPVSS CTLCIN
Hi-Z
control permission
AMPVDD Recording current control circuit
Write current select RTO7
RECCTL
RTO6 RTO3 AMPVSS control permission CTLCIN
Hi-Z
From RECCTL
CTLCIN
RTO3 control permission
Hi-Z
AMPVSS
CTLCIN
From RECCTL RTO3 control permission
Hi-Z
AMPVSS
control permission
RECCAP
RTO5
level
Recording current control circuit
CXP88616/88624
Circuit format
Shows circuit composition during oscillation. Feedback resistor removed XTAL becomes High level during stop. XTAL
When reset
EXTAL XTAL
EXTAL
Oscillation
pins
Mask option
Pull resistor Schmitt input
level
CXP88616/88624
Absolute Maximum Ratings Item Symbol AVDD Supply voltage AVSS Rating -0.3 +7.0 AVss +7.0 -0.3 +0.3 Unit Port
(Vss reference) Remarks
AMPVDD AMPVSS +7.0 AMPVSS Input voltage Output voltage Medium drive output voltage High level output current High level total output current VOUT VOUTP level output current IOLC level total output current Operating temperature Storage temperature Allowable power dissipation Topr Tstg +150 -0.3 +0.3 -0.3 +7.0 -0.3 +7.0 -0.3 +15.0
Total output pins Other than large current output ports (value pin) Large current output port (value pin) Total output pins
package type
AVDD must exceed +0.3V. AMPVDD must exceed +0.3V. VOUT must exceed +0.3V. large current output port port (PH). Note) Usage exceeding absolute maximum ratings permanently impair LSI. Normal operation should better take place under recommended operating conditions. Exceeding those conditions adversely affect reliability LSI.
CXP88616/88624
Recommended Operating Conditions Item Symbol Min. Supply voltage Analog power supply AVDD AMPVDD High level input voltage VIHS VIHTS VIHEX level input voltage VILS VILTS VILEX Operating temperature Topr 0.7VDD 0.8VDD Max. Unit
(Vss reference) Remarks Guaranteed operation range frequency dividing clock Guaranteed operation range 1/16 frequency dividing clock during SLEEP mode Guaranteed data hold operation range during STOP CMOS schmitt input schmitt input EXTAL pin6 CMOS schmitt input schmitt input EXTAL
-0.3 0.3VDD 0.2VDD
AVDD should same voltage. AMPVDD should same voltage. Normal input port (each PD2, PD3, PD6, PF3, PI7), Each RST, PD0/INT1/NMI, PD1/RMC, PD4/CS0, PD5/SCK0, PD7/SI0, PE2, PE3/SYNC, PE4/EXI0, PE5/EXI1, PI0/INT0, PI1/EC/INT2 (For PE3/SYNC, when CMOS schmitt input selected with mask option.) PE3/SYNC (when schmitt input selected with mask option.) Specifies only during external clock input.
CXP88616/88624
Electrical Characteristics Characteristics (VDD 5.5V) Item High level output voltage level output voltage Symbol Pins PE1, PE7, PF7, (VOL only) IIHE Input current IILE IILR leakage current Open drain output leakage current (N-CH state) RST1 AN3, RST1 EXTAL Conditions 4.5V, -0.5mA 4.5V, -1.2mA 4.5V, 1.8mA 4.5V, 3.6mA 4.5V, 12.0mA 5.5V, 5.5V 5.5V, 0.4V 5.5V, 0.4V 5.5V, 5.5V -0.5 -1.5 +75°C, reference) Min. -400 Typ. Max. Unit
ILOH
5.5V 16MHz crystal oscillation 15pF) 5.5V3 SLEEP mode
IDD1 IDDS1 Supply current2 IDD2 IDDS2 IDDS3 VDD,
5.5V STOP mode (EXTAL oscillation stop) 5V±0.5V
Input capacity
RECCTL (+), RECCTL (-), CTLAMP (+), CTLAMP (-), CTLSAMPI, CFG, DFG,
Clock 1MHz other than measured pins
specifies input current when pull-up resistor selected, specifies leakage current when resistor selected. When entire output pins open. When setting upper bits (CPU clock selection) clock control register (CLC: 00FEH) "00" operating high speed mode (1/2 frequency dividing clock).
CXP88616/88624
Characteristics Clock timing Item System clock frequency System clock input pulse width System clock input rise fall times Event count clock input pulse width Event count clock input rise fall times Symbol
+75°C, 5.5V, reference) Condition Fig. Fig. Fig. Fig. External clock drive Fig. Fig. External clock drive Fig. Fig. Min. Typ. Max. Unit
XTAL EXTAL XTAL EXTAL XTAL EXTAL
tXL, tCR, tEH, tER,
tsys 2001
tsys indicates three values according contents clock control register (CLC; 00FEH) upper bits (CPU clock selection). tsys [ns] 2000/fc (Upper bits "00"), 4000/fc (Upper bits "01"), 16000/fc (Upper bits "11")
Fig. Clock timing
1/fc
0.4V EXTAL XTAL 0.4V
Fig. Clock applied condition
Crystal oscillation Ceramic oscillation External clock
EXTAL
XTAL
EXTAL
XTAL
74HC04
Fig. Event count clock timing
0.8VDD 0.2VDD
CXP88616/88624
Serial transfer (CH0) Item SCK0 delay time SCK0 floating delay time delay time floating delay time high level width SCK0 cycle time SCK0 high level widths input set-up time (against SCK0 input hold time (against SCK0 SCK0 delay time Symbol SCK0
+75°C, 5.5V, reference) Condition Chip select transfer mode (SCK0 output mode) Chip select transfer mode (SCK0 output mode) Chip select transfer mode Chip select transfer mode Chip select transfer mode Input mode SCK0 Output mode Input mode SCK0 Output mode SCK0 input mode SCK0 output mode SCK0 input mode SCK0 output mode SCK0 input mode SCK0 output mode Min. Max. Unit
tDCSK
tsys tsys tsys tsys tsys
2tsys 16000/fc
tDCSKF SCK0 tDCSO
tDCSOF tWHCS tKCY tSIK tKSI tKSO
tsys
8000/fc
tsys
tsys
Note tsys indicates three values according contents clock control register (CLC; 00FEH) upper bits (CPU clock selection). tsys [ns] 2000/fc (Upper bits "00"), 4000/fc (Upper bits "01"), 16000/fc (Upper bits "11") Note load SCK0 output mode output delay time 50pF 1TTL.
CXP88616/88624
Fig. Serial transfer timing (CH0)
tWHCS
0.8VDD 0.2VDD
tKCY tDCSK tDCSKF
0.8VDD SCK0 0.2VDD
0.8VDD
tSIK
tKSI
0.8VDD Input data 0.2VDD
tDCSO
tKSO
tDCSOF
0.8VDD Output data 0.2VDD
CXP88616/88624
converter characteristics +75°C, AVDD 5.5V, AVREF AVDD, AVss reference) Item Resolution Linearity error Absolute error Conversion time Sampling time Reference input voltage Analog input voltage
Only converter operation 25°C AVDD AVREF 5.0V AVss
Symbol
Condition
Min.
Typ.
Max.
Unit Bits
tCONV tSAMP
VREF VIAN AVREF Operation mode
160/fADC 12/fADC AVDD AVDD AVREF
AVREF current
IREF
AVREF
SLEEP mode STOP mode 32kHz operation mode
Fig. Definitions converter terms
Digital conversion value
fADC indicates below values contents (ADCCK) operation clock selection register (MSC: 01FFH), bits (PCK1) (PCK0) clock control register (address: 00FEH).
Linearity error Analog input
ADCCK PCK1, PCK0 fEX/2) fEX/4) fEX/16)
selection) fADC fc/2 fADC fc/4 fADC fc/16
selection) fADC fADC fc/2 fADC fc/8
CXP88616/88624
Interruption, reset input +75°C, 5.5V, reference) Item External interruption high level widths Reset input level width Symbol INT0 INT1 INT2 Condition Min. Max. Unit
tRSL
32/fc
Fig. Interruption input timing
INT0 INT1 INT2 (Falling edge)
0.8VDD 0.2VDD
Fig. Reset input timing
tRSL
0.2VDD
CXP88616/88624
Analog Circuit Characteristics Amplifier circuit reference voltage characteristics +75°C, AMPVDD 5.0V, AMPVSS reference) Item Reference level output voltage Symbol VREFOUT CTLAG VREFOUT Reference level output current CTLAG VREFOUT VREFOUT 0.5V VREFOUT VREFOUT 0.5V CTLAG CTLAG 0.5V CTLAG CTLAG 0.5V Conditions Min. 2.15 3.50 -0.30 2.80 -0.30 Typ. 2.35 -0.85 -0.85 Max. 2.55 Unit
amplifier characteristics +75°C, AMPVDD 5.0V, AMPVSS CTLAG reference) Item Symbol Conditions Gain 16dB RECCTL Gain 27dB RECCTL AVCTL1 RECCTL Gain 42dB CTLFAMPO2 RECCTL Gain 58dB RECCTL Offset voltage VOSCTL1 CTLAMP Input resistance RINCTL1 CTLAMP CTLAMP Charge switch resistance RCCTL1 CTLAMP CTLAMP CTLAMP open Charge switch CTLAMP +0.2V Charge switch CTLAMP +0.2V Charge switch CTLAMP +0.5V Charge switch CTLAMP +0.5V Min. 12.5 23.5 39.0 54.5 26.0 1.20 Typ. 14.5 25.5 41.5 57.0 44.5 1010 1010 Max. 16.5 27.5 44.0 59.5 Unit
Voltage gain
RECCTL CTLCIN connection RREAD switch resistance
RECCTL During read operation, CTLCIN CTLCIN RECCTL 0.2V RECCTL During read operation, CTLCIN CTLCIN RECCTL 0.2V CTLCIN During write operation, CTLCIN AMPVSS 0.2V During write operation, CTLCIN AMPVSS 0.2V
CTLCIN RWRITE switch resistance
CTLCIN
When CTLCIN (+), CTLAMP pins CTLCIN (-), CTLAMP pins coupled, then signal input from RECCTL pin. result after measuring CTLFAMPO output waveform voltage gain. Note) gain increases approximately 1.5dB when coupling capacitor (47µF) connected CTLAMP CTLAMP pins, signal input from CTLAMP CTLAMP pins.
CXP88616/88624
amplifier characteristics +75°C, AMPVDD 5.0V, AMPVSS CTLAG reference) Item Symbol Conditions Gain Voltage gain1, AVCTL2 Gain 11dB Gain 16dB Gain 20dB cut-off frequency Offset voltage fCCTL VOSCTL2 CTLSAMPI open Comparator level +100mV0-p CTLSAMPI Comparator level +250mV0-p Comparator level VCCTL Comparator level +400mV0-p Comparator level -100mV0-p Comparator level -250mV0-p Comparator level -400mV0-p Input resistance Charge switch resistance RINCTL2 RCCTL2 Charge switch CTLSAMPI +0.2V Charge switch CTLSAMPI +0.5V Min. 10.4 15.3 19.3 15.0 70.0 -70.0 -220 -370 10.0 Typ. 11.5 16.5 20.5 25.0 -100 -250 -400 18.0 1140 Max. 12.6 17.7 21.7 40.0 -130 -280 -430 Unit mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p
When signal input with coupling capacitor (47µF) connected CTLSAMPI pin. result after measuring output waveform amplifier internal low-pass filter voltage value.
CTLAMP characteristics (1st amplifier amplifier) +75°C, AMPVDD 5.0V, AMPVSS reference) Item Voltage gain Input amplitude (peak value) Input sensitivity Input dead band Symbol AVCTL Conditions amplifier gain 16dB amplifier gain 20dB RECCTL RECCTL RECCTL VSCTL VNSCTL amplifier gain 58dB amplifier gain 20dB Comparator level +400mV0-p -400mV0-p 0.015 RECCTL 0.08 0.04 0.10 mV0-p mV0-p Min. 31.8 Typ. 35.0 Max. 38.2 Unit
VPKCTL
±300
mV0-p
other combinations amplifier gains, amplifier amplifier added respectively. Note) result when signal input from RECCTL with amplifier amplifier after performing coupling CTLCIN (+), CTLAMP pins CTLCIN (-), CTLAMP pins, CTLFAMPO, CTLSAMPI pins.
CXP88616/88624
CFGAMP characteristics +75°C, AMPVDD 5.0V, AMPVDD VREFOUT reference) Item Symbol Pins Conditions Gain Voltage gain AVCFG Gain 20dB Gain 34dB Gain 38dB cut-off frequency Offset voltage Comparator judgment level width fCCFG VOSCFG open Comparator schimitt width 320mVp-p Comparator schimitt width 160mVp-p Gain 38dB Comparator level 320mVp-p Gain 38dB Comparator level 160mVp-p Gain 38dB Comparator level 320mVp-p Gain 38dB Comparator level 160mVp-p Input resistance Charge switch resistance RINCFG RCCFG Charge switch +0.2V Charge switch +0.5V sine wave with duty 48.0 3.40 1.50 Min. -0.3 19.2 33.2 37.0 30.0 Typ. 20.8 34.8 38.7 55.0 4.20 2.10 4.10 2.00 50.0 52.0 ±2.4 Max. 22.4 36.4 40.4 80.0 5.00 2.40 Unit mVp-p mVp-p mVp-p mVp-p mVp-p mVp-p V0-p
VCCFG
Input sensitivity
VSCFG
Input dead band
VNSCFG
Digital output DTYCFG waveform duty Input amplitude (peak value) VPKCFG
When signal input with coupling capacitor (47µF) connected pin. result after measuring output waveform amplifier internal low-pass filter voltage value. result after measuring digital signal waveform output from amplifier circuit.
CXP88616/88624
DFGAMP characteristics +75°C, AMPVDD 5.0V, AMPVSS VREFOUT reference) Item Symbol Pins Conditions Gain Voltage gain AVDFG Gain 20dB Gain 34dB Gain 38dB cut-off frequency Offset voltage Comparator judgment level width fCDFG VOSDFG open Comparator schmitt width 320mVp-p VCDFG Comparator schmitt width 160mVp-p Gain 38dB Comparator level 320mVp-p VSDFG Gain 38dB Comparator level 160mVp-p Gain 38dB Comparator level 320mVp-p VNSDFG Gain 38dB Comparator level 160mVp-p Charge switch +0.2V Charge switch +0.5V sine wave duty 48.0 3.40 1.50 Min. -0.3 19.2 33.2 37.0 30.0 Typ. 20.8 34.8 38.7 55.0 4.20 2.10 4.10 2.00 50.0 52.0 ±2.4 Max. 22.4 36.4 40.4 80.0 5.00 2.40 Unit mVp-p mVp-p mVp-p mVp-p mVp-p mVp-p V0-p
Input sensitivity
Input dead band
Input resistance Charge switch resistance
RINDFG RCDFG
Digital output DTYDFG waveform duty Input amplitude (peak value) VPKDFG
When signal input with coupling capacitor (47µF) connected pin. result after measuring output waveform amplifier internal low-pass filter voltage value. result after measuring digital signal waveform output from amplifier circuit.
CXP88616/88624
DPGAMP characteristics +75°C, AMPVDD 5.0V, AMPVSS VREFOUT reference) Item Voltage gain cut-off frequency Offset voltage Symbol AVDPG fCDPG VOSDPG open Comparator level 600mV0-p Comparator level 400mV0-p Comparator level 200mV0-p Comparator level VCDPG Comparator level 100mV0-p Comparator level -600mV0-p Comparator level -400mV0-p Comparator level -200mV0-p Comparator level -100mV0-p Comparator level 600mV0-p, 200mV0-p Input sensitivity Comparator level 400mV0-p, 100mV0-p VSDPG Comparator level -600mV0-p, -200mV0-p Comparator level -400mV0-p, -100mV0-p Comparator level 600mV0-p, 200mV0-p Comparator level 400mV0-p, 100mV0-p VNSDPG Comparator level -600mV0-p, -200mV0-p Comparator level -400mV0-p, -100mV0-p Input resistance Charge switch resistance Input amplitude (peak value) RINDPG RCDPG VPKDPG Charge switch +0.2V Charge switch +0.5V -120 24.0 Pins Conditions Min. 11.1 30.0 -572 -368 -174 Typ. 12.0 55.0 -605 -400 -200 -100 -155 -109 -150 -103 44.5 ±2.4 Max. 13.2 85.0 -643 -438 -223 -124 -185 -130 Unit mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p mV0-p
Input dead band
When signal input with coupling capacitor (47µF) connected pin. result after measuring output waveform amplifier internal low-pass filter voltage value.
CXP88616/88624
write circuit characteristics +75°C, AMPVDD 5.0V, AMPVSS reference) Item Output resistance Symbol RECCAP Pins Conditions RECCAP AMPVDD 0.5V RECCAP AMPVDD 0.5V Write current 2.0mA Write current 2.5mA Write current 3.0mA Output current IOREC Write current 3.5mA RECCTL RECCTL Write current 4.0mA Write current 4.5mA Write current 5.0mA Write current 5.5mA Write current 6.0mA Min. Typ. Max. 1005 Unit
current value which flows when RECCTL RECCTL shorted.
Amplifier operating current characteristics +75°C, AMPVDD 5.0V, AMPVSS reference) Item Amplifier operating current Symbol IAMP Pins AMPVDD Conditions When amplifier operating When amplifier operating Min. Typ. Max. 12.0 Unit
recording current added during write. Note) amplifier operation NOT-operation controlled according contents amplifier power supply control register (ASWC: 05E2H) bits
CXP88616/88624
Supplement Fig. Recommended oscillation circuit
EXTAL
XTAL
Manufacturer
Model
(MHz) 8.00
(pF)
(pF)
RIVER ELETEC CO., LTD.
HC-49/U03
10.00 12.00 16.00 8.00 (12) (12) (12) (12)
KINSEKI LTD.
HC-49/U (-S)
10.00 12.00 16.00
Mask option table Item Reset pull-up resistor Input circuit format1 Content Non-existent CMOS schmitt Existent schmitt
input circuit format selected PE3/SYNC pin.
CXP88616/88624
Characteristics Curve
16MHz, 25°C, Typical) dividing mode dividing mode
(VDD 5.0V, 25°C, Typical)
dividing mode
Supply current [mA]
Supply current [mA]
1/16 dividing mode
SLEEP mode
dividing mode
1/16 dividing mode SLEEP mode
Supply voltage
System clock [MHz]
CXP88616/88624
Package Outline
Unit:
100PIN (PLASTIC)
23.9 20.0 0.15 0.05
14.0 17.9
15.8
0.65
0.15
0.13 0.35 2.75 0.15
0.05
0.15
DETAIL
(16.3)
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-100P-L01 QFP100-P-1420 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING 42/COPPER ALLOY 1.7g

CXP88616 88624

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