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First line: Am29526 Am29527 Am29528 Am29529 High Speed Sine, Generators DISTINCTIVE CHARACTERISTICS Provides values sine/cosine functions w/204S increments Outputs 16-bit two's complement fractions Fast generation time 50ns Com'l S/LS compatible Three-state outputs processing Abstract: .. 0 000 0 0 0000 00 00 512 200 tt/4 -0.707107 A57E A5 7E 1024 400 ir/2 -1.00000 8000 80 00 1536 600 3 77/4 .. Operating Range Screening Level S> Order Number Note 1 Note 3 Note 2 AM29526PC P-24-1AA C .. Tags: datasheet abstract.. |
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First line: AD614 ad612 AD612 and AD614 ANALOG DEVICES Self-Contained High Performance Wide Band Instrumentation Amplifiers AD612, AD614 Pin-Programmable Gain: 1,024 Binary Steps Fast Settling: 20n* 0.05%, <AD614A,B) High Gain Accuracy: (AD612C) Gain Nonlinearity: Gain Offset Drift: max, RTI, 1024 (AD612C) H Abstract: .. Temperature —25°C to + 85°C ±10pA/°C • • ±2nA •* ±10pA/°C INPUT VOLTAGE NOISE, G = 1024 0.01Hz .. Source Resistance Imbalance < c ia ,G ■ 32 24 \ -s s G ■ SOURCE RESISTANCE IMBALANCE - m Figure 7 .. Tags: AD612 and AD614 ad612 AD614 datasheet abstract.. |
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First line: crouzet millenium 2 Crouzet xd26 millenium 2 crouzet pt100 sensor interface with micro controller pt100 sensor interface with micro controller Millenium logic controllers With display Abstract: .. CD20 88970051 24 V c 12 digital of which 6 are analogue 8 x 8 A relays. 88970052 24 V c 12 digital of .. 15 W 24 V DC - 30 W 24 V DC - 60 W. 88970117 88970118 88970119 88950306 88950303 88950304 88950307 .. Tags: pt100 sensor interface with micro controller pt100 sensor interface with micro controller millenium 2 crouzet Crouzet xd26 crouzet millenium 2 datasheet abstract.. |
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First line: Architecture of TMS320C64X TMS320C64xx TMS320C64x Peripheral Component Interconnect (PCI) Performance Smith ABSTRACT This application report describes number cycles required perform given peripheral component interconnect (PCI) data transfer based variety permutations burst length, speed, EMIF speed Abstract: .. -Around Penalty 24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks are the .. 32 24. 66. 133. 64 12. W/R. 133. 32 8. W/R. 100. 64 8. 100. 32 8. 133. 64 8. W/W. 133. 32 8. W/W. 100. 64 8. 100. 32 8. SPRA965. 28 .. Tags: TMS320C64xx Architecture of TMS320C64X TMS320C64X* TMS320C64x TMS320C64xx |
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First line: IC AND GATE 7408 2N 7408* IC AND GATE 7408 pin configuration pin DIAGRAM OF IC 7408 data sheet IC 7408 Single-Channel, 1024-Position, R-Tolerance Digital Potentiometer AD5293 Single-channel, 1024-position resolution nominal resistance Calibrated nominal resistor tolerance (resistor performance mode) Abstract: .. Rev. C | Page 10 of 24. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. RESET. VSS A. W. RDY. SYNC. VLOGIC .. The 10-bit data in the RDAC latch is decoded to select one of the 1024 possible wiper settings .. Tags: data sheet IC 7408 pin DIAGRAM OF IC 7408 IC AND GATE 7408 pin configuration 2N 7408* IC AND GATE 7408 AD5293 |
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First line: 65554 Mode Support HiQV64TM Controllers Application Note evision April 1996 Abstract: .. Resolution Color Refresh DCLK MEM Cursor FB/C FB/M Video w/o w/ CAS cycle = 1 Width bits = 64 .. 1024 768 8 60 65.000 768 4.2 0 0 300 772 1072 11.6 20% 13.8 24% 1024 768 8 70 75.000 768 4.2 0 0 300 772 .. Tags: weitek i486 i387* HiQV64TM |
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First line: 1024-/256-Position, Resistor Tolerance Error, Interface 50-TP Memory Digital Rheostat AD5270/AD5271 Single-channel, 1024-/256-position resolution nominal resistance Maximum nominal resistor tolerance error 50-times programmable (50-TP) wiper memory Rheostat mode temperature coefficient: ppm/°C s Abstract: .. Rev. C | Page 10 of 24. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD 1 1. VSS. 2 2 A. 3 3 W. 4 4 SDO. 10. 9. 8 .. nominal resistance between Terminal W and Terminal A, RWA, is 20 kΩ, 50 kΩ, or 100 kΩ and has 1024- .. Tags: AD5270 AD5271-50* TP 41 WITH PIN CONFIGURATION DIAGRAM D0807* AD5270 AD5271 |
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First line: CL-PX2070* vesa local bus video bios gd5434* gd5434 GD5440 CL-GD543X/'4X CIIRRUS I-OG/CI Preliminary Product Bulletin Accelerators CL-GD5440 Video Accelerator CL-GD5434/'36 64-bit Accelerators CL-GD5430 32-bit Accelerator CL-GD543X/4X Family Pin- software-compatible graphics accelerators Integrated Abstract: .. 75 Hz 1024 x 768 75 Hz 75 Hz 75 Hz 1280 x 1024 75 Hz 43i Hz - The CL-GD5436 supports Packed-24 RGB video .. w. <C. ::: ~ ~ 11 ..- - - "I 208-Pin POFP 1"----00-. ~~ CL-GD543X. . l~ 81J~,1~ :;; ~o. ~S; o a.. CL .. Tags: GD5440 gd5434 gd5434* vesa local bus video bios CL-PX2070* datasheet abstract.. |
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First line: ispLSI 1024 In-System Programmable High Density Features HIGH-DENSITY PROGRAMMABLE LOGIC High-Speed Global Interconnect 4000 Gates Pins, Dedicated Inputs Registers Wide Input Gating Fast Counters, State Machines, Address Decoders, etc. Small Logic Block Size Fast Random Logic Security Cell Prevents Abstract: .. 24 GLBs in the ispLSI 1024 device. Each GLB has 18 inputs, a program-mable AND/OR/XOR array, and .. Table 2- 0005Aisp w/mil.eps. 4.75. 4.5. 4.5. 0. 2.0. Commercial T A = 0°C to +70°C. Industrial T A = -40°C .. Tags: 5962-9476101MXC datasheet abstract.. |
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First line: C 331 Transistor 9.1024 Abstract: .. RθCS Case-to-Sink, flat, greased surface — 0.24 — °C/W. RθJA Junction-to-Ambient, typical .. PD - 9.1024. Thermal Resistance. Insulated Gate Bipolar Transistors IGBTs from .. Tags: C 331 Transistor datasheet abstract.. |
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First line: 24 c 1024 w 9.1024 IRGPC50M INSULATED GATE BIPOLAR TRANSISTOR Abstract: .. RθCS Case-to-Sink, flat, greased surface — 0.24 — °C/W. RθJA Junction-to-Ambient, typical .. PD - 9.1024. Thermal Resistance. Insulated Gate Bipolar Transistors IGBTs from .. Tags: 24 c 1024 w IRGPC50M |
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First line: 3606 Digitally Controlled Programmable Gain INSTRUMENTATION AMPLIFIER BINARY GAINS -1,2, 8.16.32, 64.126. 256. 512.1024V/V 4-BIT GAIN CONTROL EXCELLENT GAIN NONLINEARITY 0.01% 1024V/V Abstract: .. ±0.5 * nA/°C vs Supply Voltage ±0.1 * nA/V INPUT NOISE Voltage Rsource £ 5kn 0.01Hz to TOHz G = 1024 .. "C. unless otherwise noted. _n, PARAMETER CONDITIONS. -w" I. MIN. I. TYP o.02 0.001 0.003 0.005 5 o .. Tags: datasheet abstract.. |
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First line: burr brown 3553 BURR-BROWN 3607 Self-Contained High Accuracy INSTRUMENTATION AMPLIFIER GAIN RESISTORS INTERNAL BINARY GAINS 1V/V 1024V/V PIN-PROGRAMMABLE GAINS EXCELLENT GAIN NONLINEARITY 0.01% 1024V/V Abstract: .. , + 11 + 2 vs Temperature -25°C to +85°C ±0.0015G ■ +0.003G ±0.0005G +0.001G m W°C ±0.03G2 ±0.05G2 .. ±0.5 nA/°C vs Supply Voltage ±0.1 nA/V INPUT NOISE Voltage R source ^ 5kil 0.01Hz to 10Hz G = 1024 1 .. Tags: burr brown 3553 datasheet abstract.. |
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First line: LH540202 CMOS 1024 Asynchronous FIFO Fast Access Times: 15/20/25/35/50 Fast-Fall-Through Time Architecture Based CMOS Dual-Port SRAM Technology Input Port Output Port Have Entirely Independent Timing Expandable Width Depth Full, Half-Full, Empty Status Flags Data Retransmission Capability Abstract: .. d4 d3\Z 3 26 □ d6 d2 c 4 25 □ d6 d,c 5 24 □ d7 d0 ii 6 23 □ FL/rt xï l 7 22 □ rs ff ii 8 21 □ ëf q0 c 9 20 □ xö/hf q, ii 10 .. 54T m »«w c This Material Copyrighted By Its Respective Manufacturer CMOS 1024 x 9 Asynchronous .. Tags: datasheet abstract.. |
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First line: ^EDI Electronic Designs Inc. EDI8833C/LP/P High Speed 256K Monolithic SRAM 32Kx8 Static CMOS, Monolithic ED18833C/LP/P high speed, high performance, power, 262,144bit CMOS Static organized 32Kx8. Inputs three-state outputs compatible allow direct interfacing with common system structures. power vers Abstract: .. vcc a12 2 c 3 27 w a7 3 c 3 26 a13 as 4 c DIP 3 25 a8 a5 5 c 3 24 a9 a4 6 c & 3 23 a11 a3 a2 7 8 c c Flatpack 3 22 3 21 g a10 .. t< w c Row • 1024 x 256 Decoder • Memory Array • I • Input • Column I/O Data Circuit • Column Decoder. o .. Tags: datasheet abstract.. |
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First line: 1024-Word HN25088S, HN25089S 1024-word 8-bit Programmable Read Only Memories HITACHI HN25088Sand HN25089S high speed electrically programmable, fully decoded Bipolar 8192 bit-read only memories organized 1024 words bits with on-chip address decoding four chip enable inputs. HN25088S HN25089S fabrica Abstract: .. 1024 words by 8 bits with on-chip address decoding and four chip enable inputs_ The HN25088S and .. HN25089S · Standard cerdip 24-pin dual in-line package · OPERATION · Programming A logic one .. Tags: 1024-Word datasheet abstract.. |
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First line: 5840* din 58400 1,28 combination with Gearheads: 10/1, 12/3, 12/4, 12/5 Encoders: 05A, Abstract: .. Volt Ω W % rpm A mNm mNm. rpm/V mV/rpm mNm/A A/mNm. rpm/mNm μH ms gcm2 . 103rad/s2. K/W s. °C °C. mm N N N. mm .. 1024 N 006 S 012 S. 1024 M 1024 N 1024 E 1024 A. Series. DC-Micromotors Precious Metal Commutation .. Tags: din 58400 5840* datasheet abstract.. |
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First line: C 277 vga to av AAEON* vga to data Industrial Monitor nits, TFT, VGA, Features Wide Viewing Angle Fast Response Time High Contrast Ratio Very High Brightness Sunlight Readable AP-LKLH226-0 Abstract: .. Resolutions 1024 x 768. Dimension 277.4 w x 204.6 H x 27 D Storage Humidity 80% Operating .. 0.24 x 0.24 Dot Size. S-video input Yes. 1 x S-video in/ 1 x Video-in. Video input Yes. VGA input Yes. LCD .. Tags: vga to data AAEON* vga to av C 277 Video to VGA LVDS to vga AP-LKLH1226-01 |
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First line: General Description MAX151 high-speed, easy-to-use, microprocessor (uP) compatible 10-bit Analog-to-Digital Converter (ADC) with Track-and-Hold (T/H). Half-flash techniques allow typical conversion time 1.9ms with Total Unadjusted Error (TUE) (Max). converter analog input voltage range uses supplies Abstract: .. /°C Gain and Offset Drift ♦ Internal Clock ♦ ±5V Supplies with 275mW Power Dissipation ♦ 24-Pin 0 .. ACCURACY VB. VREF VREF = VREF+ - VREF- TA = 25 C Voo =+SV \Iss = -5V. 1.S. .. d. po ;: ii" 1.0. w. 0.5 .. Tags: datasheet abstract.. |
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First line: SN74ACT7881 1024 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227A- FEBRUARY 1993 REVISED JUNE 1994 Member Texas Instruments Family Independent Asynchronous Inputs Outputs Read Write Operations Synchronized Independent System Clocks Programmable Almost-Full/Almost-Empty Flag Pin-to-Pin Compatible With SN7 Abstract: .. D14 D15 D16 D17 29 30 31 27 26 25 24 23 22 21 20 19 17 15 14 13 12 10 <t> FIFO SN74ACT7881 -1024 x 18 RESET - .. a 3D WRTEN2 o a D0-D17 c o RDCLK H "0 RDEN1 33 m RDEN2 < m OE 3 Q0-Q17 OR AF/AE HF IR WRTEN2 >006066^ w ^"^ .. Tags: datasheet abstract.. |
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First line: SN74ACT7811 1024 CLOCKED FIRST-IN, FIRST-OUT MEMORY Member Texas Instruments Widebus Family Independent Asynchronous Inputs Outputs 1024 Words Bits Read Write Operations Synchronized Independent System Clocks Programmable Almost-Full/Almost-Empty Flag Pin-to-Pin Compatible With SN74ACT7881, SN74ACT7 Abstract: .. +1 W X+2 W513 W 1024‐X W 1025‐X W1024 W1025. Don’t Care. W1. Figure 4. Read Cycle. SN74ACT7811 .. 6 20 6 22 6 24 6 26. ns tpd RDCLK= AF/AE 6 20 6 22 6 24 6 26 ns. tPLH WRTCLK= HF 6 19 6 21 6 23 6 25 ns tPHL RDCLK .. Tags: SN74ACT7811 SN74ACT7881 SN74ACT7882 SN74ACT7884 |
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First line: SN74ACT7811 1024 CLOCKED FIRST-IN, FIRST-OUT MEMORY Member Texas Instruments Widebus Family Independent Asynchronous Inputs Outputs 1024 Words Bits Read Write Operations Synchronized Independent System Clocks Programmable Almost-Full/Almost-Empty Flag Pin-to-Pin Compatible With SN74ACT7881, SN74ACT7 Abstract: .. +1 W X+2 W513 W 1024‐X W 1025‐X W1024 W1025. Don’t Care. W1. Figure 4. Read Cycle. SN74ACT7811 .. 6 20 6 22 6 24 6 26. ns tpd RDCLK= AF/AE 6 20 6 22 6 24 6 26 ns. tPLH WRTCLK= HF 6 19 6 21 6 23 6 25 ns tPHL RDCLK .. Tags: SN74ACT7811 SN74ACT7881 SN74ACT7882 SN74ACT7884 |
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First line: 24-blt C498 att21c498 VGA ramdac att21c498* TVP3409 VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC XLAS092 1995 On-Chip Clock Doubler Input Pixel Output Color Software Compatible With AT&T ATT20C498/499/409 Abstract: .. Bit/Pixei, 60 Hz - 1024 x 768,16-Bit/Plxel, 85 Hz - 1024 x 768,24-Bit/Pixel, Packed, 70 Hz - 800 x .. 24. BLUE. :D " o. STROBE. c: C. XOUT. OTCLKB Figure 1. Functional Block Diagram. ~ :D. :s m :E. m. " . . 8961724 .. Tags: att21c498* VGA ramdac att21c498 C498 24-blt datasheet abstract.. |
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First line: 0110408* SN74ACT7881 1024 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227C FEBRUARY 1993 REVISED FEBRUARY 1996 Member Texas Instruments Family Independent Asynchronous Inputs Outputs Read Write Operations Synchronized Independent System Clocks Programmable Almost-Full/Almost-Empty Flag Pin-to-Pin Compati Abstract: .. TRANSITIONS TRANSITION WORD A B C D E F W513 W514 W 1024 — X W 1025 - X W1024 W1025 Figure 4. Read .. 23 24 25 26. V~~~~~~M~~~~~~~G~ 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 .. Tags: 0110408* datasheet abstract.. |
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First line: ^^^^^^^ KM48V514DT ELECTRONICS CMOS DRAM 512K CMOS Dynamic with Extended Data This family 524,288 Extended Data CMOS DRAMs. Extended Data offers high speed random access memory cells within same row. Power supply voltage (+5.0V +3.3V), access time (-5, -7), power consumption (Normal power) package t Abstract: .. =□ DQ6 DQ2 D= 4 25 □0 DQ5 DQ3 □= 5 24 oa DQ4 N.C □= 6 23 cu CAS W CE 7 22 □nöE RAS [E 8 21 un N.C A9CE 9 20 CD A8 A0 .. 12. 1024 cycle of burst refresh must be executed within 8ms before and after self refresh in .. Tags: datasheet abstract.. |
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First line: SN74ACT3642 1024x36x2 CLOCKED FIRST-INj FIRST-OUT MEMORY SCAS440-JUNE 1994 Free-Running CLKA CLKB Asynchronous Coincident Independent Clocked FIFOs Buffering Data Opposite Directions Mailbox Bypass Register Each FIFO Abstract: .. " I 'pd C-AF —H~ T 'pd C-AF -k- ÄFÄ [1024- Y1 +1 ] Words in FIFOI V 1024-Y1 Words In FIFQ1 X. y .. C-AF 3: Y2 I I, \ II. ;- w. .0-__ I. ru a: D.. I' AFB [1024 - Y2 + 1 ] Words In .. Tags: datasheet abstract.. |
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First line: 25e3 switch "Digital Potentiometer" AD520* differential amplifier datasheet Rheostat 2K Preset AD5206 SPI Nonvoltile Memory, 1024-Position Digitl Potentiometers AD5235* ADDR DECODE Abstract: .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28°C/W. Package Power Dissipation = TJ MAX ‐ T A /θJA NOTES 1 .. 1024-Step 24.4 244. PROGRAMMING THE VARIABLE RESISTOR Rheostat Operation The nominal .. Tags: AD5206 SPI Rheostat 2K Preset AD520* differential amplifier datasheet "Digital Potentiometer" 25e3 switch resistors rwf resistor rwf digital potentiometer 150k AD7376 AD5206 AD5200 AD5235 |
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First line: IM6653/IM6654 4096-Bit CMOS EPROM Intersil IM6653 IM6654 fully decoded 4096 CMOS electrically programmable ROMs (EPROMs) fabricated with Intersil's advanced CMOS processing technology. static states these devices exhibit microwatt power dissipation typical CMOS. Inputs three-state outputs compatible Abstract: .. C 24-Pin CERDIP IM6653/4AIJG -40°C to +85°C 24-Pin CERDIP IM6653/4MJG* -55°C to -M25°C 24-Pin .. FEATURES Organization -IM6653: 1024 x 4 IM6654: 512 x 8 Low Power - 7101lW Maximum Standby High .. Tags: datasheet abstract.. |
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First line: SN54ACT7811 1024 CLOCKED FIRST-IN, FIRST-OUT MEMORY Member Texas Instruments Widebus Family Independent Asynchronous Inputs Outputs 1024 Words Bits Read Write Operations Synchronized Independent System Clocks Programmable Almost-Full/Almost-Empty Flag Abstract: .. +1 W X+2 W513 W 1024‐X W 1025‐X W1024 W1025. Don’t Care. W1. Figure 4. Read Cycle. SN54ACT7811 .. Qnstpd WRTCLK= IR 1 14 nstpd RDCLK= OR 1 14 nstpdWRTCLK= AF/AE524 ns tpd RDCLK= AF/AE 5 24 nstPLH .. Tags: SN54ACT7811 |
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First line: 1024x36x2 MU723 SN74ACT3642 1024x36x2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY _SCAS440A JUNE 1994 REVISED SEPTEMBER 1995 Free-Running CLKA CLKB Asynchronous Coincident Independent Clocked FIFOs Buffering Data Opposite Directions Mailbox-Bypass Register Each FIFO Programmable Almost-Full Alm Abstract: .. 3: w > w a: D.. AFB [1024 - Y2 + 1 ] Words in FIF02. -I I. tpd C-AF I.. tt. _ 1_0_24_-_Y_2 .. 24. INSTRUMENTS -. TEXAS. 8961723 0110442 709 _ POST OFFICE BOX 655303 DALLAS. TEXAS 75265. This .. Tags: MU723 1024x36x2 MU723* a19c BO-935* datasheet abstract.. |
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First line: 2502J* OABI* signetics 2502 fr', signotics 1024-BIT CAPACITY MULTIPLEXED DYNAMIC SHIFT REGISTERS These Signetics 2500 Series 1024-bit multiplexed dynamic shift registers consist enhancement mode P-channel devices in.ear.ted single monolithic chip. toon-chip multiplexing data rete clock rete. SILICO Abstract: .. 2504V Single 1024-bit 8-Pin DIP ie ur 125 C/W maximum signetics guaranteed ratings*1 , 2 .. «ur «tV~ an i * *w wid tDO urn* for ••N-JS « to, 2602. N - 612 for 2B03, N - 1024 for 2S04 7 .. Tags: signetics 2502 OABI* 2502J* datasheet abstract.. |
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First line: tu 20 c synergy SYNERGY sy10474-5 sy10474-7 features" idescription Address access time, max. Chip select access time, max. Abstract: .. i block diagram i nnnnnn wë iz cs ci dl0 c dl-i c dl2 c du a e 24 23 22 21 20 19 top view flatpack 7 8 9 10 11 .. C. OUTPUT L L L. MODE Disabled Write "W Write "L" Read. Vee Pin Potential to Ground Pin Input Voltage .. Tags: tu 20 c synergy datasheet abstract.. |
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First line: SN54ACT7881 1024 CLOCKED FIRST-IN, FIRST-OUT MEMORY Member Texas Instruments Widebus Family Independent Asynchronous Inputs Outputs Read Write Operations Synchronized Independent System Clocks Programmable Almost-Full/Almost-Empty Flag Pin-to-Pin Compatible With SN74ACT7882, SN74ACT7884, SN74ACT7811 Abstract: .. A B C. W513 W 1025 ‐ X W1025. Figure 3. Write Cycle. SN54ACT7881 1024 · 18. CLOCKED FIRST-IN, FIRST .. A B C D E F. W513 W514 W 1024 ‐ X W 1025 ‐ X W1024 W1025. Figure 4. Read Cycle. SN54ACT7881 1024 · 18 .. Tags: SN74ACT7882 SN74ACT7884 SN74ACT7811 SN54ACT7881 |
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First line: PRDUCT PREVIEW 4/5/87 ASYNCHRNUS TACT7202M, TACT7202 FIRST-IN FIRST-UT MEMRY Asynchronous peration Abstract: .. 70 c : This Material Copyrighted By Its Respective Manufacturer re TACT7202—M, TACT7202 1024 X .. TACT7202—M, TACT7202 1024 X 9 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORY W R EF QO-Q8. VALID FIGURE .. Tags: datasheet abstract.. |
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First line: 512-line CCD424 CCD424 1024 1024 Pixel Image Area Split Frame Transfer Sensor FEATURES 1024 1024 Pixels Split Frame Transfer Pixel 21.50 21.50 Image Area 11.13 21.50 (x2) Storage Areas 100% Fill Factor Back Illuminated Bi-directional Serial Registers Gated Fast Dump Drains Serial Registers Four Nois Abstract: .. CCD424 consists of 1024 H by 1024 V pixels and the optically shielded frame storage regions .. package are 2.88” W x 2.08” L x 0.24” H . FUNCTIONAL DESCRIPTION The following functional .. Tags: 512-line CCD linear array charge amplifier array CCD424* CCD LINEAR SENSOR 512 CCD424 |
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First line: DS1204 DS620x Greater than 50,000 cycle connector life Durable rugged Ground makes first breaks last 3-Wire Serial Interface (DQ.CLK, RST) simplifies microprocessor interconnect: DS6201, DS6204, DS6205, DS6207 1-Wire Serial Interface (DQ.GND): DS6200, DS6206 Abstract: .. 2 which illustrates the 24-bit command protocol word and the 1024—bits of R/W memory. DS6201 .. i r SUBKEY 0 SUBKEY 1 SUBKEY 2 872 DS620X COMMAND WORD STRUCTURE Figure 13 MSB LSB KK c AAAAAA c .. Tags: DS1204 datasheet abstract.. |
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First line: SN74ACT7802 1024 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY 03599, AUGUST 1990-REVISED OCTOBER 1990 Independent Asynchronous Inputs Outputs Low-Power Advanced CMOS Technology 1024 Words Bits Each Programmable Almost Full/Almost Empty Flag Empty, Full, Half-Full Flags Fast Access Times With 50-pF Load Abstract: .. RAM LOCATION 1023 LOCATION 1024 STATUS FLAG LOGIC. Q0-Q17 EMPTY FULL HF AF/AE "O 30 o d C o H ■o 30 m < m .. Word-Width Expansion: 1024-Word by 36-Blt. a: a. ~ ~ o. w. c o a: a. INSTRUMENTS POST OFFICE BOX .. Tags: datasheet abstract.. |
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First line: transistor CC 11 A 3.3V Mbps CONTROLLER WITH SUPPORT PCI-BASED NETWORKING APPLICATIONS ADVANCED INFORMATION IDT77V222 Abstract: .. 9 GND 10 AD 25 11 AD 24 12 C/BE 3 13 IDSEL 14 AD 23 15 AD 22 16 GND. 17 GND 18 AD 21 19 Vcc 20 AD .. UTL_WR O Utility w rite c o ntro l. 1 5 2 UTL_RD O Utility r e a d c o ntr o l. 1 5 3 UT L _ A L E O Utility a d d re s s .. Tags: transistor CC 11 A IDT77V222 |
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First line: SN74ACT7881 1024 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227B FEBHUAHY 1993-REVISED OCTOBER 1994 Member Texas Instruments Family Independent Asynchronous Inputs Outputs Read Write Operations Synchronized Independent System Clocks Programmable Almost-Full/Almost-Empty Flag Pin-to-Pin Compatible With S Abstract: .. 60[ 11 59 C 12 58 C 13 57 C 14 56 [ 15 55 [ 16 54C 17 53 [ 18 52 [ 19 51C 20 50 [ 21 49 [ 22 48 [ 23 47 [ 24 46 [ 25 45 [ 26 .. TRANSITIONS TRANSITION WORD A B C D E F W513 W514 W 1024 - X W 1025-X W1024 W1025 Figure 4. Read .. Tags: datasheet abstract.. |
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First line: 3.3V Mbps CONTROLLER WITH SUPPORT PCI-BASED NETWORKING APPLICATIONS ADVANCED INFORMATION IDT77V252 Abstract: .. 9 GND 10 AD 25 11 AD 24 12 C/BE 3 13 IDSEL 14 AD 23 15 AD 22 16 GND. 17 GND 18 AD 21 19 Vcc 20 AD .. UTL_WR O Utility w rite c o ntro l. 1 5 2 UTL_RD O Utility r e a d c o ntr o l. 1 5 3 UT L _ A L E O Utility a d d re s s .. Tags: IDT77V252 |
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First line: MEMORY COMPONENTS 1024 Organization Very high performance Part Cycle Time Cycle Frequency Access Time 4505-25 4505-33 4505-50 Abstract: .. Ae RS QV ËF RE, CK„ ^ce 1 C 2 C 3 C 4 □ 5 C 6 C 7 C 8 C 9 C 10 C 11 C 12 C □ 24 Vce □ 23 CKW □ 22 WE, □ 21 FF U 20 DR □ 19 HF □ 18 .. 1024 x 5 Organization D. 24. vee. Very high performance. 03. 2. 23. CKw WE, Part No. 4505 25 ; Cycle Time 25 .. Tags: datasheet abstract.. |
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First line: incremental encoder ge333 Stainless steel housing, hollow shaft max. Resolution 5.6000 pulses GE333 Features Encoder with hollow shaft Stainless steel design Optical sensing Resolution max. 6000 Clamping ring housing Temperature range -25.+100°C VDC) Abstract: .. +100 °C 5 VDC -25..+85 °C 24 VDC Relative humidity 95 % non-condensing. Resistance DIN .. 36 10 06 200 23 1024 34 4096 50 25 09 250 24 1250 35 5000 39 50 13 360 26 1500 .. Tags: ge333 incremental encoder GE333 |
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First line: la 4142 EE-19 N KM48C51B, KM48V51B CMOS DRAM CMOS Dynamic with Fast Page Mode This family 54,88 Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access memory cells within same row. Power supply voltage(+5.0V +3.3V), access time (-5, -8), power consumption (Normal power) package ty Abstract: .. c 3 26 DQ6 DQ2 c 4 25 □ DQ5 DQ3 c 5 24 3 DQ4 N.C c 6 23 □ CÄ5 W c 7 22 3 ÖE RÄ3 c 8 21 □ N.C A9 c 9 20 3 A8 AO c 10 19 A7 A1 c .. 11. 1024 cycle of burst refresh must be executed within 16ms before and after self refresh in .. Tags: EE-19 N la 4142 datasheet abstract.. |
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First line: Pseudo Differential Input, MSPS, 10-/12-Bit ADCs 8-Lead SOT-23 AD7441/AD7451 Fast throughput rate: MSPS Specified 5.25 power maximum throughput rate: maximum MSPS with 9.25 maximum MSPS with Pseudo differential analog input Wide input bandwidth: SINAD input frequency Flexible power/serial clock spee Abstract: .. Rev. C | Page 7 of 24. TIMING SPECIFICATIONS1 VDD = 2.7 V to 5.25 V; fSCLK = 18 MHz; fS = 1 MSPS; VREF = 2 .. θJA Thermal Impedance 205.9°C/W MSOP 211.5°C/W SOT-23 θJC Thermal Impedance 43.74°C/W .. Tags: AD7441BRM-REEL7 AD74* serial adc AD7441 AD7451 |
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First line: am9602* AM2807PC Am2805/2806/2807/2808 512-and 1024-Bit Dynamic Shift Registers Distinctive Characteristics Am2805 Plug-in Replacement Intel 1405A Signetics 2505 Am2806 Plug-in Replacement Signetics 2512 Am2807 Plug-in Replacement Signetics 2524 Am2808 Plug-in Replacement Signetics 2525 chip recircu Abstract: .. LOGIC SYMBOLS w fl ,„ Am2805/6 OUT =D n-BJT SHIFT REGISTER CS Am2805 n = 512 Am2806 n = 1024 VCC - .. -55 C';;;TA ';;;+125 C TO-1OO 10 Pin Length 512 Bits AM2S07PC AM2805HC AM2S05HM 1024 Bits .. Tags: AM2807PC am9602* datasheet abstract.. |
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First line: Lens Mount M72 x 0.75 AVIIVA LINESCAN CAMERA Come into Abstract: .. Power Supply V Single 12 to 24. Power Dissipation W < 9. Operating Temperature °C 0 to 55 non .. AKYLA HD20 Color 3 x 20 CL/LVDS 1024-2048 up to 12 bits. AKYLA HD25 Color 3 x 25 CL/LVDS 1024-2048 up .. Tags: MDR 26 pin Lens Mount M72 x 0.75 datasheet abstract.. |
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First line: PAL20 PAL16R6-5DC PAL16L8 programming specifications 16R4 programming specification CYPRESS Series 16L8/16R8 16R6/16R4 4.5-ns, Industry-Standard PLDs Ultra high speed supports today's tomorrow's fastest microprocessors fMAX 142.9 (external) Popular industry standard architectures Abstract: .. 27 26 1 c 5 25 3 I I c s 25 3 I Vss C 6 24 3 cp Vss E 6 24 3 cp OE C 1 r8 23 3 Vcc OEC 7 16r6 23 3 Vcc O C 8 1£ 22 3 O I/O c 8 22 .. 27 768 - Ehfe 28 1024 • - m—fe 2 ® 1536 ' 4 1792 ■ "[IK*: 5 Vss 0 3 4 7 8 11 12 15 16 19 20 23 24 27 28 .. Tags: 16R4 programming specification PAL16L8 programming specifications PAL16R6-5DC PALï¼ï¼ datasheet abstract.. |
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First line: LQ181E1DG01 Display size [18.1"], SXGA format Super Abstract: .. 1280 x RGB x 1024 dot Contrast ratio 300 : 1 -. Dot pitch H x V 0.0935 x 0.2805 mm Power consumption .. color Outline dimensions W x H x D 414.0 x 335.0 x 24.0 mm. Input signal 8-bit Digital RGB - .. Tags: LQ181E1DG01 312-5 "Low Voltage Differential Signaling" LQ181E1DG01 |
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First line: V53C400 PRELIMINARY HIGH PERFORMANCE, POWER 4MX1 FAST PAGE MODE CMOS DYNAMIC HIGH PERFORMANCE V53C400 70/70L 80/80L 10/10L Max. Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Fast Page Mode Cycle Time, (tpc) Min. Read/Write Cycle Time, (tRC) POWER V53C400L Max. CMOS Standby Current Abstract: .. ras c 3 24 □ cas nc □ 4 23 □ nc a10 c 5 O O 22 □ A9 CO in > Ao L 9 18 □ a8 A, C 10 17 □ a7 a2 c 11 16 □ As a3 c 12 15 □ AS Vdd C .. tRC = 62.5 |is 62.5 |is x 1024 = 64 ms w-w <min>to 1 ^_ Input voltages : RAS and CAS V H > VDD - 0.2 V V .. Tags: datasheet abstract.. |
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First line: KM48C5 CMOS DRAM 512K CMOS Dynamic with Fast Page Mode This family 524,288 Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access memory cells within same row. Power supply voltage(+5.0V +3.3V), access time (-5, -7), power consumption (Normal power) package type (SOJ TSOP-II) opti Abstract: .. 24 cu DQ4 N.C c 6 23 □ CAS N.C CE 6 23 un CAS w c 7 22 □ DE W □= 7 22 co DE RAS c 8 21 □ N.C RAS CE 8 21 CD N.C A9 c 9 20 □ .. 11. 1024 cycle of burst refresh must be executed within 16ms before and after self refresh in .. Tags: datasheet abstract.. |
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